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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; RUN: opt < %s -passes=loop-vectorize,simplifycfg,instcombine -force-vector-interleave=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S | FileCheck %s3 4target triple = "aarch64-unknown-linux-gnu"5 6define void @test_big_little_params(ptr readonly %a, ptr readonly %b, ptr noalias %c) #0 {7; CHECK-LABEL: define void @test_big_little_params8; CHECK-SAME: (ptr readonly [[A:%.*]], ptr readonly [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0:[0-9]+]] {9; CHECK-NEXT: entry:10; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()11; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 212; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]13; CHECK: vector.body:14; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]15; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi <vscale x 4 x i1> [ splat (i1 true), [[ENTRY]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[VECTOR_BODY]] ]16; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]17; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr align 4 [[TMP2]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK]], <vscale x 4 x i32> poison)18; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[B]], i64 [[INDEX]]19; CHECK-NEXT: [[WIDE_MASKED_LOAD1:%.*]] = call <vscale x 4 x i8> @llvm.masked.load.nxv4i8.p0(ptr align 1 [[TMP3]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK]], <vscale x 4 x i8> poison)20; CHECK-NEXT: [[TMP4:%.*]] = call <vscale x 4 x i32> @foo_vector(<vscale x 4 x i32> [[WIDE_MASKED_LOAD]], <vscale x 4 x i8> [[WIDE_MASKED_LOAD1]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK]])21; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]22; CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP4]], ptr align 4 [[TMP5]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK]])23; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP1]]24; CHECK-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 [[INDEX_NEXT]], i64 1025)25; CHECK-NEXT: [[TMP6:%.*]] = extractelement <vscale x 4 x i1> [[ACTIVE_LANE_MASK_NEXT]], i64 026; CHECK-NEXT: br i1 [[TMP6]], label [[VECTOR_BODY]], label [[EXIT:%.*]], !llvm.loop [[LOOP0:![0-9]+]]27; CHECK: exit:28; CHECK-NEXT: ret void29;30entry:31 br label %for.body32 33for.body:34 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]35 %gep_s = getelementptr i32, ptr %a, i64 %iv36 %load_s = load i32, ptr %gep_s37 %gep_b = getelementptr i8, ptr %b, i64 %iv38 %load_b = load i8, ptr %gep_b39 %call = call i32 @foo_big_little(i32 %load_s, i8 %load_b) #140 %arrayidx = getelementptr inbounds i32, ptr %c, i64 %iv41 store i32 %call, ptr %arrayidx42 %iv.next = add nuw nsw i64 %iv, 143 %exitcond = icmp eq i64 %iv.next, 102544 br i1 %exitcond, label %exit, label %for.body45 46exit:47 ret void48}49 50define void @test_little_big_params(ptr readonly %a, ptr readonly %b, ptr noalias %c) #0 {51; CHECK-LABEL: define void @test_little_big_params52; CHECK-SAME: (ptr readonly [[A:%.*]], ptr readonly [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] {53; CHECK-NEXT: entry:54; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()55; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 156; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]57; CHECK: vector.body:58; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]59; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi <vscale x 2 x i1> [ splat (i1 true), [[ENTRY]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[VECTOR_BODY]] ]60; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr [[A]], i64 [[INDEX]]61; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x float> @llvm.masked.load.nxv2f32.p0(ptr align 4 [[TMP2]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x float> poison)62; CHECK-NEXT: [[TMP3:%.*]] = getelementptr double, ptr [[B]], i64 [[INDEX]]63; CHECK-NEXT: [[WIDE_MASKED_LOAD1:%.*]] = call <vscale x 2 x double> @llvm.masked.load.nxv2f64.p0(ptr align 8 [[TMP3]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x double> poison)64; CHECK-NEXT: [[TMP4:%.*]] = call <vscale x 2 x double> @bar_vector(<vscale x 2 x float> [[WIDE_MASKED_LOAD]], <vscale x 2 x double> [[WIDE_MASKED_LOAD1]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK]])65; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[C]], i64 [[INDEX]]66; CHECK-NEXT: call void @llvm.masked.store.nxv2f64.p0(<vscale x 2 x double> [[TMP4]], ptr align 8 [[TMP5]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK]])67; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP1]]68; CHECK-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 [[INDEX_NEXT]], i64 1025)69; CHECK-NEXT: [[TMP6:%.*]] = extractelement <vscale x 2 x i1> [[ACTIVE_LANE_MASK_NEXT]], i64 070; CHECK-NEXT: br i1 [[TMP6]], label [[VECTOR_BODY]], label [[FOR_COND_CLEANUP:%.*]], !llvm.loop [[LOOP3:![0-9]+]]71; CHECK: for.cond.cleanup:72; CHECK-NEXT: ret void73;74entry:75 br label %for.body76 77for.body:78 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]79 %gep_f = getelementptr float, ptr %a, i64 %iv80 %load_f = load float, ptr %gep_f81 %gep_d = getelementptr double, ptr %b, i64 %iv82 %load_d = load double, ptr %gep_d83 %call = call double @bar_little_big(float %load_f, double %load_d) #284 %arrayidx = getelementptr inbounds double, ptr %c, i64 %iv85 store double %call, ptr %arrayidx86 %iv.next = add nuw nsw i64 %iv, 187 %exitcond = icmp eq i64 %iv.next, 102588 br i1 %exitcond, label %for.cond.cleanup, label %for.body89 90for.cond.cleanup:91 ret void92}93 94;; TODO: Test uniform and linear parameters when they are properly supported,95;; especially a variant with no vector parameters so the return type96;; must be used to find the VF.97 98;; Scalar functions99declare i32 @foo_big_little(i32, i8)100declare double @bar_little_big(float, double)101 102;; Vector function variants103declare <vscale x 4 x i32> @foo_vector(<vscale x 4 x i32>, <vscale x 4 x i8>, <vscale x 4 x i1>)104declare <vscale x 2 x double> @bar_vector(<vscale x 2 x float>, <vscale x 2 x double>, <vscale x 2 x i1>)105 106attributes #0 = { "target-features"="+sve" vscale_range(1,16) }107attributes #1 = { nounwind "vector-function-abi-variant"="_ZGVsMxvv_foo_big_little(foo_vector)" }108attributes #2 = { nounwind "vector-function-abi-variant"="_ZGVsMxvv_bar_little_big(bar_vector)" }109