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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -passes=loop-vectorize,simplifycfg -S < %s | FileCheck %s3 4target triple = "aarch64-unknown-linux-gnu"5 6define void @vscale_mul_4(ptr noalias noundef readonly captures(none) %a, ptr noalias noundef captures(none) %b) #0 {7; CHECK-LABEL: define void @vscale_mul_4(8; CHECK-SAME: ptr noalias noundef readonly captures(none) [[A:%.*]], ptr noalias noundef captures(none) [[B:%.*]]) #[[ATTR0:[0-9]+]] {9; CHECK-NEXT: [[ENTRY:.*]]:10; CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()11; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 212; CHECK-NEXT: [[TMP10:%.*]] = call i64 @llvm.vscale.i64()13; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP10]], 414; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], [[TMP3]]15; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]]16; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[A]], align 417; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <vscale x 4 x float>, ptr [[B]], align 418; CHECK-NEXT: [[TMP4:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD1]]19; CHECK-NEXT: store <vscale x 4 x float> [[TMP4]], ptr [[B]], align 420; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]]21; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY:.*]]22; CHECK: [[FOR_COND_CLEANUP]]:23; CHECK-NEXT: ret void24; CHECK: [[FOR_BODY]]:25; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[N_VEC]], %[[ENTRY]] ]26; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]27; CHECK-NEXT: [[TMP12:%.*]] = load float, ptr [[ARRAYIDX]], align 428; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]29; CHECK-NEXT: [[TMP13:%.*]] = load float, ptr [[ARRAYIDX3]], align 430; CHECK-NEXT: [[MUL4:%.*]] = fmul float [[TMP12]], [[TMP13]]31; CHECK-NEXT: store float [[MUL4]], ptr [[ARRAYIDX3]], align 432; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 133; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[TMP1]]34; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]35;36entry:37 %0 = tail call i64 @llvm.vscale.i64()38 %1 = shl nuw nsw i64 %0, 239 br label %for.body40 41for.cond.cleanup:42 ret void43 44for.body:45 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]46 %arrayidx = getelementptr inbounds nuw float, ptr %a, i64 %indvars.iv47 %2 = load float, ptr %arrayidx, align 448 %arrayidx3 = getelementptr inbounds nuw float, ptr %b, i64 %indvars.iv49 %3 = load float, ptr %arrayidx3, align 450 %mul4 = fmul float %2, %351 store float %mul4, ptr %arrayidx3, align 452 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 153 %exitcond.not = icmp eq i64 %indvars.iv.next, %154 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body55}56 57define void @vscale_mul_8(ptr noalias noundef readonly captures(none) %a, ptr noalias noundef captures(none) %b) #0 {58; CHECK-LABEL: define void @vscale_mul_8(59; CHECK-SAME: ptr noalias noundef readonly captures(none) [[A:%.*]], ptr noalias noundef captures(none) [[B:%.*]]) #[[ATTR0]] {60; CHECK-NEXT: [[ENTRY:.*]]:61; CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()62; CHECK-NEXT: [[MUL1:%.*]] = shl nuw nsw i64 [[TMP0]], 363; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()64; CHECK-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 865; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[MUL1]], [[TMP4]]66; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[MUL1]], [[N_MOD_VF]]67; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()68; CHECK-NEXT: [[TMP10:%.*]] = shl nuw i64 [[TMP9]], 269; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[TMP10]]70; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[A]], align 471; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <vscale x 4 x float>, ptr [[TMP11]], align 472; CHECK-NEXT: [[TMP14:%.*]] = call i64 @llvm.vscale.i64()73; CHECK-NEXT: [[TMP15:%.*]] = shl nuw i64 [[TMP14]], 274; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[TMP15]]75; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[B]], align 476; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP16]], align 477; CHECK-NEXT: [[TMP17:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]78; CHECK-NEXT: [[TMP18:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]79; CHECK-NEXT: store <vscale x 4 x float> [[TMP17]], ptr [[B]], align 480; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP16]], align 481; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[MUL1]], [[N_VEC]]82; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY:.*]]83; CHECK: [[FOR_COND_CLEANUP]]:84; CHECK-NEXT: ret void85; CHECK: [[FOR_BODY]]:86; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[N_VEC]], %[[ENTRY]] ]87; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]88; CHECK-NEXT: [[TMP23:%.*]] = load float, ptr [[ARRAYIDX]], align 489; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]90; CHECK-NEXT: [[TMP24:%.*]] = load float, ptr [[ARRAYIDX4]], align 491; CHECK-NEXT: [[MUL5:%.*]] = fmul float [[TMP23]], [[TMP24]]92; CHECK-NEXT: store float [[MUL5]], ptr [[ARRAYIDX4]], align 493; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 194; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[MUL1]]95; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]96;97entry:98 %0 = tail call i64 @llvm.vscale.i64()99 %mul1 = shl nuw nsw i64 %0, 3100 br label %for.body101 102for.cond.cleanup:103 ret void104 105for.body:106 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]107 %arrayidx = getelementptr inbounds nuw float, ptr %a, i64 %indvars.iv108 %1 = load float, ptr %arrayidx, align 4109 %arrayidx4 = getelementptr inbounds nuw float, ptr %b, i64 %indvars.iv110 %2 = load float, ptr %arrayidx4, align 4111 %mul5 = fmul float %1, %2112 store float %mul5, ptr %arrayidx4, align 4113 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1114 %exitcond.not = icmp eq i64 %indvars.iv.next, %mul1115 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body116}117 118define void @vscale_mul_12(ptr noalias noundef readonly captures(none) %a, ptr noalias noundef captures(none) %b) #0 {119; CHECK-LABEL: define void @vscale_mul_12(120; CHECK-SAME: ptr noalias noundef readonly captures(none) [[A:%.*]], ptr noalias noundef captures(none) [[B:%.*]]) #[[ATTR0]] {121; CHECK-NEXT: [[ENTRY:.*]]:122; CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()123; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i64 [[TMP0]], 12124; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()125; CHECK-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4126; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[MUL1]], [[TMP4]]127; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[MUL1]], [[N_MOD_VF]]128; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]129; CHECK: [[VECTOR_BODY]]:130; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]131; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDEX]]132; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[TMP7]], align 4133; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDEX]]134; CHECK-NEXT: [[WIDE_LOAD4:%.*]] = load <vscale x 4 x float>, ptr [[TMP12]], align 4135; CHECK-NEXT: [[TMP25:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD2]], [[WIDE_LOAD4]]136; CHECK-NEXT: store <vscale x 4 x float> [[TMP25]], ptr [[TMP12]], align 4137; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP4]]138; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]139; CHECK-NEXT: br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]140; CHECK: [[MIDDLE_BLOCK]]:141; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[MUL1]], [[N_VEC]]142; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY:.*]]143; CHECK: [[FOR_COND_CLEANUP]]:144; CHECK-NEXT: ret void145; CHECK: [[FOR_BODY]]:146; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[N_VEC]], %[[MIDDLE_BLOCK]] ]147; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]148; CHECK-NEXT: [[TMP13:%.*]] = load float, ptr [[ARRAYIDX]], align 4149; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]150; CHECK-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX4]], align 4151; CHECK-NEXT: [[MUL5:%.*]] = fmul float [[TMP13]], [[TMP14]]152; CHECK-NEXT: store float [[MUL5]], ptr [[ARRAYIDX4]], align 4153; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1154; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[MUL1]]155; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]156;157entry:158 %0 = tail call i64 @llvm.vscale.i64()159 %mul1 = mul nuw nsw i64 %0, 12160 br label %for.body161 162for.cond.cleanup:163 ret void164 165for.body:166 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]167 %arrayidx = getelementptr inbounds nuw float, ptr %a, i64 %indvars.iv168 %1 = load float, ptr %arrayidx, align 4169 %arrayidx4 = getelementptr inbounds nuw float, ptr %b, i64 %indvars.iv170 %2 = load float, ptr %arrayidx4, align 4171 %mul5 = fmul float %1, %2172 store float %mul5, ptr %arrayidx4, align 4173 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1174 %exitcond.not = icmp eq i64 %indvars.iv.next, %mul1175 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body176}177 178define void @vscale_mul_31(ptr noalias noundef readonly captures(none) %a, ptr noalias noundef captures(none) %b) #0 {179; CHECK-LABEL: define void @vscale_mul_31(180; CHECK-SAME: ptr noalias noundef readonly captures(none) [[A:%.*]], ptr noalias noundef captures(none) [[B:%.*]]) #[[ATTR0]] {181; CHECK-NEXT: [[ENTRY:.*]]:182; CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()183; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i64 [[TMP0]], 31184; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()185; CHECK-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 8186; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[MUL1]], [[TMP4]]187; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[MUL1]], [[N_MOD_VF]]188; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]189; CHECK: [[VECTOR_BODY]]:190; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]191; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDEX]]192; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()193; CHECK-NEXT: [[TMP10:%.*]] = shl nuw i64 [[TMP9]], 2194; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw float, ptr [[TMP7]], i64 [[TMP10]]195; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP7]], align 4196; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <vscale x 4 x float>, ptr [[TMP11]], align 4197; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDEX]]198; CHECK-NEXT: [[TMP14:%.*]] = call i64 @llvm.vscale.i64()199; CHECK-NEXT: [[TMP15:%.*]] = shl nuw i64 [[TMP14]], 2200; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw float, ptr [[TMP12]], i64 [[TMP15]]201; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[TMP12]], align 4202; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP16]], align 4203; CHECK-NEXT: [[TMP17:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]204; CHECK-NEXT: [[TMP18:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]205; CHECK-NEXT: store <vscale x 4 x float> [[TMP17]], ptr [[TMP12]], align 4206; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP16]], align 4207; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP4]]208; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]209; CHECK-NEXT: br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]210; CHECK: [[MIDDLE_BLOCK]]:211; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[MUL1]], [[N_VEC]]212; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY:.*]]213; CHECK: [[FOR_COND_CLEANUP]]:214; CHECK-NEXT: ret void215; CHECK: [[FOR_BODY]]:216; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[N_VEC]], %[[MIDDLE_BLOCK]] ]217; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]218; CHECK-NEXT: [[TMP23:%.*]] = load float, ptr [[ARRAYIDX]], align 4219; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]220; CHECK-NEXT: [[TMP24:%.*]] = load float, ptr [[ARRAYIDX4]], align 4221; CHECK-NEXT: [[MUL5:%.*]] = fmul float [[TMP23]], [[TMP24]]222; CHECK-NEXT: store float [[MUL5]], ptr [[ARRAYIDX4]], align 4223; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1224; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[MUL1]]225; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]226;227entry:228 %0 = tail call i64 @llvm.vscale.i64()229 %mul1 = mul nuw nsw i64 %0, 31230 br label %for.body231 232for.cond.cleanup:233 ret void234 235for.body:236 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]237 %arrayidx = getelementptr inbounds nuw float, ptr %a, i64 %indvars.iv238 %1 = load float, ptr %arrayidx, align 4239 %arrayidx4 = getelementptr inbounds nuw float, ptr %b, i64 %indvars.iv240 %2 = load float, ptr %arrayidx4, align 4241 %mul5 = fmul float %1, %2242 store float %mul5, ptr %arrayidx4, align 4243 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1244 %exitcond.not = icmp eq i64 %indvars.iv.next, %mul1245 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body246}247 248define void @vscale_mul_64(ptr noalias noundef readonly captures(none) %a, ptr noalias noundef captures(none) %b) #0 {249; CHECK-LABEL: define void @vscale_mul_64(250; CHECK-SAME: ptr noalias noundef readonly captures(none) [[A:%.*]], ptr noalias noundef captures(none) [[B:%.*]]) #[[ATTR0]] {251; CHECK-NEXT: [[ENTRY:.*]]:252; CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()253; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i64 [[TMP0]], 64254; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()255; CHECK-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 8256; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[MUL1]], [[TMP4]]257; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[MUL1]], [[N_MOD_VF]]258; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]259; CHECK: [[VECTOR_BODY]]:260; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]261; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDEX]]262; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()263; CHECK-NEXT: [[TMP10:%.*]] = shl nuw i64 [[TMP9]], 2264; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw float, ptr [[TMP7]], i64 [[TMP10]]265; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP7]], align 4266; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <vscale x 4 x float>, ptr [[TMP11]], align 4267; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDEX]]268; CHECK-NEXT: [[TMP14:%.*]] = call i64 @llvm.vscale.i64()269; CHECK-NEXT: [[TMP15:%.*]] = shl nuw i64 [[TMP14]], 2270; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw float, ptr [[TMP12]], i64 [[TMP15]]271; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[TMP12]], align 4272; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP16]], align 4273; CHECK-NEXT: [[TMP17:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]274; CHECK-NEXT: [[TMP18:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]275; CHECK-NEXT: store <vscale x 4 x float> [[TMP17]], ptr [[TMP12]], align 4276; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP16]], align 4277; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP4]]278; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]279; CHECK-NEXT: br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]280; CHECK: [[MIDDLE_BLOCK]]:281; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[MUL1]], [[N_VEC]]282; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY:.*]]283; CHECK: [[FOR_COND_CLEANUP]]:284; CHECK-NEXT: ret void285; CHECK: [[FOR_BODY]]:286; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[N_VEC]], %[[MIDDLE_BLOCK]] ]287; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]288; CHECK-NEXT: [[TMP23:%.*]] = load float, ptr [[ARRAYIDX]], align 4289; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]290; CHECK-NEXT: [[TMP24:%.*]] = load float, ptr [[ARRAYIDX4]], align 4291; CHECK-NEXT: [[MUL5:%.*]] = fmul float [[TMP23]], [[TMP24]]292; CHECK-NEXT: store float [[MUL5]], ptr [[ARRAYIDX4]], align 4293; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1294; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[MUL1]]295; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]296;297entry:298 %0 = tail call i64 @llvm.vscale.i64()299 %mul1 = mul nuw nsw i64 %0, 64300 br label %for.body301 302for.cond.cleanup:303 ret void304 305for.body:306 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]307 %arrayidx = getelementptr inbounds nuw float, ptr %a, i64 %indvars.iv308 %1 = load float, ptr %arrayidx, align 4309 %arrayidx4 = getelementptr inbounds nuw float, ptr %b, i64 %indvars.iv310 %2 = load float, ptr %arrayidx4, align 4311 %mul5 = fmul float %1, %2312 store float %mul5, ptr %arrayidx4, align 4313 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1314 %exitcond.not = icmp eq i64 %indvars.iv.next, %mul1315 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body316}317 318; The loop's trip count is unknown at compiler time if its calculation relies on319; overflow.320define void @trip_count_with_overflow(ptr noalias noundef readonly captures(none) %a, ptr noalias noundef captures(none) %b) #1 {321; CHECK-LABEL: define void @trip_count_with_overflow(322; CHECK-SAME: ptr noalias noundef readonly captures(none) [[A:%.*]], ptr noalias noundef captures(none) [[B:%.*]]) #[[ATTR1:[0-9]+]] {323; CHECK-NEXT: [[ENTRY:.*]]:324; CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()325; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2326; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i64 [[TMP0]], 3327; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], [[TMP3]]328; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]329; CHECK: [[VECTOR_PH]]:330; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()331; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 8332; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], [[TMP5]]333; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]]334; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]335; CHECK: [[VECTOR_BODY]]:336; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]337; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDEX]]338; CHECK-NEXT: [[TMP10:%.*]] = call i64 @llvm.vscale.i64()339; CHECK-NEXT: [[TMP11:%.*]] = shl nuw i64 [[TMP10]], 2340; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw float, ptr [[TMP8]], i64 [[TMP11]]341; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP8]], align 4342; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <vscale x 4 x float>, ptr [[TMP12]], align 4343; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDEX]]344; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vscale.i64()345; CHECK-NEXT: [[TMP16:%.*]] = shl nuw i64 [[TMP15]], 2346; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i64 [[TMP16]]347; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[TMP13]], align 4348; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP17]], align 4349; CHECK-NEXT: [[TMP18:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]350; CHECK-NEXT: [[TMP19:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]351; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP13]], align 4352; CHECK-NEXT: store <vscale x 4 x float> [[TMP19]], ptr [[TMP17]], align 4353; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP5]]354; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]355; CHECK-NEXT: br i1 [[TMP23]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]356; CHECK: [[MIDDLE_BLOCK]]:357; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]]358; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP:.*]], label %[[SCALAR_PH]]359; CHECK: [[SCALAR_PH]]:360; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]361; CHECK-NEXT: br label %[[FOR_BODY:.*]]362; CHECK: [[FOR_COND_CLEANUP]]:363; CHECK-NEXT: ret void364; CHECK: [[FOR_BODY]]:365; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]366; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]367; CHECK-NEXT: [[TMP24:%.*]] = load float, ptr [[ARRAYIDX]], align 4368; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]369; CHECK-NEXT: [[TMP25:%.*]] = load float, ptr [[ARRAYIDX3]], align 4370; CHECK-NEXT: [[MUL4:%.*]] = fmul float [[TMP24]], [[TMP25]]371; CHECK-NEXT: store float [[MUL4]], ptr [[ARRAYIDX3]], align 4372; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1373; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[TMP1]]374; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]375;376entry:377 %0 = tail call i64 @llvm.vscale.i64()378 %1 = shl i64 %0, 2379 br label %for.body380 381for.cond.cleanup:382 ret void383 384for.body:385 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]386 %arrayidx = getelementptr inbounds nuw float, ptr %a, i64 %indvars.iv387 %2 = load float, ptr %arrayidx, align 4388 %arrayidx3 = getelementptr inbounds nuw float, ptr %b, i64 %indvars.iv389 %3 = load float, ptr %arrayidx3, align 4390 %mul4 = fmul float %2, %3391 store float %mul4, ptr %arrayidx3, align 4392 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1393 %exitcond.not = icmp eq i64 %indvars.iv.next, %1394 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body395}396 397; The known component of ElementCount is a 32-bit value.398define void @trip_count_too_big_for_element_count(ptr noalias noundef readonly captures(none) %a, ptr noalias noundef captures(none) %b) #0 {399; CHECK-LABEL: define void @trip_count_too_big_for_element_count(400; CHECK-SAME: ptr noalias noundef readonly captures(none) [[A:%.*]], ptr noalias noundef captures(none) [[B:%.*]]) #[[ATTR0]] {401; CHECK-NEXT: [[ENTRY:.*]]:402; CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()403; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 32404; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()405; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 8406; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], [[TMP5]]407; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]]408; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]409; CHECK: [[VECTOR_BODY]]:410; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]411; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDEX]]412; CHECK-NEXT: [[TMP10:%.*]] = call i64 @llvm.vscale.i64()413; CHECK-NEXT: [[TMP11:%.*]] = shl nuw i64 [[TMP10]], 2414; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw float, ptr [[TMP8]], i64 [[TMP11]]415; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP8]], align 4416; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <vscale x 4 x float>, ptr [[TMP12]], align 4417; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDEX]]418; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vscale.i64()419; CHECK-NEXT: [[TMP16:%.*]] = shl nuw i64 [[TMP15]], 2420; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i64 [[TMP16]]421; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[TMP13]], align 4422; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP17]], align 4423; CHECK-NEXT: [[TMP18:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]424; CHECK-NEXT: [[TMP19:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]425; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP13]], align 4426; CHECK-NEXT: store <vscale x 4 x float> [[TMP19]], ptr [[TMP17]], align 4427; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP5]]428; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]429; CHECK-NEXT: br i1 [[TMP23]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]430; CHECK: [[MIDDLE_BLOCK]]:431; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]]432; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY:.*]]433; CHECK: [[FOR_COND_CLEANUP]]:434; CHECK-NEXT: ret void435; CHECK: [[FOR_BODY]]:436; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[N_VEC]], %[[MIDDLE_BLOCK]] ]437; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]438; CHECK-NEXT: [[TMP24:%.*]] = load float, ptr [[ARRAYIDX]], align 4439; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]440; CHECK-NEXT: [[TMP25:%.*]] = load float, ptr [[ARRAYIDX3]], align 4441; CHECK-NEXT: [[MUL4:%.*]] = fmul float [[TMP24]], [[TMP25]]442; CHECK-NEXT: store float [[MUL4]], ptr [[ARRAYIDX3]], align 4443; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1444; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[TMP1]]445; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]446;447entry:448 %0 = tail call i64 @llvm.vscale.i64()449 %1 = shl nsw nuw i64 %0, 32450 br label %for.body451 452for.cond.cleanup:453 ret void454 455for.body:456 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]457 %arrayidx = getelementptr inbounds nuw float, ptr %a, i64 %indvars.iv458 %2 = load float, ptr %arrayidx, align 4459 %arrayidx3 = getelementptr inbounds nuw float, ptr %b, i64 %indvars.iv460 %3 = load float, ptr %arrayidx3, align 4461 %mul4 = fmul float %2, %3462 store float %mul4, ptr %arrayidx3, align 4463 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1464 %exitcond.not = icmp eq i64 %indvars.iv.next, %1465 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body466}467 468declare i64 @llvm.vscale.i64()469 470attributes #0 = { vscale_range(1,16) "target-features"="+sve" }471attributes #1 = { "target-features"="+sve" }472;.473; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}474; CHECK: [[META1]] = !{!"llvm.loop.unroll.runtime.disable"}475; CHECK: [[META2]] = !{!"llvm.loop.isvectorized", i32 1}476; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}477; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META2]], [[META1]]}478; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}479; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META2]], [[META1]]}480; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}481; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META2]], [[META1]]}482; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}483; CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META2]], [[META1]]}484; CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}485; CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META2]], [[META1]]}486; CHECK: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}487;.488