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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "^scalar.ph:" --version 52; RUN: opt -p loop-vectorize -S %s | FileCheck %s3 4target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"5target triple = "arm64-apple-macosx"6 7define void @test_complex_add_float(ptr %res, ptr noalias %A, ptr noalias %B, i64 %N) {8; CHECK-LABEL: define void @test_complex_add_float(9; CHECK-SAME: ptr [[RES:%.*]], ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[N:%.*]]) {10; CHECK-NEXT: [[ENTRY:.*:]]11; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 812; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]13; CHECK: [[VECTOR_PH]]:14; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 815; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]16; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]17; CHECK: [[VECTOR_BODY]]:18; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]19; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 420; CHECK-NEXT: [[GEP_A_0:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[A]], i64 [[INDEX]]21; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[A]], i64 [[TMP1]]22; CHECK-NEXT: [[GEP_B_0:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[B]], i64 [[INDEX]]23; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[B]], i64 [[TMP1]]24; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x float>, ptr [[GEP_A_0]], align 425; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x float> [[WIDE_VEC]], <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>26; CHECK-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x float> [[WIDE_VEC]], <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>27; CHECK-NEXT: [[WIDE_VEC2:%.*]] = load <8 x float>, ptr [[TMP3]], align 428; CHECK-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <8 x float> [[WIDE_VEC2]], <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>29; CHECK-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <8 x float> [[WIDE_VEC2]], <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>30; CHECK-NEXT: [[WIDE_VEC5:%.*]] = load <8 x float>, ptr [[GEP_B_0]], align 431; CHECK-NEXT: [[STRIDED_VEC6:%.*]] = shufflevector <8 x float> [[WIDE_VEC5]], <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>32; CHECK-NEXT: [[STRIDED_VEC7:%.*]] = shufflevector <8 x float> [[WIDE_VEC5]], <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>33; CHECK-NEXT: [[WIDE_VEC8:%.*]] = load <8 x float>, ptr [[TMP5]], align 434; CHECK-NEXT: [[STRIDED_VEC9:%.*]] = shufflevector <8 x float> [[WIDE_VEC8]], <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>35; CHECK-NEXT: [[STRIDED_VEC10:%.*]] = shufflevector <8 x float> [[WIDE_VEC8]], <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>36; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[STRIDED_VEC]], [[STRIDED_VEC6]]37; CHECK-NEXT: [[TMP7:%.*]] = fadd <4 x float> [[STRIDED_VEC3]], [[STRIDED_VEC9]]38; CHECK-NEXT: [[TMP8:%.*]] = fadd <4 x float> [[STRIDED_VEC1]], [[STRIDED_VEC7]]39; CHECK-NEXT: [[TMP9:%.*]] = fadd <4 x float> [[STRIDED_VEC4]], [[STRIDED_VEC10]]40; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[RES]], i64 [[INDEX]]41; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[RES]], i64 [[TMP1]]42; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <4 x float> [[TMP6]], <4 x float> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>43; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x float> [[TMP12]], <8 x float> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>44; CHECK-NEXT: store <8 x float> [[INTERLEAVED_VEC]], ptr [[TMP10]], align 445; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <4 x float> [[TMP7]], <4 x float> [[TMP9]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>46; CHECK-NEXT: [[INTERLEAVED_VEC11:%.*]] = shufflevector <8 x float> [[TMP13]], <8 x float> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>47; CHECK-NEXT: store <8 x float> [[INTERLEAVED_VEC11]], ptr [[TMP11]], align 448; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 849; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]50; CHECK-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]51; CHECK: [[MIDDLE_BLOCK]]:52; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]53; CHECK-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]54; CHECK: [[SCALAR_PH]]:55;56entry:57 br label %loop58 59loop:60 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]61 %gep.A.0 = getelementptr inbounds nuw { float, float }, ptr %A, i64 %iv62 %gep.B.0 = getelementptr inbounds nuw { float, float }, ptr %B, i64 %iv63 %l.A.0 = load float, ptr %gep.A.0, align 464 %gep.A.1 = getelementptr inbounds nuw i8, ptr %gep.A.0, i64 465 %l.A.1 = load float, ptr %gep.A.1, align 466 %l.B.0 = load float, ptr %gep.B.0, align 467 %add.0 = fadd float %l.A.0, %l.B.068 %gep.B.1 = getelementptr inbounds nuw i8, ptr %gep.B.0, i64 469 %l.B.1 = load float, ptr %gep.B.1, align 470 %add.1 = fadd float %l.A.1, %l.B.171 %gep.res.0 = getelementptr inbounds nuw { float, float }, ptr %res, i64 %iv72 store float %add.0, ptr %gep.res.0, align 473 %gep.res.1 = getelementptr inbounds nuw i8, ptr %gep.res.0, i64 474 store float %add.1, ptr %gep.res.1, align 475 %iv.next = add nuw nsw i64 %iv, 176 %ec = icmp eq i64 %iv.next, %N77 br i1 %ec, label %exit, label %loop78 79exit:80 ret void81}82 83define void @test_complex_add_double(ptr %res, ptr noalias %A, ptr noalias %B, i64 %N) {84; CHECK-LABEL: define void @test_complex_add_double(85; CHECK-SAME: ptr [[RES:%.*]], ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[N:%.*]]) {86; CHECK-NEXT: [[ENTRY:.*:]]87; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 488; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]89; CHECK: [[VECTOR_PH]]:90; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 491; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]92; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]93; CHECK: [[VECTOR_BODY]]:94; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]95; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 196; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw { double, double }, ptr [[A]], i64 [[INDEX]]97; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw { double, double }, ptr [[A]], i64 [[TMP1]]98; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw { double, double }, ptr [[B]], i64 [[INDEX]]99; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw { double, double }, ptr [[B]], i64 [[TMP1]]100; CHECK-NEXT: [[STRIDED_VEC1:%.*]] = load <2 x double>, ptr [[TMP2]], align 4101; CHECK-NEXT: [[STRIDED_VEC5:%.*]] = load <2 x double>, ptr [[TMP3]], align 4102; CHECK-NEXT: [[STRIDED_VEC7:%.*]] = load <2 x double>, ptr [[TMP4]], align 4103; CHECK-NEXT: [[STRIDED_VEC11:%.*]] = load <2 x double>, ptr [[TMP5]], align 4104; CHECK-NEXT: [[TMP8:%.*]] = fadd <2 x double> [[STRIDED_VEC1]], [[STRIDED_VEC7]]105; CHECK-NEXT: [[TMP15:%.*]] = fadd <2 x double> [[STRIDED_VEC5]], [[STRIDED_VEC11]]106; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw { double, double }, ptr [[RES]], i64 [[INDEX]]107; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw { double, double }, ptr [[RES]], i64 [[TMP1]]108; CHECK-NEXT: store <2 x double> [[TMP8]], ptr [[TMP10]], align 4109; CHECK-NEXT: store <2 x double> [[TMP15]], ptr [[TMP11]], align 4110; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2111; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]112; CHECK-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]113; CHECK: [[MIDDLE_BLOCK]]:114; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]115; CHECK-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]116; CHECK: [[SCALAR_PH]]:117;118entry:119 br label %loop120 121loop:122 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]123 %gep.A.0 = getelementptr inbounds nuw { double, double }, ptr %A, i64 %iv124 %gep.B.0 = getelementptr inbounds nuw { double, double }, ptr %B, i64 %iv125 %l.A.0 = load double, ptr %gep.A.0, align 4126 %gep.A.1 = getelementptr inbounds nuw i8, ptr %gep.A.0, i64 8127 %l.A.1 = load double, ptr %gep.A.1, align 4128 %l.B.0 = load double, ptr %gep.B.0, align 4129 %add.0 = fadd double %l.A.0, %l.B.0130 %gep.B.1 = getelementptr inbounds nuw i8, ptr %gep.B.0, i64 8131 %l.B.1 = load double, ptr %gep.B.1, align 4132 %add.1 = fadd double %l.A.1, %l.B.1133 %gep.res.0 = getelementptr inbounds nuw { double, double }, ptr %res, i64 %iv134 store double %add.0, ptr %gep.res.0, align 4135 %gep.res.1 = getelementptr inbounds nuw i8, ptr %gep.res.0, i64 8136 store double %add.1, ptr %gep.res.1, align 4137 %iv.next = add nuw nsw i64 %iv, 1138 %ec = icmp eq i64 %iv.next, %N139 br i1 %ec, label %exit, label %loop140 141exit:142 ret void143}144 145define void @test_interleave_store_one_constant(ptr noalias %src, ptr noalias %dst, i64 %n) #0 {146; CHECK-LABEL: define void @test_interleave_store_one_constant(147; CHECK-SAME: ptr noalias [[SRC:%.*]], ptr noalias [[DST:%.*]], i64 [[N:%.*]]) #[[ATTR0:[0-9]+]] {148; CHECK-NEXT: [[ITER_CHECK:.*]]:149; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1150; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2151; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]152; CHECK: [[VECTOR_SCEVCHECK]]:153; CHECK-NEXT: [[MUL1:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]])154; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i64, i1 } [[MUL1]], 0155; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i64, i1 } [[MUL1]], 1156; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[DST]], i64 [[MUL_RESULT]]157; CHECK-NEXT: [[TMP3:%.*]] = icmp ult ptr [[TMP2]], [[DST]]158; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[MUL_OVERFLOW]]159; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 8160; CHECK-NEXT: [[MUL2:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]])161; CHECK-NEXT: [[MUL_RESULT3:%.*]] = extractvalue { i64, i1 } [[MUL2]], 0162; CHECK-NEXT: [[MUL_OVERFLOW4:%.*]] = extractvalue { i64, i1 } [[MUL2]], 1163; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 [[MUL_RESULT3]]164; CHECK-NEXT: [[TMP7:%.*]] = icmp ult ptr [[TMP6]], [[SCEVGEP]]165; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP7]], [[MUL_OVERFLOW4]]166; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP4]], [[TMP8]]167; CHECK-NEXT: br i1 [[TMP9]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]168; CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:169; CHECK-NEXT: [[MIN_ITERS_CHECK5:%.*]] = icmp ult i64 [[TMP0]], 8170; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK5]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]171; CHECK: [[VECTOR_PH]]:172; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 8173; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]174; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]175; CHECK: [[VECTOR_BODY]]:176; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]177; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 2178; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 4179; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], 6180; CHECK-NEXT: [[TMP13:%.*]] = getelementptr double, ptr [[SRC]], i64 [[INDEX]]181; CHECK-NEXT: [[TMP15:%.*]] = getelementptr double, ptr [[TMP13]], i64 2182; CHECK-NEXT: [[TMP16:%.*]] = getelementptr double, ptr [[TMP13]], i64 4183; CHECK-NEXT: [[TMP17:%.*]] = getelementptr double, ptr [[TMP13]], i64 6184; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP13]], align 8185; CHECK-NEXT: [[WIDE_LOAD6:%.*]] = load <2 x double>, ptr [[TMP15]], align 8186; CHECK-NEXT: [[WIDE_LOAD7:%.*]] = load <2 x double>, ptr [[TMP16]], align 8187; CHECK-NEXT: [[WIDE_LOAD8:%.*]] = load <2 x double>, ptr [[TMP17]], align 8188; CHECK-NEXT: [[TMP18:%.*]] = fmul <2 x double> [[WIDE_LOAD]], splat (double 5.000000e+00)189; CHECK-NEXT: [[TMP19:%.*]] = fmul <2 x double> [[WIDE_LOAD6]], splat (double 5.000000e+00)190; CHECK-NEXT: [[TMP20:%.*]] = fmul <2 x double> [[WIDE_LOAD7]], splat (double 5.000000e+00)191; CHECK-NEXT: [[TMP21:%.*]] = fmul <2 x double> [[WIDE_LOAD8]], splat (double 5.000000e+00)192; CHECK-NEXT: [[TMP22:%.*]] = getelementptr [2 x double], ptr [[DST]], i64 [[INDEX]]193; CHECK-NEXT: [[TMP23:%.*]] = getelementptr [2 x double], ptr [[DST]], i64 [[TMP10]]194; CHECK-NEXT: [[TMP24:%.*]] = getelementptr [2 x double], ptr [[DST]], i64 [[TMP11]]195; CHECK-NEXT: [[TMP25:%.*]] = getelementptr [2 x double], ptr [[DST]], i64 [[TMP12]]196; CHECK-NEXT: [[TMP26:%.*]] = shufflevector <2 x double> [[TMP18]], <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>197; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x double> [[TMP26]], <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>198; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC]], ptr [[TMP22]], align 8199; CHECK-NEXT: [[TMP27:%.*]] = shufflevector <2 x double> [[TMP19]], <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>200; CHECK-NEXT: [[INTERLEAVED_VEC9:%.*]] = shufflevector <4 x double> [[TMP27]], <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>201; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC9]], ptr [[TMP23]], align 8202; CHECK-NEXT: [[TMP28:%.*]] = shufflevector <2 x double> [[TMP20]], <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>203; CHECK-NEXT: [[INTERLEAVED_VEC10:%.*]] = shufflevector <4 x double> [[TMP28]], <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>204; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC10]], ptr [[TMP24]], align 8205; CHECK-NEXT: [[TMP29:%.*]] = shufflevector <2 x double> [[TMP21]], <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>206; CHECK-NEXT: [[INTERLEAVED_VEC11:%.*]] = shufflevector <4 x double> [[TMP29]], <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>207; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC11]], ptr [[TMP25]], align 8208; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8209; CHECK-NEXT: [[TMP30:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]210; CHECK-NEXT: br i1 [[TMP30]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]211; CHECK: [[MIDDLE_BLOCK]]:212; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]213; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]214; CHECK: [[VEC_EPILOG_ITER_CHECK]]:215; CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[N_MOD_VF]], 2216; CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF7:![0-9]+]]217; CHECK: [[VEC_EPILOG_PH]]:218; CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]219; CHECK-NEXT: [[N_MOD_VF12:%.*]] = urem i64 [[TMP0]], 2220; CHECK-NEXT: [[N_VEC13:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF12]]221; CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]222; CHECK: [[VEC_EPILOG_VECTOR_BODY]]:223; CHECK-NEXT: [[INDEX14:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT17:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]224; CHECK-NEXT: [[TMP31:%.*]] = getelementptr double, ptr [[SRC]], i64 [[INDEX14]]225; CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <2 x double>, ptr [[TMP31]], align 8226; CHECK-NEXT: [[TMP33:%.*]] = fmul <2 x double> [[WIDE_LOAD15]], splat (double 5.000000e+00)227; CHECK-NEXT: [[TMP34:%.*]] = getelementptr [2 x double], ptr [[DST]], i64 [[INDEX14]]228; CHECK-NEXT: [[TMP35:%.*]] = shufflevector <2 x double> [[TMP33]], <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>229; CHECK-NEXT: [[INTERLEAVED_VEC16:%.*]] = shufflevector <4 x double> [[TMP35]], <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>230; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC16]], ptr [[TMP34]], align 8231; CHECK-NEXT: [[INDEX_NEXT17]] = add nuw i64 [[INDEX14]], 2232; CHECK-NEXT: [[TMP36:%.*]] = icmp eq i64 [[INDEX_NEXT17]], [[N_VEC13]]233; CHECK-NEXT: br i1 [[TMP36]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]234; CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:235; CHECK-NEXT: [[CMP_N18:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC13]]236; CHECK-NEXT: br i1 [[CMP_N18]], label %[[EXIT]], label %[[VEC_EPILOG_SCALAR_PH]]237; CHECK: [[VEC_EPILOG_SCALAR_PH]]:238; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC13]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_SCEVCHECK]] ], [ 0, %[[ITER_CHECK]] ]239; CHECK-NEXT: br label %[[LOOP:.*]]240; CHECK: [[LOOP]]:241; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]242; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr double, ptr [[SRC]], i64 [[IV]]243; CHECK-NEXT: [[L:%.*]] = load double, ptr [[GEP_SRC]], align 8244; CHECK-NEXT: [[MUL:%.*]] = fmul double [[L]], 5.000000e+00245; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr [2 x double], ptr [[DST]], i64 [[IV]]246; CHECK-NEXT: store double [[MUL]], ptr [[GEP_DST]], align 8247; CHECK-NEXT: [[GEP_DST_1:%.*]] = getelementptr [2 x double], ptr [[DST]], i64 [[IV]], i32 1248; CHECK-NEXT: store double 0.000000e+00, ptr [[GEP_DST_1]], align 8249; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1250; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]]251; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP9:![0-9]+]]252; CHECK: [[EXIT]]:253; CHECK-NEXT: ret void254;255entry:256 br label %loop257 258loop: ; preds = %loop, %entry259 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]260 %gep.src = getelementptr double, ptr %src, i64 %iv261 %l = load double, ptr %gep.src, align 8262 %mul = fmul double %l, 5.000000e+00263 %gep.dst = getelementptr [2 x double], ptr %dst, i64 %iv264 store double %mul, ptr %gep.dst, align 8265 %gep.dst.1 = getelementptr [2 x double], ptr %dst, i64 %iv, i32 1266 store double 0.000000e+00, ptr %gep.dst.1, align 8267 %iv.next = add i64 %iv, 1268 %ec = icmp eq i64 %iv, %n269 br i1 %ec, label %exit, label %loop270 271exit:272 ret void273}274 275define void @single_fmul_used_by_each_member(ptr noalias %A, ptr noalias %B, ptr noalias %C, i64 %n) #0 {276; CHECK-LABEL: define void @single_fmul_used_by_each_member(277; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {278; CHECK-NEXT: [[ITER_CHECK:.*]]:279; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1280; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2281; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]282; CHECK: [[VECTOR_SCEVCHECK]]:283; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B]], i64 8284; CHECK-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]])285; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i64, i1 } [[MUL]], 0286; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i64, i1 } [[MUL]], 1287; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 [[MUL_RESULT]]288; CHECK-NEXT: [[TMP3:%.*]] = icmp ult ptr [[TMP2]], [[SCEVGEP]]289; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[MUL_OVERFLOW]]290; CHECK-NEXT: [[MUL1:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]])291; CHECK-NEXT: [[MUL_RESULT2:%.*]] = extractvalue { i64, i1 } [[MUL1]], 0292; CHECK-NEXT: [[MUL_OVERFLOW3:%.*]] = extractvalue { i64, i1 } [[MUL1]], 1293; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[B]], i64 [[MUL_RESULT2]]294; CHECK-NEXT: [[TMP7:%.*]] = icmp ult ptr [[TMP6]], [[B]]295; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP7]], [[MUL_OVERFLOW3]]296; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr [[C]], i64 8297; CHECK-NEXT: [[MUL5:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]])298; CHECK-NEXT: [[MUL_RESULT6:%.*]] = extractvalue { i64, i1 } [[MUL5]], 0299; CHECK-NEXT: [[MUL_OVERFLOW7:%.*]] = extractvalue { i64, i1 } [[MUL5]], 1300; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[SCEVGEP4]], i64 [[MUL_RESULT6]]301; CHECK-NEXT: [[TMP11:%.*]] = icmp ult ptr [[TMP10]], [[SCEVGEP4]]302; CHECK-NEXT: [[TMP12:%.*]] = or i1 [[TMP11]], [[MUL_OVERFLOW7]]303; CHECK-NEXT: [[MUL8:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]])304; CHECK-NEXT: [[MUL_RESULT9:%.*]] = extractvalue { i64, i1 } [[MUL8]], 0305; CHECK-NEXT: [[MUL_OVERFLOW10:%.*]] = extractvalue { i64, i1 } [[MUL8]], 1306; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[C]], i64 [[MUL_RESULT9]]307; CHECK-NEXT: [[TMP15:%.*]] = icmp ult ptr [[TMP14]], [[C]]308; CHECK-NEXT: [[TMP16:%.*]] = or i1 [[TMP15]], [[MUL_OVERFLOW10]]309; CHECK-NEXT: [[TMP17:%.*]] = or i1 [[TMP4]], [[TMP8]]310; CHECK-NEXT: [[TMP18:%.*]] = or i1 [[TMP17]], [[TMP12]]311; CHECK-NEXT: [[TMP19:%.*]] = or i1 [[TMP18]], [[TMP16]]312; CHECK-NEXT: br i1 [[TMP19]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]313; CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:314; CHECK-NEXT: [[MIN_ITERS_CHECK11:%.*]] = icmp ult i64 [[TMP0]], 8315; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK11]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]316; CHECK: [[VECTOR_PH]]:317; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 8318; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]319; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]320; CHECK: [[VECTOR_BODY]]:321; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]322; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[INDEX]], 2323; CHECK-NEXT: [[TMP21:%.*]] = add i64 [[INDEX]], 4324; CHECK-NEXT: [[TMP22:%.*]] = add i64 [[INDEX]], 6325; CHECK-NEXT: [[TMP23:%.*]] = getelementptr double, ptr [[A]], i64 [[INDEX]]326; CHECK-NEXT: [[TMP25:%.*]] = getelementptr double, ptr [[TMP23]], i64 2327; CHECK-NEXT: [[TMP26:%.*]] = getelementptr double, ptr [[TMP23]], i64 4328; CHECK-NEXT: [[TMP27:%.*]] = getelementptr double, ptr [[TMP23]], i64 6329; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP23]], align 8330; CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <2 x double>, ptr [[TMP25]], align 8331; CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <2 x double>, ptr [[TMP26]], align 8332; CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <2 x double>, ptr [[TMP27]], align 8333; CHECK-NEXT: [[TMP28:%.*]] = fmul <2 x double> [[WIDE_LOAD]], splat (double 5.000000e+00)334; CHECK-NEXT: [[TMP29:%.*]] = fmul <2 x double> [[WIDE_LOAD12]], splat (double 5.000000e+00)335; CHECK-NEXT: [[TMP30:%.*]] = fmul <2 x double> [[WIDE_LOAD13]], splat (double 5.000000e+00)336; CHECK-NEXT: [[TMP31:%.*]] = fmul <2 x double> [[WIDE_LOAD14]], splat (double 5.000000e+00)337; CHECK-NEXT: [[TMP32:%.*]] = getelementptr { double, double }, ptr [[B]], i64 [[INDEX]]338; CHECK-NEXT: [[TMP33:%.*]] = getelementptr { double, double }, ptr [[B]], i64 [[TMP20]]339; CHECK-NEXT: [[TMP34:%.*]] = getelementptr { double, double }, ptr [[B]], i64 [[TMP21]]340; CHECK-NEXT: [[TMP35:%.*]] = getelementptr { double, double }, ptr [[B]], i64 [[TMP22]]341; CHECK-NEXT: [[TMP36:%.*]] = shufflevector <2 x double> [[TMP28]], <2 x double> [[TMP28]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>342; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x double> [[TMP36]], <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>343; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC]], ptr [[TMP32]], align 8344; CHECK-NEXT: [[TMP37:%.*]] = shufflevector <2 x double> [[TMP29]], <2 x double> [[TMP29]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>345; CHECK-NEXT: [[INTERLEAVED_VEC15:%.*]] = shufflevector <4 x double> [[TMP37]], <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>346; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC15]], ptr [[TMP33]], align 8347; CHECK-NEXT: [[TMP38:%.*]] = shufflevector <2 x double> [[TMP30]], <2 x double> [[TMP30]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>348; CHECK-NEXT: [[INTERLEAVED_VEC16:%.*]] = shufflevector <4 x double> [[TMP38]], <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>349; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC16]], ptr [[TMP34]], align 8350; CHECK-NEXT: [[TMP39:%.*]] = shufflevector <2 x double> [[TMP31]], <2 x double> [[TMP31]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>351; CHECK-NEXT: [[INTERLEAVED_VEC17:%.*]] = shufflevector <4 x double> [[TMP39]], <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>352; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC17]], ptr [[TMP35]], align 8353; CHECK-NEXT: [[TMP40:%.*]] = getelementptr { double, double }, ptr [[C]], i64 [[INDEX]]354; CHECK-NEXT: [[TMP41:%.*]] = getelementptr { double, double }, ptr [[C]], i64 [[TMP20]]355; CHECK-NEXT: [[TMP42:%.*]] = getelementptr { double, double }, ptr [[C]], i64 [[TMP21]]356; CHECK-NEXT: [[TMP43:%.*]] = getelementptr { double, double }, ptr [[C]], i64 [[TMP22]]357; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC]], ptr [[TMP40]], align 8358; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC15]], ptr [[TMP41]], align 8359; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC16]], ptr [[TMP42]], align 8360; CHECK-NEXT: store <4 x double> [[INTERLEAVED_VEC17]], ptr [[TMP43]], align 8361; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8362; CHECK-NEXT: [[TMP44:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]363; CHECK-NEXT: br i1 [[TMP44]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]364; CHECK: [[MIDDLE_BLOCK]]:365; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]366; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]367; CHECK: [[VEC_EPILOG_ITER_CHECK]]:368; CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[N_MOD_VF]], 2369; CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF7]]370; CHECK: [[VEC_EPILOG_PH]]:371; CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]372; CHECK-NEXT: [[N_MOD_VF22:%.*]] = urem i64 [[TMP0]], 2373; CHECK-NEXT: [[N_VEC23:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF22]]374; CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]375; CHECK: [[VEC_EPILOG_VECTOR_BODY]]:376; CHECK-NEXT: [[INDEX24:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT25:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]377; CHECK-NEXT: [[TMP45:%.*]] = getelementptr double, ptr [[A]], i64 [[INDEX24]]378; CHECK-NEXT: [[TMP47:%.*]] = load double, ptr [[TMP45]], align 8379; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x double> poison, double [[TMP47]], i64 0380; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x double> [[BROADCAST_SPLATINSERT]], <2 x double> poison, <2 x i32> zeroinitializer381; CHECK-NEXT: [[TMP48:%.*]] = fmul <2 x double> [[BROADCAST_SPLAT]], splat (double 5.000000e+00)382; CHECK-NEXT: [[TMP49:%.*]] = getelementptr { double, double }, ptr [[B]], i64 [[INDEX24]]383; CHECK-NEXT: store <2 x double> [[TMP48]], ptr [[TMP49]], align 8384; CHECK-NEXT: [[TMP50:%.*]] = getelementptr { double, double }, ptr [[C]], i64 [[INDEX24]]385; CHECK-NEXT: store <2 x double> [[TMP48]], ptr [[TMP50]], align 8386; CHECK-NEXT: [[INDEX_NEXT25]] = add nuw i64 [[INDEX24]], 1387; CHECK-NEXT: [[TMP51:%.*]] = icmp eq i64 [[INDEX_NEXT25]], [[N_VEC23]]388; CHECK-NEXT: br i1 [[TMP51]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]389; CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:390; CHECK-NEXT: [[CMP_N26:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC23]]391; CHECK-NEXT: br i1 [[CMP_N26]], label %[[EXIT]], label %[[VEC_EPILOG_SCALAR_PH]]392; CHECK: [[VEC_EPILOG_SCALAR_PH]]:393; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC23]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_SCEVCHECK]] ], [ 0, %[[ITER_CHECK]] ]394; CHECK-NEXT: br label %[[LOOP:.*]]395; CHECK: [[LOOP]]:396; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]397; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr double, ptr [[A]], i64 [[IV]]398; CHECK-NEXT: [[L:%.*]] = load double, ptr [[GEP_A]], align 8399; CHECK-NEXT: [[DIV:%.*]] = fmul double [[L]], 5.000000e+00400; CHECK-NEXT: [[GEP_B_1:%.*]] = getelementptr { double, double }, ptr [[B]], i64 [[IV]], i32 1401; CHECK-NEXT: store double [[DIV]], ptr [[GEP_B_1]], align 8402; CHECK-NEXT: [[GEP_C_1:%.*]] = getelementptr { double, double }, ptr [[C]], i64 [[IV]], i32 1403; CHECK-NEXT: store double [[DIV]], ptr [[GEP_C_1]], align 8404; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr { double, double }, ptr [[B]], i64 [[IV]]405; CHECK-NEXT: store double [[DIV]], ptr [[GEP_B]], align 8406; CHECK-NEXT: [[GEP_C:%.*]] = getelementptr { double, double }, ptr [[C]], i64 [[IV]]407; CHECK-NEXT: store double [[DIV]], ptr [[GEP_C]], align 8408; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1409; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]]410; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP12:![0-9]+]]411; CHECK: [[EXIT]]:412; CHECK-NEXT: ret void413;414entry:415 br label %loop416 417loop:418 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]419 %gep.A = getelementptr double, ptr %A, i64 %iv420 %l = load double, ptr %gep.A, align 8421 %div = fmul double %l, 5.000000e+00422 %gep.B.1 = getelementptr {double, double}, ptr %B, i64 %iv, i32 1423 store double %div, ptr %gep.B.1, align 8424 %gep.C.1 = getelementptr {double, double}, ptr %C, i64 %iv, i32 1425 store double %div, ptr %gep.C.1, align 8426 %gep.B = getelementptr {double, double}, ptr %B, i64 %iv427 store double %div, ptr %gep.B, align 8428 %gep.C = getelementptr {double, double}, ptr %C, i64 %iv429 store double %div, ptr %gep.C, align 8430 %iv.next = add i64 %iv, 1431 %ec = icmp eq i64 %iv, %n432 br i1 %ec, label %exit, label %loop433 434exit:435 ret void436}437 438; FIXME: We should interleave by 2 after narrowing interleave groups to saturate439; load/store units.440define void @test_interleave_after_narrowing(i32 %n, ptr %x, ptr noalias %y) {441; CHECK-LABEL: define void @test_interleave_after_narrowing(442; CHECK-SAME: i32 [[N:%.*]], ptr [[X:%.*]], ptr noalias [[Y:%.*]]) {443; CHECK-NEXT: [[ENTRY:.*:]]444; CHECK-NEXT: br label %[[VECTOR_PH:.*]]445; CHECK: [[VECTOR_PH]]:446; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]447; CHECK: [[VECTOR_BODY]]:448; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]449; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4450; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw float, ptr [[X]], i64 [[OFFSET_IDX]]451; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 4452; CHECK-NEXT: [[TMP1:%.*]] = fneg <4 x float> [[WIDE_LOAD]]453; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw float, ptr [[Y]], i64 [[OFFSET_IDX]]454; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4455; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 1456; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256457; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]458; CHECK: [[MIDDLE_BLOCK]]:459; CHECK-NEXT: br label %[[EXIT:.*]]460; CHECK: [[EXIT]]:461; CHECK-NEXT: ret void462;463entry:464 br label %loop465 466loop:467 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]468 %gep.x = getelementptr inbounds nuw float, ptr %x, i64 %iv469 %l.x = load float, ptr %gep.x, align 4470 %neg.0 = fneg float %l.x471 %gep.y = getelementptr inbounds nuw float, ptr %y, i64 %iv472 store float %neg.0, ptr %gep.y, align 4473 %iv.1 = or disjoint i64 %iv, 1474 %gep.x.1 = getelementptr inbounds nuw float, ptr %x, i64 %iv.1475 %l.x.1 = load float, ptr %gep.x.1, align 4476 %neg.1 = fneg float %l.x.1477 %gep.y.1 = getelementptr inbounds nuw float, ptr %y, i64 %iv.1478 store float %neg.1, ptr %gep.y.1, align 4479 %iv.2 = or disjoint i64 %iv, 2480 %gep.x.2 = getelementptr inbounds nuw float, ptr %x, i64 %iv.2481 %l.x.2 = load float, ptr %gep.x.2, align 4482 %neg.2 = fneg float %l.x.2483 %gep.y.2 = getelementptr inbounds nuw float, ptr %y, i64 %iv.2484 store float %neg.2, ptr %gep.y.2, align 4485 %iv.3 = or disjoint i64 %iv, 3486 %gep.x.3 = getelementptr inbounds nuw float, ptr %x, i64 %iv.3487 %l.x.3 = load float, ptr %gep.x.3, align 4488 %neg.3 = fneg float %l.x.3489 %gep.y.3 = getelementptr inbounds nuw float, ptr %y, i64 %iv.3490 store float %neg.3, ptr %gep.y.3, align 4491 %iv.next = add nuw nsw i64 %iv, 4492 %ec = icmp samesign ult i64 %iv, 1020493 br i1 %ec, label %loop, label %exit494 495exit:496 ret void497}498 499attributes #0 = { "target-cpu"="neoverse-v2" }500