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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph\:" --version 52; RUN: opt -p loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck --check-prefixes=VF2 %s3; RUN: opt -p loop-vectorize -force-vector-width=2 -force-vector-interleave=2 -S %s | FileCheck --check-prefixes=VF2IC2 %s4; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck --check-prefixes=VF4 %s5 6target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"7target triple = "arm64-apple-macosx15.0.0"8 9define void @derived_int_ivs(ptr noalias %a, ptr noalias %b, i64 %end) {10; VF2-LABEL: define void @derived_int_ivs(11; VF2-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[END:%.*]]) {12; VF2-NEXT: [[ENTRY:.*:]]13; VF2-NEXT: [[TMP0:%.*]] = add i64 [[END]], -3214; VF2-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 415; VF2-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 116; VF2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 217; VF2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]18; VF2: [[VECTOR_PH]]:19; VF2-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 220; VF2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]21; VF2-NEXT: [[TMP3:%.*]] = mul i64 [[N_VEC]], 1622; VF2-NEXT: [[TMP4:%.*]] = add i64 16, [[TMP3]]23; VF2-NEXT: br label %[[VECTOR_BODY:.*]]24; VF2: [[VECTOR_BODY]]:25; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]26; VF2-NEXT: [[TMP5:%.*]] = mul i64 [[INDEX]], 1627; VF2-NEXT: [[OFFSET_IDX:%.*]] = add i64 16, [[TMP5]]28; VF2-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[OFFSET_IDX]]29; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP6]], align 830; VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[OFFSET_IDX]]31; VF2-NEXT: store <2 x double> [[WIDE_LOAD]], ptr [[TMP7]], align 832; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 133; VF2-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]34; VF2-NEXT: br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]35; VF2: [[MIDDLE_BLOCK]]:36; VF2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]37; VF2-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]38; VF2: [[SCALAR_PH]]:39;40; VF2IC2-LABEL: define void @derived_int_ivs(41; VF2IC2-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[END:%.*]]) {42; VF2IC2-NEXT: [[ENTRY:.*:]]43; VF2IC2-NEXT: [[TMP0:%.*]] = add i64 [[END]], -3244; VF2IC2-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 445; VF2IC2-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 146; VF2IC2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 447; VF2IC2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]48; VF2IC2: [[VECTOR_PH]]:49; VF2IC2-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 450; VF2IC2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]51; VF2IC2-NEXT: [[TMP3:%.*]] = mul i64 [[N_VEC]], 1652; VF2IC2-NEXT: [[TMP4:%.*]] = add i64 16, [[TMP3]]53; VF2IC2-NEXT: br label %[[VECTOR_BODY:.*]]54; VF2IC2: [[VECTOR_BODY]]:55; VF2IC2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]56; VF2IC2-NEXT: [[TMP5:%.*]] = mul i64 [[INDEX]], 1657; VF2IC2-NEXT: [[OFFSET_IDX:%.*]] = add i64 16, [[TMP5]]58; VF2IC2-NEXT: [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 1659; VF2IC2-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[OFFSET_IDX]]60; VF2IC2-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[TMP6]]61; VF2IC2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP7]], align 862; VF2IC2-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x double>, ptr [[TMP8]], align 863; VF2IC2-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[OFFSET_IDX]]64; VF2IC2-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[TMP6]]65; VF2IC2-NEXT: store <2 x double> [[WIDE_LOAD]], ptr [[TMP9]], align 866; VF2IC2-NEXT: store <2 x double> [[WIDE_LOAD1]], ptr [[TMP10]], align 867; VF2IC2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 268; VF2IC2-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]69; VF2IC2-NEXT: br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]70; VF2IC2: [[MIDDLE_BLOCK]]:71; VF2IC2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]72; VF2IC2-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]73; VF2IC2: [[SCALAR_PH]]:74;75; VF4-LABEL: define void @derived_int_ivs(76; VF4-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[END:%.*]]) {77; VF4-NEXT: [[ENTRY:.*:]]78; VF4-NEXT: [[TMP0:%.*]] = add i64 [[END]], -3279; VF4-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 480; VF4-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 181; VF4-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 482; VF4-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]83; VF4: [[VECTOR_PH]]:84; VF4-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 485; VF4-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]86; VF4-NEXT: [[TMP3:%.*]] = mul i64 [[N_VEC]], 1687; VF4-NEXT: [[TMP4:%.*]] = add i64 16, [[TMP3]]88; VF4-NEXT: br label %[[VECTOR_BODY:.*]]89; VF4: [[VECTOR_BODY]]:90; VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]91; VF4-NEXT: [[TMP5:%.*]] = mul i64 [[INDEX]], 1692; VF4-NEXT: [[OFFSET_IDX:%.*]] = add i64 16, [[TMP5]]93; VF4-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[OFFSET_IDX]]94; VF4-NEXT: [[WIDE_VEC:%.*]] = load <8 x double>, ptr [[TMP6]], align 895; VF4-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x double> [[WIDE_VEC]], <8 x double> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>96; VF4-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x double> [[WIDE_VEC]], <8 x double> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>97; VF4-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[OFFSET_IDX]]98; VF4-NEXT: [[TMP8:%.*]] = shufflevector <4 x double> [[STRIDED_VEC]], <4 x double> [[STRIDED_VEC1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>99; VF4-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x double> [[TMP8]], <8 x double> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>100; VF4-NEXT: store <8 x double> [[INTERLEAVED_VEC]], ptr [[TMP7]], align 8101; VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4102; VF4-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]103; VF4-NEXT: br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]104; VF4: [[MIDDLE_BLOCK]]:105; VF4-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]106; VF4-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]107; VF4: [[SCALAR_PH]]:108;109entry:110 br label %loop111 112loop:113 %iv = phi i64 [ 16, %entry ], [ %iv.next, %loop ]114 %gep.a.0 = getelementptr inbounds i8, ptr %a, i64 %iv115 %l.0 = load double, ptr %gep.a.0, align 8116 %gep.b.0 = getelementptr inbounds i8, ptr %b, i64 %iv117 store double %l.0, ptr %gep.b.0, align 8118 %gep.a.1 = getelementptr inbounds i8, ptr %gep.a.0, i64 8119 %l.1 = load double, ptr %gep.a.1, align 8120 %gep.b.1 = getelementptr inbounds i8, ptr %gep.b.0, i64 8121 store double %l.1, ptr %gep.b.1, align 8122 %iv.next = add nuw nsw i64 %iv, 16123 %ec = icmp eq i64 %iv.next, %end124 br i1 %ec, label %exit, label %loop125 126exit:127 ret void128}129 130define void @derived_pointer_ivs(ptr noalias %a, ptr noalias %b, ptr %end) {131; VF2-LABEL: define void @derived_pointer_ivs(132; VF2-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr [[END:%.*]]) {133; VF2-NEXT: [[ENTRY:.*:]]134; VF2-NEXT: [[A5:%.*]] = ptrtoint ptr [[A]] to i64135; VF2-NEXT: [[END4:%.*]] = ptrtoint ptr [[END]] to i64136; VF2-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64137; VF2-NEXT: [[END1:%.*]] = ptrtoint ptr [[END]] to i64138; VF2-NEXT: [[TMP0:%.*]] = add i64 [[END4]], -16139; VF2-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[A5]]140; VF2-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 4141; VF2-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1142; VF2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 2143; VF2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]144; VF2: [[VECTOR_MEMCHECK]]:145; VF2-NEXT: [[TMP4:%.*]] = add i64 [[END1]], -16146; VF2-NEXT: [[TMP5:%.*]] = sub i64 [[TMP4]], [[A2]]147; VF2-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP5]], 4148; VF2-NEXT: [[TMP7:%.*]] = shl nuw i64 [[TMP6]], 4149; VF2-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 16150; VF2-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP8]]151; VF2-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP8]]152; VF2-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP3]]153; VF2-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]154; VF2-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]155; VF2-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]156; VF2: [[VECTOR_PH]]:157; VF2-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 2158; VF2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]159; VF2-NEXT: [[TMP9:%.*]] = mul i64 [[N_VEC]], 16160; VF2-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP9]]161; VF2-NEXT: [[TMP11:%.*]] = mul i64 [[N_VEC]], 16162; VF2-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP11]]163; VF2-NEXT: br label %[[VECTOR_BODY:.*]]164; VF2: [[VECTOR_BODY]]:165; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]166; VF2-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 16167; VF2-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFFSET_IDX]]168; VF2-NEXT: [[OFFSET_IDX6:%.*]] = mul i64 [[INDEX]], 16169; VF2-NEXT: [[NEXT_GEP7:%.*]] = getelementptr i8, ptr [[B]], i64 [[OFFSET_IDX6]]170; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[NEXT_GEP]], align 8171; VF2-NEXT: store <2 x double> [[WIDE_LOAD]], ptr [[NEXT_GEP7]], align 8172; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 1173; VF2-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]174; VF2-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]175; VF2: [[MIDDLE_BLOCK]]:176; VF2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]177; VF2-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]178; VF2: [[SCALAR_PH]]:179;180; VF2IC2-LABEL: define void @derived_pointer_ivs(181; VF2IC2-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr [[END:%.*]]) {182; VF2IC2-NEXT: [[ENTRY:.*:]]183; VF2IC2-NEXT: [[A5:%.*]] = ptrtoint ptr [[A]] to i64184; VF2IC2-NEXT: [[END4:%.*]] = ptrtoint ptr [[END]] to i64185; VF2IC2-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64186; VF2IC2-NEXT: [[END1:%.*]] = ptrtoint ptr [[END]] to i64187; VF2IC2-NEXT: [[TMP0:%.*]] = add i64 [[END4]], -16188; VF2IC2-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[A5]]189; VF2IC2-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 4190; VF2IC2-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1191; VF2IC2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 4192; VF2IC2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]193; VF2IC2: [[VECTOR_MEMCHECK]]:194; VF2IC2-NEXT: [[TMP4:%.*]] = add i64 [[END1]], -16195; VF2IC2-NEXT: [[TMP5:%.*]] = sub i64 [[TMP4]], [[A2]]196; VF2IC2-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP5]], 4197; VF2IC2-NEXT: [[TMP7:%.*]] = shl nuw i64 [[TMP6]], 4198; VF2IC2-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 16199; VF2IC2-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP8]]200; VF2IC2-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP8]]201; VF2IC2-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP3]]202; VF2IC2-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]203; VF2IC2-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]204; VF2IC2-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]205; VF2IC2: [[VECTOR_PH]]:206; VF2IC2-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 4207; VF2IC2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]208; VF2IC2-NEXT: [[TMP9:%.*]] = mul i64 [[N_VEC]], 16209; VF2IC2-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP9]]210; VF2IC2-NEXT: [[TMP11:%.*]] = mul i64 [[N_VEC]], 16211; VF2IC2-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP11]]212; VF2IC2-NEXT: br label %[[VECTOR_BODY:.*]]213; VF2IC2: [[VECTOR_BODY]]:214; VF2IC2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]215; VF2IC2-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 16216; VF2IC2-NEXT: [[TMP13:%.*]] = add i64 [[OFFSET_IDX]], 16217; VF2IC2-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFFSET_IDX]]218; VF2IC2-NEXT: [[NEXT_GEP6:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP13]]219; VF2IC2-NEXT: [[OFFSET_IDX7:%.*]] = mul i64 [[INDEX]], 16220; VF2IC2-NEXT: [[TMP14:%.*]] = add i64 [[OFFSET_IDX7]], 16221; VF2IC2-NEXT: [[NEXT_GEP8:%.*]] = getelementptr i8, ptr [[B]], i64 [[OFFSET_IDX7]]222; VF2IC2-NEXT: [[NEXT_GEP9:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP14]]223; VF2IC2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[NEXT_GEP]], align 8224; VF2IC2-NEXT: [[WIDE_LOAD10:%.*]] = load <2 x double>, ptr [[NEXT_GEP6]], align 8225; VF2IC2-NEXT: store <2 x double> [[WIDE_LOAD]], ptr [[NEXT_GEP8]], align 8226; VF2IC2-NEXT: store <2 x double> [[WIDE_LOAD10]], ptr [[NEXT_GEP9]], align 8227; VF2IC2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2228; VF2IC2-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]229; VF2IC2-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]230; VF2IC2: [[MIDDLE_BLOCK]]:231; VF2IC2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]232; VF2IC2-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]233; VF2IC2: [[SCALAR_PH]]:234;235; VF4-LABEL: define void @derived_pointer_ivs(236; VF4-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr [[END:%.*]]) {237; VF4-NEXT: [[ENTRY:.*:]]238; VF4-NEXT: [[A5:%.*]] = ptrtoint ptr [[A]] to i64239; VF4-NEXT: [[END4:%.*]] = ptrtoint ptr [[END]] to i64240; VF4-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64241; VF4-NEXT: [[END1:%.*]] = ptrtoint ptr [[END]] to i64242; VF4-NEXT: [[TMP0:%.*]] = add i64 [[END4]], -16243; VF4-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[A5]]244; VF4-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 4245; VF4-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1246; VF4-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 4247; VF4-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]248; VF4: [[VECTOR_MEMCHECK]]:249; VF4-NEXT: [[TMP4:%.*]] = add i64 [[END1]], -16250; VF4-NEXT: [[TMP5:%.*]] = sub i64 [[TMP4]], [[A2]]251; VF4-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP5]], 4252; VF4-NEXT: [[TMP7:%.*]] = shl nuw i64 [[TMP6]], 4253; VF4-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 16254; VF4-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP8]]255; VF4-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP8]]256; VF4-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP3]]257; VF4-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]258; VF4-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]259; VF4-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]260; VF4: [[VECTOR_PH]]:261; VF4-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 4262; VF4-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]263; VF4-NEXT: [[TMP9:%.*]] = mul i64 [[N_VEC]], 16264; VF4-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP9]]265; VF4-NEXT: [[TMP11:%.*]] = mul i64 [[N_VEC]], 16266; VF4-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP11]]267; VF4-NEXT: br label %[[VECTOR_BODY:.*]]268; VF4: [[VECTOR_BODY]]:269; VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]270; VF4-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 16271; VF4-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFFSET_IDX]]272; VF4-NEXT: [[OFFSET_IDX6:%.*]] = mul i64 [[INDEX]], 16273; VF4-NEXT: [[NEXT_GEP7:%.*]] = getelementptr i8, ptr [[B]], i64 [[OFFSET_IDX6]]274; VF4-NEXT: [[WIDE_VEC:%.*]] = load <8 x double>, ptr [[NEXT_GEP]], align 8, !alias.scope [[META4:![0-9]+]]275; VF4-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x double> [[WIDE_VEC]], <8 x double> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>276; VF4-NEXT: [[STRIDED_VEC8:%.*]] = shufflevector <8 x double> [[WIDE_VEC]], <8 x double> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>277; VF4-NEXT: [[TMP13:%.*]] = shufflevector <4 x double> [[STRIDED_VEC]], <4 x double> [[STRIDED_VEC8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>278; VF4-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x double> [[TMP13]], <8 x double> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>279; VF4-NEXT: store <8 x double> [[INTERLEAVED_VEC]], ptr [[NEXT_GEP7]], align 8, !alias.scope [[META7:![0-9]+]], !noalias [[META4]]280; VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4281; VF4-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]282; VF4-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]283; VF4: [[MIDDLE_BLOCK]]:284; VF4-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]285; VF4-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]286; VF4: [[SCALAR_PH]]:287;288entry:289 br label %loop290 291loop:292 %ptr.iv.1 = phi ptr [ %a, %entry ], [ %ptr.iv.1.next, %loop ]293 %ptr.iv.2 = phi ptr [ %b, %entry ], [ %ptr.iv.2.next, %loop ]294 %l.0 = load double, ptr %ptr.iv.1, align 8295 store double %l.0, ptr %ptr.iv.2, align 8296 %gep.a.1 = getelementptr inbounds i8, ptr %ptr.iv.1, i64 8297 %l.1 = load double, ptr %gep.a.1, align 8298 %gep.b.1 = getelementptr inbounds i8, ptr %ptr.iv.2, i64 8299 store double %l.1, ptr %gep.b.1, align 8300 %ptr.iv.1.next = getelementptr inbounds i8, ptr %ptr.iv.1, i64 16301 %ptr.iv.2.next = getelementptr inbounds i8, ptr %ptr.iv.2, i64 16302 %ec = icmp eq ptr %ptr.iv.1.next, %end303 br i1 %ec, label %exit, label %loop304 305exit:306 ret void307}308 309define void @narrow_with_uniform_add_and_gep(ptr noalias %p) {310; VF2-LABEL: define void @narrow_with_uniform_add_and_gep(311; VF2-SAME: ptr noalias [[P:%.*]]) {312; VF2-NEXT: [[ENTRY:.*:]]313; VF2-NEXT: br label %[[VECTOR_PH:.*]]314; VF2: [[VECTOR_PH]]:315; VF2-NEXT: br label %[[VECTOR_BODY:.*]]316; VF2: [[VECTOR_BODY]]:317; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]318; VF2-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 2319; VF2-NEXT: [[TMP1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET_IDX]]320; VF2-NEXT: [[STRIDED_VEC1:%.*]] = load <2 x i64>, ptr [[TMP1]], align 8321; VF2-NEXT: [[TMP3:%.*]] = add <2 x i64> [[STRIDED_VEC1]], splat (i64 1)322; VF2-NEXT: store <2 x i64> [[TMP3]], ptr [[TMP1]], align 8323; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 1324; VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 512325; VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]326; VF2: [[MIDDLE_BLOCK]]:327; VF2-NEXT: br label %[[EXIT:.*]]328; VF2: [[EXIT]]:329; VF2-NEXT: ret void330;331; VF2IC2-LABEL: define void @narrow_with_uniform_add_and_gep(332; VF2IC2-SAME: ptr noalias [[P:%.*]]) {333; VF2IC2-NEXT: [[ENTRY:.*:]]334; VF2IC2-NEXT: br label %[[VECTOR_PH:.*]]335; VF2IC2: [[VECTOR_PH]]:336; VF2IC2-NEXT: br label %[[VECTOR_BODY:.*]]337; VF2IC2: [[VECTOR_BODY]]:338; VF2IC2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]339; VF2IC2-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 2340; VF2IC2-NEXT: [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 2341; VF2IC2-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET_IDX]]342; VF2IC2-NEXT: [[TMP4:%.*]] = getelementptr i64, ptr [[P]], i64 [[TMP0]]343; VF2IC2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP3]], align 8344; VF2IC2-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x i64>, ptr [[TMP4]], align 8345; VF2IC2-NEXT: [[TMP5:%.*]] = add <2 x i64> [[WIDE_LOAD]], splat (i64 1)346; VF2IC2-NEXT: [[TMP6:%.*]] = add <2 x i64> [[WIDE_LOAD1]], splat (i64 1)347; VF2IC2-NEXT: store <2 x i64> [[TMP5]], ptr [[TMP3]], align 8348; VF2IC2-NEXT: store <2 x i64> [[TMP6]], ptr [[TMP4]], align 8349; VF2IC2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2350; VF2IC2-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 512351; VF2IC2-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]352; VF2IC2: [[MIDDLE_BLOCK]]:353; VF2IC2-NEXT: br label %[[EXIT:.*]]354; VF2IC2: [[EXIT]]:355; VF2IC2-NEXT: ret void356;357; VF4-LABEL: define void @narrow_with_uniform_add_and_gep(358; VF4-SAME: ptr noalias [[P:%.*]]) {359; VF4-NEXT: [[ENTRY:.*:]]360; VF4-NEXT: br label %[[VECTOR_PH:.*]]361; VF4: [[VECTOR_PH]]:362; VF4-NEXT: br label %[[VECTOR_BODY:.*]]363; VF4: [[VECTOR_BODY]]:364; VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]365; VF4-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 2366; VF4-NEXT: [[TMP1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET_IDX]]367; VF4-NEXT: [[WIDE_VEC:%.*]] = load <8 x i64>, ptr [[TMP1]], align 8368; VF4-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i64> [[WIDE_VEC]], <8 x i64> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>369; VF4-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i64> [[WIDE_VEC]], <8 x i64> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>370; VF4-NEXT: [[TMP2:%.*]] = add <4 x i64> [[STRIDED_VEC]], splat (i64 1)371; VF4-NEXT: [[TMP3:%.*]] = add <4 x i64> [[STRIDED_VEC1]], splat (i64 1)372; VF4-NEXT: [[TMP4:%.*]] = shufflevector <4 x i64> [[TMP2]], <4 x i64> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>373; VF4-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x i64> [[TMP4]], <8 x i64> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>374; VF4-NEXT: store <8 x i64> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 8375; VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4376; VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 512377; VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]378; VF4: [[MIDDLE_BLOCK]]:379; VF4-NEXT: br label %[[EXIT:.*]]380; VF4: [[EXIT]]:381; VF4-NEXT: ret void382;383entry:384 br label %loop385 386loop:387 %iv = phi i64 [0, %entry], [%iv.next, %loop]388 389 %iv0 = add nuw nsw i64 %iv, 0390 %gep0 = getelementptr i64, ptr %p, i64 %iv0391 %load0 = load i64, ptr %gep0392 %add0 = add i64 %load0, 1393 store i64 %add0, ptr %gep0394 395 %iv1 = add nuw nsw i64 %iv, 1396 %gep1 = getelementptr i64, ptr %p, i64 %iv1397 %load1 = load i64, ptr %gep1398 %add1 = add i64 %load1, 1399 store i64 %add1, ptr %gep1400 401 %iv.next = add nuw nsw i64 %iv, 2402 %done = icmp eq i64 %iv.next, 1024403 br i1 %done, label %exit, label %loop404 405exit:406 ret void407}408