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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "^scalar.ph:" --version 62; RUN: opt -p loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck --check-prefixes=VF2 %s3 4target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"5target triple = "arm64-apple-macosx"6 7define void @test_2xi64_mul_add(ptr noalias %data, ptr noalias %factor) {8; VF2-LABEL: define void @test_2xi64_mul_add(9; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {10; VF2-NEXT: [[ENTRY:.*:]]11; VF2-NEXT: br label %[[VECTOR_PH:.*]]12; VF2: [[VECTOR_PH]]:13; VF2-NEXT: br label %[[VECTOR_BODY:.*]]14; VF2: [[VECTOR_BODY]]:15; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]16; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]17; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 818; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 119; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]20; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 821; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>22; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>23; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC]]24; VF2-NEXT: [[TMP4:%.*]] = add <2 x i64> [[TMP3]], splat (i64 2)25; VF2-NEXT: [[TMP5:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]26; VF2-NEXT: [[TMP6:%.*]] = add <2 x i64> [[TMP5]], splat (i64 2)27; VF2-NEXT: [[TMP7:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>28; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>29; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 830; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 231; VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10032; VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]33; VF2: [[MIDDLE_BLOCK]]:34; VF2-NEXT: br label %[[EXIT:.*]]35; VF2: [[EXIT]]:36; VF2-NEXT: ret void37;38entry:39 br label %loop40 41loop:42 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]43 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv44 %l.factor = load i64, ptr %arrayidx, align 845 %idx.0 = shl nsw i64 %iv, 146 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.047 %l.0 = load i64, ptr %data.0, align 848 %mul.0 = mul i64 %l.factor, %l.049 %add.0 = add i64 %mul.0, 250 store i64 %add.0, ptr %data.0, align 851 %idx.1 = or disjoint i64 %idx.0, 152 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.153 %l.1 = load i64, ptr %data.1, align 854 %mul.1 = mul i64 %l.factor, %l.155 %add.1 = add i64 %mul.1, 256 store i64 %add.1, ptr %data.1, align 857 %iv.next = add nuw nsw i64 %iv, 158 %ec = icmp eq i64 %iv.next, 10059 br i1 %ec, label %exit, label %loop60 61exit:62 ret void63}64 65define void @test_2xi64_mixed_opcodes1(ptr noalias %data, ptr noalias %factor) {66; VF2-LABEL: define void @test_2xi64_mixed_opcodes1(67; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {68; VF2-NEXT: [[ENTRY:.*:]]69; VF2-NEXT: br label %[[VECTOR_PH:.*]]70; VF2: [[VECTOR_PH]]:71; VF2-NEXT: br label %[[VECTOR_BODY:.*]]72; VF2: [[VECTOR_BODY]]:73; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]74; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]75; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 876; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 177; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]78; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 879; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>80; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>81; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC]]82; VF2-NEXT: [[TMP4:%.*]] = add <2 x i64> [[TMP3]], splat (i64 2)83; VF2-NEXT: [[TMP5:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]84; VF2-NEXT: [[TMP6:%.*]] = xor <2 x i64> [[TMP5]], splat (i64 2)85; VF2-NEXT: [[TMP7:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>86; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>87; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 888; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 289; VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10090; VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]91; VF2: [[MIDDLE_BLOCK]]:92; VF2-NEXT: br label %[[EXIT:.*]]93; VF2: [[EXIT]]:94; VF2-NEXT: ret void95;96entry:97 br label %loop98 99loop:100 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]101 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv102 %l.factor = load i64, ptr %arrayidx, align 8103 %idx.0 = shl nsw i64 %iv, 1104 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0105 %l.0 = load i64, ptr %data.0, align 8106 %mul.0 = mul i64 %l.factor, %l.0107 %add.0 = add i64 %mul.0, 2108 store i64 %add.0, ptr %data.0, align 8109 %idx.1 = or disjoint i64 %idx.0, 1110 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1111 %l.1 = load i64, ptr %data.1, align 8112 %mul.1 = mul i64 %l.factor, %l.1113 %add.1 = xor i64 %mul.1, 2114 store i64 %add.1, ptr %data.1, align 8115 %iv.next = add nuw nsw i64 %iv, 1116 %ec = icmp eq i64 %iv.next, 100117 br i1 %ec, label %exit, label %loop118 119exit:120 ret void121}122 123define void @test_2xi64_mixed_opcodes2(ptr noalias %data, ptr noalias %factor) {124; VF2-LABEL: define void @test_2xi64_mixed_opcodes2(125; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {126; VF2-NEXT: [[ENTRY:.*:]]127; VF2-NEXT: br label %[[VECTOR_PH:.*]]128; VF2: [[VECTOR_PH]]:129; VF2-NEXT: br label %[[VECTOR_BODY:.*]]130; VF2: [[VECTOR_BODY]]:131; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]132; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]133; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 8134; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 1135; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]136; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8137; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>138; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>139; VF2-NEXT: [[TMP3:%.*]] = xor <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC]]140; VF2-NEXT: [[TMP4:%.*]] = add <2 x i64> [[TMP3]], splat (i64 2)141; VF2-NEXT: [[TMP5:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]142; VF2-NEXT: [[TMP6:%.*]] = add <2 x i64> [[TMP5]], splat (i64 2)143; VF2-NEXT: [[TMP7:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>144; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>145; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 8146; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2147; VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100148; VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]149; VF2: [[MIDDLE_BLOCK]]:150; VF2-NEXT: br label %[[EXIT:.*]]151; VF2: [[EXIT]]:152; VF2-NEXT: ret void153;154entry:155 br label %loop156 157loop:158 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]159 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv160 %l.factor = load i64, ptr %arrayidx, align 8161 %idx.0 = shl nsw i64 %iv, 1162 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0163 %l.0 = load i64, ptr %data.0, align 8164 %mul.0 = xor i64 %l.factor, %l.0165 %add.0 = add i64 %mul.0, 2166 store i64 %add.0, ptr %data.0, align 8167 %idx.1 = or disjoint i64 %idx.0, 1168 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1169 %l.1 = load i64, ptr %data.1, align 8170 %mul.1 = mul i64 %l.factor, %l.1171 %add.1 = add i64 %mul.1, 2172 store i64 %add.1, ptr %data.1, align 8173 %iv.next = add nuw nsw i64 %iv, 1174 %ec = icmp eq i64 %iv.next, 100175 br i1 %ec, label %exit, label %loop176 177exit:178 ret void179}180 181define void @test_2xi64_mul_sub(ptr noalias %data, ptr noalias %factor) {182; VF2-LABEL: define void @test_2xi64_mul_sub(183; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {184; VF2-NEXT: [[ENTRY:.*:]]185; VF2-NEXT: br label %[[VECTOR_PH:.*]]186; VF2: [[VECTOR_PH]]:187; VF2-NEXT: br label %[[VECTOR_BODY:.*]]188; VF2: [[VECTOR_BODY]]:189; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]190; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]191; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 8192; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 1193; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]194; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8195; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>196; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>197; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC]]198; VF2-NEXT: [[TMP4:%.*]] = sub <2 x i64> [[TMP3]], splat (i64 2)199; VF2-NEXT: [[TMP5:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]200; VF2-NEXT: [[TMP6:%.*]] = sub <2 x i64> [[TMP5]], splat (i64 2)201; VF2-NEXT: [[TMP7:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>202; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>203; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 8204; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2205; VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100206; VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]207; VF2: [[MIDDLE_BLOCK]]:208; VF2-NEXT: br label %[[EXIT:.*]]209; VF2: [[EXIT]]:210; VF2-NEXT: ret void211;212entry:213 br label %loop214 215loop:216 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]217 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv218 %l.factor = load i64, ptr %arrayidx, align 8219 %idx.0 = shl nsw i64 %iv, 1220 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0221 %l.0 = load i64, ptr %data.0, align 8222 %mul.0 = mul i64 %l.factor, %l.0223 %sub.0 = sub i64 %mul.0, 2224 store i64 %sub.0, ptr %data.0, align 8225 %idx.1 = or disjoint i64 %idx.0, 1226 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1227 %l.1 = load i64, ptr %data.1, align 8228 %mul.1 = mul i64 %l.factor, %l.1229 %sub.1 = sub i64 %mul.1, 2230 store i64 %sub.1, ptr %data.1, align 8231 %iv.next = add nuw nsw i64 %iv, 1232 %ec = icmp eq i64 %iv.next, 100233 br i1 %ec, label %exit, label %loop234 235exit:236 ret void237}238 239define void @test_2xi64_mul_sub_mismatched_ops1(ptr noalias %data, ptr noalias %factor) {240; VF2-LABEL: define void @test_2xi64_mul_sub_mismatched_ops1(241; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {242; VF2-NEXT: [[ENTRY:.*:]]243; VF2-NEXT: br label %[[VECTOR_PH:.*]]244; VF2: [[VECTOR_PH]]:245; VF2-NEXT: br label %[[VECTOR_BODY:.*]]246; VF2: [[VECTOR_BODY]]:247; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]248; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]249; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 8250; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 1251; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]252; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8253; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>254; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>255; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC]]256; VF2-NEXT: [[TMP4:%.*]] = sub <2 x i64> [[TMP3]], splat (i64 2)257; VF2-NEXT: [[TMP5:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]258; VF2-NEXT: [[TMP6:%.*]] = sub <2 x i64> [[TMP5]], splat (i64 3)259; VF2-NEXT: [[TMP7:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>260; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>261; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 8262; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2263; VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100264; VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]265; VF2: [[MIDDLE_BLOCK]]:266; VF2-NEXT: br label %[[EXIT:.*]]267; VF2: [[EXIT]]:268; VF2-NEXT: ret void269;270entry:271 br label %loop272 273loop:274 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]275 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv276 %l.factor = load i64, ptr %arrayidx, align 8277 %idx.0 = shl nsw i64 %iv, 1278 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0279 %l.0 = load i64, ptr %data.0, align 8280 %mul.0 = mul i64 %l.factor, %l.0281 %sub.0 = sub i64 %mul.0, 2282 store i64 %sub.0, ptr %data.0, align 8283 %idx.1 = or disjoint i64 %idx.0, 1284 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1285 %l.1 = load i64, ptr %data.1, align 8286 %mul.1 = mul i64 %l.factor, %l.1287 %sub.1 = sub i64 %mul.1, 3288 store i64 %sub.1, ptr %data.1, align 8289 %iv.next = add nuw nsw i64 %iv, 1290 %ec = icmp eq i64 %iv.next, 100291 br i1 %ec, label %exit, label %loop292 293exit:294 ret void295}296 297define void @test_2xi64_mul_sub_mismatched_ops2(ptr noalias %data, ptr noalias %factor) {298; VF2-LABEL: define void @test_2xi64_mul_sub_mismatched_ops2(299; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {300; VF2-NEXT: [[ENTRY:.*:]]301; VF2-NEXT: br label %[[VECTOR_PH:.*]]302; VF2: [[VECTOR_PH]]:303; VF2-NEXT: br label %[[VECTOR_BODY:.*]]304; VF2: [[VECTOR_BODY]]:305; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]306; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]307; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 8308; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 1309; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]310; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8311; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>312; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>313; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], splat (i64 3)314; VF2-NEXT: [[TMP4:%.*]] = sub <2 x i64> [[TMP3]], splat (i64 2)315; VF2-NEXT: [[TMP5:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]316; VF2-NEXT: [[TMP6:%.*]] = sub <2 x i64> [[TMP5]], splat (i64 2)317; VF2-NEXT: [[TMP7:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>318; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>319; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 8320; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2321; VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100322; VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]323; VF2: [[MIDDLE_BLOCK]]:324; VF2-NEXT: br label %[[EXIT:.*]]325; VF2: [[EXIT]]:326; VF2-NEXT: ret void327;328entry:329 br label %loop330 331loop:332 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]333 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv334 %l.factor = load i64, ptr %arrayidx, align 8335 %idx.0 = shl nsw i64 %iv, 1336 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0337 %l.0 = load i64, ptr %data.0, align 8338 %mul.0 = mul i64 %l.factor, 3339 %sub.0 = sub i64 %mul.0, 2340 store i64 %sub.0, ptr %data.0, align 8341 %idx.1 = or disjoint i64 %idx.0, 1342 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1343 %l.1 = load i64, ptr %data.1, align 8344 %mul.1 = mul i64 %l.factor, %l.1345 %sub.1 = sub i64 %mul.1, 2346 store i64 %sub.1, ptr %data.1, align 8347 %iv.next = add nuw nsw i64 %iv, 1348 %ec = icmp eq i64 %iv.next, 100349 br i1 %ec, label %exit, label %loop350 351exit:352 ret void353}354 355define void @test_2xi64_mul_sub_mismatched_op_order(ptr noalias %data, ptr noalias %factor) {356; VF2-LABEL: define void @test_2xi64_mul_sub_mismatched_op_order(357; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {358; VF2-NEXT: [[ENTRY:.*:]]359; VF2-NEXT: br label %[[VECTOR_PH:.*]]360; VF2: [[VECTOR_PH]]:361; VF2-NEXT: br label %[[VECTOR_BODY:.*]]362; VF2: [[VECTOR_BODY]]:363; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]364; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]365; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 8366; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 1367; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]368; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8369; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>370; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>371; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC]]372; VF2-NEXT: [[TMP4:%.*]] = sub <2 x i64> [[TMP3]], splat (i64 2)373; VF2-NEXT: [[TMP5:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]374; VF2-NEXT: [[TMP6:%.*]] = sub <2 x i64> splat (i64 2), [[TMP5]]375; VF2-NEXT: [[TMP7:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>376; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>377; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 8378; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2379; VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100380; VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]381; VF2: [[MIDDLE_BLOCK]]:382; VF2-NEXT: br label %[[EXIT:.*]]383; VF2: [[EXIT]]:384; VF2-NEXT: ret void385;386entry:387 br label %loop388 389loop:390 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]391 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv392 %l.factor = load i64, ptr %arrayidx, align 8393 %idx.0 = shl nsw i64 %iv, 1394 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0395 %l.0 = load i64, ptr %data.0, align 8396 %mul.0 = mul i64 %l.factor, %l.0397 %sub.0 = sub i64 %mul.0, 2398 store i64 %sub.0, ptr %data.0, align 8399 %idx.1 = or disjoint i64 %idx.0, 1400 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1401 %l.1 = load i64, ptr %data.1, align 8402 %mul.1 = mul i64 %l.factor, %l.1403 %sub.1 = sub i64 2, %mul.1404 store i64 %sub.1, ptr %data.1, align 8405 %iv.next = add nuw nsw i64 %iv, 1406 %ec = icmp eq i64 %iv.next, 100407 br i1 %ec, label %exit, label %loop408 409exit:410 ret void411}412 413define void @test_2xi64_mul_add_xor(ptr noalias %data, ptr noalias %factor) {414; VF2-LABEL: define void @test_2xi64_mul_add_xor(415; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {416; VF2-NEXT: [[ENTRY:.*:]]417; VF2-NEXT: br label %[[VECTOR_PH:.*]]418; VF2: [[VECTOR_PH]]:419; VF2-NEXT: br label %[[VECTOR_BODY:.*]]420; VF2: [[VECTOR_BODY]]:421; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]422; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]423; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 8424; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 1425; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]426; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8427; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>428; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>429; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC]]430; VF2-NEXT: [[TMP4:%.*]] = add <2 x i64> [[TMP3]], splat (i64 2)431; VF2-NEXT: [[TMP5:%.*]] = xor <2 x i64> splat (i64 4), [[TMP4]]432; VF2-NEXT: [[TMP6:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]433; VF2-NEXT: [[TMP7:%.*]] = add <2 x i64> [[TMP6]], splat (i64 2)434; VF2-NEXT: [[TMP8:%.*]] = xor <2 x i64> splat (i64 4), [[TMP7]]435; VF2-NEXT: [[TMP9:%.*]] = shufflevector <2 x i64> [[TMP5]], <2 x i64> [[TMP8]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>436; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP9]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>437; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 8438; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2439; VF2-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100440; VF2-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]441; VF2: [[MIDDLE_BLOCK]]:442; VF2-NEXT: br label %[[EXIT:.*]]443; VF2: [[EXIT]]:444; VF2-NEXT: ret void445;446entry:447 br label %loop448 449loop:450 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]451 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv452 %l.factor = load i64, ptr %arrayidx, align 8453 %idx.0 = shl nsw i64 %iv, 1454 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0455 %l.0 = load i64, ptr %data.0, align 8456 %mul.0 = mul i64 %l.factor, %l.0457 %add.0 = add i64 %mul.0, 2458 %xor.0 = xor i64 4, %add.0459 store i64 %xor.0, ptr %data.0, align 8460 %idx.1 = or disjoint i64 %idx.0, 1461 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1462 %l.1 = load i64, ptr %data.1, align 8463 %mul.1 = mul i64 %l.factor, %l.1464 %add.1 = add i64 %mul.1, 2465 %xor.1 = xor i64 4, %add.1466 store i64 %xor.1, ptr %data.1, align 8467 %iv.next = add nuw nsw i64 %iv, 1468 %ec = icmp eq i64 %iv.next, 100469 br i1 %ec, label %exit, label %loop470 471exit:472 ret void473}474 475define void @test_2xi64_mul_add_xor_mismatched_opcodes1(ptr noalias %data, ptr noalias %factor) {476; VF2-LABEL: define void @test_2xi64_mul_add_xor_mismatched_opcodes1(477; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {478; VF2-NEXT: [[ENTRY:.*:]]479; VF2-NEXT: br label %[[VECTOR_PH:.*]]480; VF2: [[VECTOR_PH]]:481; VF2-NEXT: br label %[[VECTOR_BODY:.*]]482; VF2: [[VECTOR_BODY]]:483; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]484; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]485; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 8486; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 1487; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]488; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8489; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>490; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>491; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC]]492; VF2-NEXT: [[TMP4:%.*]] = add <2 x i64> [[TMP3]], splat (i64 2)493; VF2-NEXT: [[TMP5:%.*]] = xor <2 x i64> splat (i64 4), [[TMP4]]494; VF2-NEXT: [[TMP6:%.*]] = sub <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]495; VF2-NEXT: [[TMP7:%.*]] = add <2 x i64> [[TMP6]], splat (i64 2)496; VF2-NEXT: [[TMP8:%.*]] = xor <2 x i64> splat (i64 4), [[TMP7]]497; VF2-NEXT: [[TMP9:%.*]] = shufflevector <2 x i64> [[TMP5]], <2 x i64> [[TMP8]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>498; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP9]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>499; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 8500; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2501; VF2-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100502; VF2-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]503; VF2: [[MIDDLE_BLOCK]]:504; VF2-NEXT: br label %[[EXIT:.*]]505; VF2: [[EXIT]]:506; VF2-NEXT: ret void507;508entry:509 br label %loop510 511loop:512 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]513 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv514 %l.factor = load i64, ptr %arrayidx, align 8515 %idx.0 = shl nsw i64 %iv, 1516 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0517 %l.0 = load i64, ptr %data.0, align 8518 %mul.0 = mul i64 %l.factor, %l.0519 %add.0 = add i64 %mul.0, 2520 %xor.0 = xor i64 4, %add.0521 store i64 %xor.0, ptr %data.0, align 8522 %idx.1 = or disjoint i64 %idx.0, 1523 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1524 %l.1 = load i64, ptr %data.1, align 8525 %mul.1 = sub i64 %l.factor, %l.1526 %add.1 = add i64 %mul.1, 2527 %xor.1 = xor i64 4, %add.1528 store i64 %xor.1, ptr %data.1, align 8529 %iv.next = add nuw nsw i64 %iv, 1530 %ec = icmp eq i64 %iv.next, 100531 br i1 %ec, label %exit, label %loop532 533exit:534 ret void535}536 537define void @test_2xi64_mul_add_xor_mismatched_opcodes2(ptr noalias %data, ptr noalias %factor) {538; VF2-LABEL: define void @test_2xi64_mul_add_xor_mismatched_opcodes2(539; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {540; VF2-NEXT: [[ENTRY:.*:]]541; VF2-NEXT: br label %[[VECTOR_PH:.*]]542; VF2: [[VECTOR_PH]]:543; VF2-NEXT: br label %[[VECTOR_BODY:.*]]544; VF2: [[VECTOR_BODY]]:545; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]546; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]547; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 8548; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 1549; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]550; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8551; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>552; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>553; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC]]554; VF2-NEXT: [[TMP4:%.*]] = add <2 x i64> [[TMP3]], splat (i64 2)555; VF2-NEXT: [[TMP5:%.*]] = xor <2 x i64> splat (i64 4), [[TMP4]]556; VF2-NEXT: [[TMP6:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]557; VF2-NEXT: [[TMP7:%.*]] = mul <2 x i64> [[TMP6]], splat (i64 2)558; VF2-NEXT: [[TMP8:%.*]] = xor <2 x i64> splat (i64 4), [[TMP7]]559; VF2-NEXT: [[TMP9:%.*]] = shufflevector <2 x i64> [[TMP5]], <2 x i64> [[TMP8]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>560; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP9]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>561; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 8562; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2563; VF2-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100564; VF2-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]565; VF2: [[MIDDLE_BLOCK]]:566; VF2-NEXT: br label %[[EXIT:.*]]567; VF2: [[EXIT]]:568; VF2-NEXT: ret void569;570entry:571 br label %loop572 573loop:574 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]575 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv576 %l.factor = load i64, ptr %arrayidx, align 8577 %idx.0 = shl nsw i64 %iv, 1578 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0579 %l.0 = load i64, ptr %data.0, align 8580 %mul.0 = mul i64 %l.factor, %l.0581 %add.0 = add i64 %mul.0, 2582 %xor.0 = xor i64 4, %add.0583 store i64 %xor.0, ptr %data.0, align 8584 %idx.1 = or disjoint i64 %idx.0, 1585 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1586 %l.1 = load i64, ptr %data.1, align 8587 %mul.1 = mul i64 %l.factor, %l.1588 %add.1 = mul i64 %mul.1, 2589 %xor.1 = xor i64 4, %add.1590 store i64 %xor.1, ptr %data.1, align 8591 %iv.next = add nuw nsw i64 %iv, 1592 %ec = icmp eq i64 %iv.next, 100593 br i1 %ec, label %exit, label %loop594 595exit:596 ret void597}598 599define void @test_2xi64_mul_add_xor_mismatched_ops(ptr noalias %data, ptr noalias %factor) {600; VF2-LABEL: define void @test_2xi64_mul_add_xor_mismatched_ops(601; VF2-SAME: ptr noalias [[DATA:%.*]], ptr noalias [[FACTOR:%.*]]) {602; VF2-NEXT: [[ENTRY:.*:]]603; VF2-NEXT: br label %[[VECTOR_PH:.*]]604; VF2: [[VECTOR_PH]]:605; VF2-NEXT: br label %[[VECTOR_BODY:.*]]606; VF2: [[VECTOR_BODY]]:607; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]608; VF2-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[FACTOR]], i64 [[INDEX]]609; VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP0]], align 8610; VF2-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDEX]], 1611; VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DATA]], i64 [[TMP1]]612; VF2-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8613; VF2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2>614; VF2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 1, i32 3>615; VF2-NEXT: [[TMP3:%.*]] = mul <2 x i64> [[WIDE_LOAD]], splat (i64 3)616; VF2-NEXT: [[TMP4:%.*]] = add <2 x i64> [[TMP3]], splat (i64 2)617; VF2-NEXT: [[TMP5:%.*]] = xor <2 x i64> splat (i64 4), [[TMP4]]618; VF2-NEXT: [[TMP6:%.*]] = mul <2 x i64> [[WIDE_LOAD]], [[STRIDED_VEC1]]619; VF2-NEXT: [[TMP7:%.*]] = add <2 x i64> [[TMP6]], splat (i64 2)620; VF2-NEXT: [[TMP8:%.*]] = xor <2 x i64> splat (i64 4), [[TMP7]]621; VF2-NEXT: [[TMP9:%.*]] = shufflevector <2 x i64> [[TMP5]], <2 x i64> [[TMP8]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>622; VF2-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i64> [[TMP9]], <4 x i64> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>623; VF2-NEXT: store <4 x i64> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 8624; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2625; VF2-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100626; VF2-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]627; VF2: [[MIDDLE_BLOCK]]:628; VF2-NEXT: br label %[[EXIT:.*]]629; VF2: [[EXIT]]:630; VF2-NEXT: ret void631;632entry:633 br label %loop634 635loop:636 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]637 %arrayidx = getelementptr inbounds i64, ptr %factor, i64 %iv638 %l.factor = load i64, ptr %arrayidx, align 8639 %idx.0 = shl nsw i64 %iv, 1640 %data.0 = getelementptr inbounds i64, ptr %data, i64 %idx.0641 %l.0 = load i64, ptr %data.0, align 8642 %mul.0 = mul i64 %l.factor, 3643 %add.0 = add i64 %mul.0, 2644 %xor.0 = xor i64 4, %add.0645 store i64 %xor.0, ptr %data.0, align 8646 %idx.1 = or disjoint i64 %idx.0, 1647 %data.1 = getelementptr inbounds i64, ptr %data, i64 %idx.1648 %l.1 = load i64, ptr %data.1, align 8649 %mul.1 = mul i64 %l.factor, %l.1650 %add.1 = add i64 %mul.1, 2651 %xor.1 = xor i64 4, %add.1652 store i64 %xor.1, ptr %data.1, align 8653 %iv.next = add nuw nsw i64 %iv, 1654 %ec = icmp eq i64 %iv.next, 100655 br i1 %ec, label %exit, label %loop656 657exit:658 ret void659}660