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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --filter "call.*(acos|asin|atan|atan2|cos|cosh|exp|log|sin|sinh|pow|ceil|copysign|fabs|floor|fma|m..num|nearbyint|rint|round|sqrt|tan|tanh|trunc)" --version 22 3; RUN: opt -mattr=+neon -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=LIBMVEC-NEON4; RUN: opt -mattr=+neon -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -force-vector-width=2 -S < %s | FileCheck %s --check-prefix=LIBMVEC-NEON-WIDTH-25; RUN: opt -mattr=+sve -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=LIBMVEC-SVE6; RUN: opt -mattr=+neon -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=SLEEF-NEON7; RUN: opt -mattr=+sve -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S < %s | FileCheck %s --check-prefix=SLEEF-SVE8; RUN: opt -mattr=+neon -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=ARMPL-NEON9; RUN: opt -mattr=+sve -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S < %s | FileCheck %s --check-prefix=ARMPL-SVE10 11target triple = "aarch64-unknown-linux-gnu"12 13; We are checking whether loops containing intrinsic calls can be vectorized,14; when the compiler provides TLI mappings to their vector variants. The tests15; are checking fixed width vectorization with NEON and scalable vectorization16; with SVE.17 18declare double @llvm.acos.f64(double)19declare float @llvm.acos.f32(float)20 21define void @acos_f64(ptr noalias %in.ptr, ptr %out.ptr) {22; LIBMVEC-NEON-LABEL: define void @acos_f6423; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1:[0-9]+]] {24; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_acos(<2 x double> [[WIDE_LOAD:%.*]])25;26; LIBMVEC-NEON-WIDTH-2-LABEL: define void @acos_f6427; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1:[0-9]+]] {28; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_acos(<2 x double> [[WIDE_LOAD:%.*]])29;30; LIBMVEC-SVE-LABEL: define void @acos_f6431; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1:[0-9]+]] {32; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_acos(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))33; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.acos.f64(double [[IN:%.*]])34;35; SLEEF-NEON-LABEL: define void @acos_f6436; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1:[0-9]+]] {37; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_acos(<2 x double> [[WIDE_LOAD:%.*]])38;39; SLEEF-SVE-LABEL: define void @acos_f6440; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1:[0-9]+]] {41; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_acos(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])42;43; ARMPL-NEON-LABEL: define void @acos_f6444; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1:[0-9]+]] {45; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vacosq_f64(<2 x double> [[WIDE_LOAD:%.*]])46;47; ARMPL-SVE-LABEL: define void @acos_f6448; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1:[0-9]+]] {49; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svacos_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])50;51 entry:52 br label %for.body53 54 for.body:55 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]56 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv57 %in = load double, ptr %in.gep, align 858 %call = tail call double @llvm.acos.f64(double %in)59 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv60 store double %call, ptr %out.gep, align 861 %iv.next = add nuw nsw i64 %iv, 162 %exitcond = icmp eq i64 %iv.next, 100063 br i1 %exitcond, label %for.end, label %for.body64 65 for.end:66 ret void67}68 69define void @acos_f32(ptr noalias %in.ptr, ptr %out.ptr) {70; LIBMVEC-NEON-LABEL: define void @acos_f3271; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {72; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_acosf(<4 x float> [[WIDE_LOAD:%.*]])73;74; LIBMVEC-NEON-WIDTH-2-LABEL: define void @acos_f3275; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {76; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_acosf(<2 x float> [[WIDE_LOAD:%.*]])77;78; LIBMVEC-SVE-LABEL: define void @acos_f3279; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {80; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_acosf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))81; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.acos.f32(float [[IN:%.*]])82;83; SLEEF-NEON-LABEL: define void @acos_f3284; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {85; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_acosf(<4 x float> [[WIDE_LOAD:%.*]])86;87; SLEEF-SVE-LABEL: define void @acos_f3288; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {89; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_acosf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])90;91; ARMPL-NEON-LABEL: define void @acos_f3292; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {93; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vacosq_f32(<4 x float> [[WIDE_LOAD:%.*]])94;95; ARMPL-SVE-LABEL: define void @acos_f3296; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {97; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svacos_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])98;99 entry:100 br label %for.body101 102 for.body:103 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]104 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv105 %in = load float, ptr %in.gep, align 8106 %call = tail call float @llvm.acos.f32(float %in)107 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv108 store float %call, ptr %out.gep, align 4109 %iv.next = add nuw nsw i64 %iv, 1110 %exitcond = icmp eq i64 %iv.next, 1000111 br i1 %exitcond, label %for.end, label %for.body112 113 for.end:114 ret void115}116 117declare double @llvm.asin.f64(double)118declare float @llvm.asin.f32(float)119 120define void @asin_f64(ptr noalias %in.ptr, ptr %out.ptr) {121; LIBMVEC-NEON-LABEL: define void @asin_f64122; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {123; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_asin(<2 x double> [[WIDE_LOAD:%.*]])124;125; LIBMVEC-NEON-WIDTH-2-LABEL: define void @asin_f64126; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {127; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_asin(<2 x double> [[WIDE_LOAD:%.*]])128;129; LIBMVEC-SVE-LABEL: define void @asin_f64130; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {131; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_asin(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))132; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.asin.f64(double [[IN:%.*]])133;134; SLEEF-NEON-LABEL: define void @asin_f64135; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {136; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_asin(<2 x double> [[WIDE_LOAD:%.*]])137;138; SLEEF-SVE-LABEL: define void @asin_f64139; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {140; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_asin(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])141;142; ARMPL-NEON-LABEL: define void @asin_f64143; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {144; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vasinq_f64(<2 x double> [[WIDE_LOAD:%.*]])145;146; ARMPL-SVE-LABEL: define void @asin_f64147; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {148; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svasin_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])149;150 entry:151 br label %for.body152 153 for.body:154 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]155 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv156 %in = load double, ptr %in.gep, align 8157 %call = tail call double @llvm.asin.f64(double %in)158 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv159 store double %call, ptr %out.gep, align 8160 %iv.next = add nuw nsw i64 %iv, 1161 %exitcond = icmp eq i64 %iv.next, 1000162 br i1 %exitcond, label %for.end, label %for.body163 164 for.end:165 ret void166}167 168define void @asin_f32(ptr noalias %in.ptr, ptr %out.ptr) {169; LIBMVEC-NEON-LABEL: define void @asin_f32170; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {171; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_asinf(<4 x float> [[WIDE_LOAD:%.*]])172;173; LIBMVEC-NEON-WIDTH-2-LABEL: define void @asin_f32174; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {175; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_asinf(<2 x float> [[WIDE_LOAD:%.*]])176;177; LIBMVEC-SVE-LABEL: define void @asin_f32178; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {179; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_asinf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))180; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.asin.f32(float [[IN:%.*]])181;182; SLEEF-NEON-LABEL: define void @asin_f32183; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {184; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_asinf(<4 x float> [[WIDE_LOAD:%.*]])185;186; SLEEF-SVE-LABEL: define void @asin_f32187; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {188; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_asinf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])189;190; ARMPL-NEON-LABEL: define void @asin_f32191; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {192; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vasinq_f32(<4 x float> [[WIDE_LOAD:%.*]])193;194; ARMPL-SVE-LABEL: define void @asin_f32195; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {196; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svasin_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])197;198 entry:199 br label %for.body200 201 for.body:202 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]203 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv204 %in = load float, ptr %in.gep, align 8205 %call = tail call float @llvm.asin.f32(float %in)206 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv207 store float %call, ptr %out.gep, align 4208 %iv.next = add nuw nsw i64 %iv, 1209 %exitcond = icmp eq i64 %iv.next, 1000210 br i1 %exitcond, label %for.end, label %for.body211 212 for.end:213 ret void214}215 216declare double @llvm.atan.f64(double)217declare float @llvm.atan.f32(float)218 219define void @atan_f64(ptr noalias %in.ptr, ptr %out.ptr) {220; LIBMVEC-NEON-LABEL: define void @atan_f64221; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {222; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_atan(<2 x double> [[WIDE_LOAD:%.*]])223;224; LIBMVEC-NEON-WIDTH-2-LABEL: define void @atan_f64225; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {226; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_atan(<2 x double> [[WIDE_LOAD:%.*]])227;228; LIBMVEC-SVE-LABEL: define void @atan_f64229; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {230; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_atan(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))231; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.atan.f64(double [[IN:%.*]])232;233; SLEEF-NEON-LABEL: define void @atan_f64234; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {235; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_atan(<2 x double> [[WIDE_LOAD:%.*]])236;237; SLEEF-SVE-LABEL: define void @atan_f64238; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {239; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_atan(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])240;241; ARMPL-NEON-LABEL: define void @atan_f64242; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {243; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vatanq_f64(<2 x double> [[WIDE_LOAD:%.*]])244;245; ARMPL-SVE-LABEL: define void @atan_f64246; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {247; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svatan_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])248;249 entry:250 br label %for.body251 252 for.body:253 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]254 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv255 %in = load double, ptr %in.gep, align 8256 %call = tail call double @llvm.atan.f64(double %in)257 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv258 store double %call, ptr %out.gep, align 8259 %iv.next = add nuw nsw i64 %iv, 1260 %exitcond = icmp eq i64 %iv.next, 1000261 br i1 %exitcond, label %for.end, label %for.body262 263 for.end:264 ret void265}266 267define void @atan_f32(ptr noalias %in.ptr, ptr %out.ptr) {268; LIBMVEC-NEON-LABEL: define void @atan_f32269; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {270; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_atanf(<4 x float> [[WIDE_LOAD:%.*]])271;272; LIBMVEC-NEON-WIDTH-2-LABEL: define void @atan_f32273; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {274; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_atanf(<2 x float> [[WIDE_LOAD:%.*]])275;276; LIBMVEC-SVE-LABEL: define void @atan_f32277; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {278; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_atanf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))279; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.atan.f32(float [[IN:%.*]])280;281; SLEEF-NEON-LABEL: define void @atan_f32282; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {283; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_atanf(<4 x float> [[WIDE_LOAD:%.*]])284;285; SLEEF-SVE-LABEL: define void @atan_f32286; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {287; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_atanf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])288;289; ARMPL-NEON-LABEL: define void @atan_f32290; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {291; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vatanq_f32(<4 x float> [[WIDE_LOAD:%.*]])292;293; ARMPL-SVE-LABEL: define void @atan_f32294; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {295; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svatan_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])296;297 entry:298 br label %for.body299 300 for.body:301 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]302 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv303 %in = load float, ptr %in.gep, align 8304 %call = tail call float @llvm.atan.f32(float %in)305 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv306 store float %call, ptr %out.gep, align 4307 %iv.next = add nuw nsw i64 %iv, 1308 %exitcond = icmp eq i64 %iv.next, 1000309 br i1 %exitcond, label %for.end, label %for.body310 311 for.end:312 ret void313}314 315declare double @llvm.atan2.f64(double, double)316declare float @llvm.atan2.f32(float, float)317 318define void @atan2_f64(ptr noalias %in.ptr, ptr %out.ptr) {319; LIBMVEC-NEON-LABEL: define void @atan2_f64320; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {321; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2vv_atan2(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])322;323; LIBMVEC-NEON-WIDTH-2-LABEL: define void @atan2_f64324; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {325; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2vv_atan2(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])326;327; LIBMVEC-SVE-LABEL: define void @atan2_f64328; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {329; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_atan2(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true))330; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.atan2.f64(double [[IN:%.*]], double [[IN]])331;332; SLEEF-NEON-LABEL: define void @atan2_f64333; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {334; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2vv_atan2(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])335;336; SLEEF-SVE-LABEL: define void @atan2_f64337; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {338; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_atan2(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])339;340; ARMPL-NEON-LABEL: define void @atan2_f64341; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {342; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vatan2q_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])343;344; ARMPL-SVE-LABEL: define void @atan2_f64345; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {346; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svatan2_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])347;348 entry:349 br label %for.body350 351 for.body:352 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]353 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv354 %in = load double, ptr %in.gep, align 8355 %call = tail call double @llvm.atan2.f64(double %in, double %in)356 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv357 store double %call, ptr %out.gep, align 8358 %iv.next = add nuw nsw i64 %iv, 1359 %exitcond = icmp eq i64 %iv.next, 1000360 br i1 %exitcond, label %for.end, label %for.body361 362 for.end:363 ret void364}365 366define void @atan2_f32(ptr noalias %in.ptr, ptr %out.ptr) {367; LIBMVEC-NEON-LABEL: define void @atan2_f32368; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {369; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4vv_atan2f(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])370;371; LIBMVEC-NEON-WIDTH-2-LABEL: define void @atan2_f32372; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {373; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2vv_atan2f(<2 x float> [[WIDE_LOAD:%.*]], <2 x float> [[WIDE_LOAD]])374;375; LIBMVEC-SVE-LABEL: define void @atan2_f32376; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {377; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_atan2f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true))378; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.atan2.f32(float [[IN:%.*]], float [[IN]])379;380; SLEEF-NEON-LABEL: define void @atan2_f32381; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {382; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4vv_atan2f(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])383;384; SLEEF-SVE-LABEL: define void @atan2_f32385; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {386; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_atan2f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])387;388; ARMPL-NEON-LABEL: define void @atan2_f32389; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {390; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vatan2q_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])391;392; ARMPL-SVE-LABEL: define void @atan2_f32393; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {394; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svatan2_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])395;396 entry:397 br label %for.body398 399 for.body:400 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]401 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv402 %in = load float, ptr %in.gep, align 8403 %call = tail call float @llvm.atan2.f32(float %in, float %in)404 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv405 store float %call, ptr %out.gep, align 4406 %iv.next = add nuw nsw i64 %iv, 1407 %exitcond = icmp eq i64 %iv.next, 1000408 br i1 %exitcond, label %for.end, label %for.body409 410 for.end:411 ret void412}413 414declare double @llvm.ceil.f64(double)415declare float @llvm.ceil.f32(float)416 417define void @ceil_f64(ptr noalias %in.ptr, ptr %out.ptr) {418; LIBMVEC-NEON-LABEL: define void @ceil_f64419; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {420; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.ceil.v2f64(<2 x double> [[WIDE_LOAD:%.*]])421;422; LIBMVEC-NEON-WIDTH-2-LABEL: define void @ceil_f64423; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {424; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.ceil.v2f64(<2 x double> [[WIDE_LOAD:%.*]])425;426; LIBMVEC-SVE-LABEL: define void @ceil_f64427; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {428; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.ceil.v2f64(<2 x double> [[WIDE_LOAD:%.*]])429;430; SLEEF-NEON-LABEL: define void @ceil_f64431; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {432; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.ceil.v2f64(<2 x double> [[WIDE_LOAD:%.*]])433;434; SLEEF-SVE-LABEL: define void @ceil_f64435; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {436; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.ceil.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])437;438; ARMPL-NEON-LABEL: define void @ceil_f64439; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {440; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.ceil.v2f64(<2 x double> [[WIDE_LOAD:%.*]])441;442; ARMPL-SVE-LABEL: define void @ceil_f64443; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {444; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.ceil.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])445;446 entry:447 br label %for.body448 449 for.body:450 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]451 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv452 %in = load double, ptr %in.gep, align 8453 %call = tail call double @llvm.ceil.f64(double %in)454 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv455 store double %call, ptr %out.gep, align 8456 %iv.next = add nuw nsw i64 %iv, 1457 %exitcond = icmp eq i64 %iv.next, 1000458 br i1 %exitcond, label %for.end, label %for.body459 460 for.end:461 ret void462}463 464define void @ceil_f32(ptr noalias %in.ptr, ptr %out.ptr) {465; LIBMVEC-NEON-LABEL: define void @ceil_f32466; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {467; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> [[WIDE_LOAD:%.*]])468;469; LIBMVEC-NEON-WIDTH-2-LABEL: define void @ceil_f32470; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {471; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> [[WIDE_LOAD:%.*]])472;473; LIBMVEC-SVE-LABEL: define void @ceil_f32474; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {475; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> [[WIDE_LOAD:%.*]])476;477; SLEEF-NEON-LABEL: define void @ceil_f32478; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {479; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> [[WIDE_LOAD:%.*]])480;481; SLEEF-SVE-LABEL: define void @ceil_f32482; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {483; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.ceil.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])484;485; ARMPL-NEON-LABEL: define void @ceil_f32486; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {487; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> [[WIDE_LOAD:%.*]])488;489; ARMPL-SVE-LABEL: define void @ceil_f32490; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {491; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.ceil.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])492;493 entry:494 br label %for.body495 496 for.body:497 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]498 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv499 %in = load float, ptr %in.gep, align 8500 %call = tail call float @llvm.ceil.f32(float %in)501 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv502 store float %call, ptr %out.gep, align 4503 %iv.next = add nuw nsw i64 %iv, 1504 %exitcond = icmp eq i64 %iv.next, 1000505 br i1 %exitcond, label %for.end, label %for.body506 507 for.end:508 ret void509}510 511declare double @llvm.copysign.f64(double, double)512declare float @llvm.copysign.f32(float, float)513 514define void @copysign_f64(ptr noalias %in.ptr, ptr %out.ptr) {515; LIBMVEC-NEON-LABEL: define void @copysign_f64516; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {517; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.copysign.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])518;519; LIBMVEC-NEON-WIDTH-2-LABEL: define void @copysign_f64520; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {521; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.copysign.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])522;523; LIBMVEC-SVE-LABEL: define void @copysign_f64524; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {525; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]])526; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.copysign.f64(double [[IN:%.*]], double [[IN]])527;528; SLEEF-NEON-LABEL: define void @copysign_f64529; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {530; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.copysign.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])531;532; SLEEF-SVE-LABEL: define void @copysign_f64533; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {534; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]])535;536; ARMPL-NEON-LABEL: define void @copysign_f64537; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {538; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.copysign.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])539;540; ARMPL-SVE-LABEL: define void @copysign_f64541; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {542; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]])543;544 entry:545 br label %for.body546 547 for.body:548 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]549 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv550 %in = load double, ptr %in.gep, align 8551 %call = tail call double @llvm.copysign.f64(double %in, double %in)552 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv553 store double %call, ptr %out.gep, align 8554 %iv.next = add nuw nsw i64 %iv, 1555 %exitcond = icmp eq i64 %iv.next, 1000556 br i1 %exitcond, label %for.end, label %for.body557 558 for.end:559 ret void560}561 562define void @copysign_f32(ptr noalias %in.ptr, ptr %out.ptr) {563; LIBMVEC-NEON-LABEL: define void @copysign_f32564; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {565; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.copysign.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])566;567; LIBMVEC-NEON-WIDTH-2-LABEL: define void @copysign_f32568; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {569; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.copysign.v2f32(<2 x float> [[WIDE_LOAD:%.*]], <2 x float> [[WIDE_LOAD]])570;571; LIBMVEC-SVE-LABEL: define void @copysign_f32572; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {573; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]])574; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.copysign.f32(float [[IN:%.*]], float [[IN]])575;576; SLEEF-NEON-LABEL: define void @copysign_f32577; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {578; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.copysign.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])579;580; SLEEF-SVE-LABEL: define void @copysign_f32581; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {582; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]])583;584; ARMPL-NEON-LABEL: define void @copysign_f32585; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {586; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.copysign.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])587;588; ARMPL-SVE-LABEL: define void @copysign_f32589; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {590; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]])591;592 entry:593 br label %for.body594 595 for.body:596 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]597 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv598 %in = load float, ptr %in.gep, align 8599 %call = tail call float @llvm.copysign.f32(float %in, float %in)600 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv601 store float %call, ptr %out.gep, align 4602 %iv.next = add nuw nsw i64 %iv, 1603 %exitcond = icmp eq i64 %iv.next, 1000604 br i1 %exitcond, label %for.end, label %for.body605 606 for.end:607 ret void608}609 610declare double @llvm.cos.f64(double)611declare float @llvm.cos.f32(float)612 613define void @cos_f64(ptr noalias %in.ptr, ptr %out.ptr) {614; LIBMVEC-NEON-LABEL: define void @cos_f64615; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {616; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_cos(<2 x double> [[WIDE_LOAD:%.*]])617;618; LIBMVEC-NEON-WIDTH-2-LABEL: define void @cos_f64619; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {620; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_cos(<2 x double> [[WIDE_LOAD:%.*]])621;622; LIBMVEC-SVE-LABEL: define void @cos_f64623; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {624; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cos(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))625; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.cos.f64(double [[IN:%.*]])626;627; SLEEF-NEON-LABEL: define void @cos_f64628; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {629; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_cos(<2 x double> [[WIDE_LOAD:%.*]])630;631; SLEEF-SVE-LABEL: define void @cos_f64632; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {633; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cos(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])634;635; ARMPL-NEON-LABEL: define void @cos_f64636; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {637; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vcosq_f64(<2 x double> [[WIDE_LOAD:%.*]])638;639; ARMPL-SVE-LABEL: define void @cos_f64640; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {641; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svcos_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])642;643 entry:644 br label %for.body645 646 for.body:647 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]648 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv649 %in = load double, ptr %in.gep, align 8650 %call = tail call double @llvm.cos.f64(double %in)651 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv652 store double %call, ptr %out.gep, align 8653 %iv.next = add nuw nsw i64 %iv, 1654 %exitcond = icmp eq i64 %iv.next, 1000655 br i1 %exitcond, label %for.end, label %for.body656 657 for.end:658 ret void659}660 661define void @cos_f32(ptr noalias %in.ptr, ptr %out.ptr) {662; LIBMVEC-NEON-LABEL: define void @cos_f32663; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {664; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_cosf(<4 x float> [[WIDE_LOAD:%.*]])665;666; LIBMVEC-NEON-WIDTH-2-LABEL: define void @cos_f32667; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {668; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_cosf(<2 x float> [[WIDE_LOAD:%.*]])669;670; LIBMVEC-SVE-LABEL: define void @cos_f32671; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {672; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_cosf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))673; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.cos.f32(float [[IN:%.*]])674;675; SLEEF-NEON-LABEL: define void @cos_f32676; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {677; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_cosf(<4 x float> [[WIDE_LOAD:%.*]])678;679; SLEEF-SVE-LABEL: define void @cos_f32680; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {681; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_cosf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])682;683; ARMPL-NEON-LABEL: define void @cos_f32684; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {685; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vcosq_f32(<4 x float> [[WIDE_LOAD:%.*]])686;687; ARMPL-SVE-LABEL: define void @cos_f32688; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {689; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svcos_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])690;691 entry:692 br label %for.body693 694 for.body:695 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]696 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv697 %in = load float, ptr %in.gep, align 8698 %call = tail call float @llvm.cos.f32(float %in)699 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv700 store float %call, ptr %out.gep, align 4701 %iv.next = add nuw nsw i64 %iv, 1702 %exitcond = icmp eq i64 %iv.next, 1000703 br i1 %exitcond, label %for.end, label %for.body704 705 for.end:706 ret void707}708 709declare double @llvm.cosh.f64(double)710declare float @llvm.cosh.f32(float)711 712define void @cosh_f64(ptr noalias %in.ptr, ptr %out.ptr) {713; LIBMVEC-NEON-LABEL: define void @cosh_f64714; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {715; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_cosh(<2 x double> [[WIDE_LOAD:%.*]])716;717; LIBMVEC-NEON-WIDTH-2-LABEL: define void @cosh_f64718; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {719; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_cosh(<2 x double> [[WIDE_LOAD:%.*]])720;721; LIBMVEC-SVE-LABEL: define void @cosh_f64722; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {723; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cosh(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))724; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.cosh.f64(double [[IN:%.*]])725;726; SLEEF-NEON-LABEL: define void @cosh_f64727; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {728; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_cosh(<2 x double> [[WIDE_LOAD:%.*]])729;730; SLEEF-SVE-LABEL: define void @cosh_f64731; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {732; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cosh(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])733;734; ARMPL-NEON-LABEL: define void @cosh_f64735; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {736; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vcoshq_f64(<2 x double> [[WIDE_LOAD:%.*]])737;738; ARMPL-SVE-LABEL: define void @cosh_f64739; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {740; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svcosh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])741;742 entry:743 br label %for.body744 745 for.body:746 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]747 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv748 %in = load double, ptr %in.gep, align 8749 %call = tail call double @llvm.cosh.f64(double %in)750 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv751 store double %call, ptr %out.gep, align 8752 %iv.next = add nuw nsw i64 %iv, 1753 %exitcond = icmp eq i64 %iv.next, 1000754 br i1 %exitcond, label %for.end, label %for.body755 756 for.end:757 ret void758}759 760define void @cosh_f32(ptr noalias %in.ptr, ptr %out.ptr) {761; LIBMVEC-NEON-LABEL: define void @cosh_f32762; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {763; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_coshf(<4 x float> [[WIDE_LOAD:%.*]])764;765; LIBMVEC-NEON-WIDTH-2-LABEL: define void @cosh_f32766; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {767; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_coshf(<2 x float> [[WIDE_LOAD:%.*]])768;769; LIBMVEC-SVE-LABEL: define void @cosh_f32770; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {771; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_coshf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))772; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.cosh.f32(float [[IN:%.*]])773;774; SLEEF-NEON-LABEL: define void @cosh_f32775; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {776; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_coshf(<4 x float> [[WIDE_LOAD:%.*]])777;778; SLEEF-SVE-LABEL: define void @cosh_f32779; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {780; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_coshf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])781;782; ARMPL-NEON-LABEL: define void @cosh_f32783; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {784; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vcoshq_f32(<4 x float> [[WIDE_LOAD:%.*]])785;786; ARMPL-SVE-LABEL: define void @cosh_f32787; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {788; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svcosh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])789;790 entry:791 br label %for.body792 793 for.body:794 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]795 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv796 %in = load float, ptr %in.gep, align 8797 %call = tail call float @llvm.cosh.f32(float %in)798 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv799 store float %call, ptr %out.gep, align 4800 %iv.next = add nuw nsw i64 %iv, 1801 %exitcond = icmp eq i64 %iv.next, 1000802 br i1 %exitcond, label %for.end, label %for.body803 804 for.end:805 ret void806}807 808declare double @llvm.exp.f64(double)809declare float @llvm.exp.f32(float)810 811define void @exp_f64(ptr noalias %in.ptr, ptr %out.ptr) {812; LIBMVEC-NEON-LABEL: define void @exp_f64813; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {814; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_exp(<2 x double> [[WIDE_LOAD:%.*]])815;816; LIBMVEC-NEON-WIDTH-2-LABEL: define void @exp_f64817; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {818; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_exp(<2 x double> [[WIDE_LOAD:%.*]])819;820; LIBMVEC-SVE-LABEL: define void @exp_f64821; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {822; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))823; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.exp.f64(double [[IN:%.*]])824;825; SLEEF-NEON-LABEL: define void @exp_f64826; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {827; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_exp(<2 x double> [[WIDE_LOAD:%.*]])828;829; SLEEF-SVE-LABEL: define void @exp_f64830; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {831; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])832;833; ARMPL-NEON-LABEL: define void @exp_f64834; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {835; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vexpq_f64(<2 x double> [[WIDE_LOAD:%.*]])836;837; ARMPL-SVE-LABEL: define void @exp_f64838; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {839; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svexp_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])840;841 entry:842 br label %for.body843 844 for.body:845 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]846 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv847 %in = load double, ptr %in.gep, align 8848 %call = tail call double @llvm.exp.f64(double %in)849 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv850 store double %call, ptr %out.gep, align 8851 %iv.next = add nuw nsw i64 %iv, 1852 %exitcond = icmp eq i64 %iv.next, 1000853 br i1 %exitcond, label %for.end, label %for.body854 855 for.end:856 ret void857}858 859define void @exp_f32(ptr noalias %in.ptr, ptr %out.ptr) {860; LIBMVEC-NEON-LABEL: define void @exp_f32861; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {862; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_expf(<4 x float> [[WIDE_LOAD:%.*]])863;864; LIBMVEC-NEON-WIDTH-2-LABEL: define void @exp_f32865; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {866; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_expf(<2 x float> [[WIDE_LOAD:%.*]])867;868; LIBMVEC-SVE-LABEL: define void @exp_f32869; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {870; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_expf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))871; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.exp.f32(float [[IN:%.*]])872;873; SLEEF-NEON-LABEL: define void @exp_f32874; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {875; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_expf(<4 x float> [[WIDE_LOAD:%.*]])876;877; SLEEF-SVE-LABEL: define void @exp_f32878; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {879; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_expf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])880;881; ARMPL-NEON-LABEL: define void @exp_f32882; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {883; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vexpq_f32(<4 x float> [[WIDE_LOAD:%.*]])884;885; ARMPL-SVE-LABEL: define void @exp_f32886; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {887; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svexp_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])888;889 entry:890 br label %for.body891 892 for.body:893 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]894 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv895 %in = load float, ptr %in.gep, align 8896 %call = tail call float @llvm.exp.f32(float %in)897 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv898 store float %call, ptr %out.gep, align 4899 %iv.next = add nuw nsw i64 %iv, 1900 %exitcond = icmp eq i64 %iv.next, 1000901 br i1 %exitcond, label %for.end, label %for.body902 903 for.end:904 ret void905}906 907declare double @llvm.exp10.f64(double)908declare float @llvm.exp10.f32(float)909 910define void @exp10_f64(ptr noalias %in.ptr, ptr %out.ptr) {911; LIBMVEC-NEON-LABEL: define void @exp10_f64912; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {913; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_exp10(<2 x double> [[WIDE_LOAD:%.*]])914;915; LIBMVEC-NEON-WIDTH-2-LABEL: define void @exp10_f64916; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {917; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_exp10(<2 x double> [[WIDE_LOAD:%.*]])918;919; LIBMVEC-SVE-LABEL: define void @exp10_f64920; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {921; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp10(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))922; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.exp10.f64(double [[IN:%.*]])923;924; SLEEF-NEON-LABEL: define void @exp10_f64925; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {926; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_exp10(<2 x double> [[WIDE_LOAD:%.*]])927;928; SLEEF-SVE-LABEL: define void @exp10_f64929; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {930; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp10(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])931;932; ARMPL-NEON-LABEL: define void @exp10_f64933; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {934; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vexp10q_f64(<2 x double> [[WIDE_LOAD:%.*]])935;936; ARMPL-SVE-LABEL: define void @exp10_f64937; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {938; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svexp10_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])939;940 entry:941 br label %for.body942 943 for.body:944 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]945 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv946 %in = load double, ptr %in.gep, align 8947 %call = tail call double @llvm.exp10.f64(double %in)948 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv949 store double %call, ptr %out.gep, align 8950 %iv.next = add nuw nsw i64 %iv, 1951 %exitcond = icmp eq i64 %iv.next, 1000952 br i1 %exitcond, label %for.end, label %for.body953 954 for.end:955 ret void956}957 958define void @exp10_f32(ptr noalias %in.ptr, ptr %out.ptr) {959; LIBMVEC-NEON-LABEL: define void @exp10_f32960; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {961; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_exp10f(<4 x float> [[WIDE_LOAD:%.*]])962;963; LIBMVEC-NEON-WIDTH-2-LABEL: define void @exp10_f32964; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {965; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_exp10f(<2 x float> [[WIDE_LOAD:%.*]])966;967; LIBMVEC-SVE-LABEL: define void @exp10_f32968; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {969; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp10f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))970; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.exp10.f32(float [[IN:%.*]])971;972; SLEEF-NEON-LABEL: define void @exp10_f32973; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {974; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_exp10f(<4 x float> [[WIDE_LOAD:%.*]])975;976; SLEEF-SVE-LABEL: define void @exp10_f32977; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {978; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp10f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])979;980; ARMPL-NEON-LABEL: define void @exp10_f32981; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {982; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vexp10q_f32(<4 x float> [[WIDE_LOAD:%.*]])983;984; ARMPL-SVE-LABEL: define void @exp10_f32985; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {986; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svexp10_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])987;988 entry:989 br label %for.body990 991 for.body:992 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]993 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv994 %in = load float, ptr %in.gep, align 8995 %call = tail call float @llvm.exp10.f32(float %in)996 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv997 store float %call, ptr %out.gep, align 4998 %iv.next = add nuw nsw i64 %iv, 1999 %exitcond = icmp eq i64 %iv.next, 10001000 br i1 %exitcond, label %for.end, label %for.body1001 1002 for.end:1003 ret void1004}1005 1006declare double @llvm.exp2.f64(double)1007declare float @llvm.exp2.f32(float)1008 1009define void @exp2_f64(ptr noalias %in.ptr, ptr %out.ptr) {1010; LIBMVEC-NEON-LABEL: define void @exp2_f641011; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1012; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_exp2(<2 x double> [[WIDE_LOAD:%.*]])1013;1014; LIBMVEC-NEON-WIDTH-2-LABEL: define void @exp2_f641015; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1016; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_exp2(<2 x double> [[WIDE_LOAD:%.*]])1017;1018; LIBMVEC-SVE-LABEL: define void @exp2_f641019; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1020; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp2(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))1021; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.exp2.f64(double [[IN:%.*]])1022;1023; SLEEF-NEON-LABEL: define void @exp2_f641024; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1025; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_exp2(<2 x double> [[WIDE_LOAD:%.*]])1026;1027; SLEEF-SVE-LABEL: define void @exp2_f641028; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1029; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp2(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])1030;1031; ARMPL-NEON-LABEL: define void @exp2_f641032; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1033; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vexp2q_f64(<2 x double> [[WIDE_LOAD:%.*]])1034;1035; ARMPL-SVE-LABEL: define void @exp2_f641036; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1037; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svexp2_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])1038;1039 entry:1040 br label %for.body1041 1042 for.body:1043 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1044 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1045 %in = load double, ptr %in.gep, align 81046 %call = tail call double @llvm.exp2.f64(double %in)1047 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1048 store double %call, ptr %out.gep, align 81049 %iv.next = add nuw nsw i64 %iv, 11050 %exitcond = icmp eq i64 %iv.next, 10001051 br i1 %exitcond, label %for.end, label %for.body1052 1053 for.end:1054 ret void1055}1056 1057define void @exp2_f32(ptr noalias %in.ptr, ptr %out.ptr) {1058; LIBMVEC-NEON-LABEL: define void @exp2_f321059; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1060; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_exp2f(<4 x float> [[WIDE_LOAD:%.*]])1061;1062; LIBMVEC-NEON-WIDTH-2-LABEL: define void @exp2_f321063; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1064; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_exp2f(<2 x float> [[WIDE_LOAD:%.*]])1065;1066; LIBMVEC-SVE-LABEL: define void @exp2_f321067; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1068; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp2f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))1069; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.exp2.f32(float [[IN:%.*]])1070;1071; SLEEF-NEON-LABEL: define void @exp2_f321072; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1073; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_exp2f(<4 x float> [[WIDE_LOAD:%.*]])1074;1075; SLEEF-SVE-LABEL: define void @exp2_f321076; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1077; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp2f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])1078;1079; ARMPL-NEON-LABEL: define void @exp2_f321080; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1081; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vexp2q_f32(<4 x float> [[WIDE_LOAD:%.*]])1082;1083; ARMPL-SVE-LABEL: define void @exp2_f321084; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1085; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svexp2_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])1086;1087 entry:1088 br label %for.body1089 1090 for.body:1091 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1092 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1093 %in = load float, ptr %in.gep, align 81094 %call = tail call float @llvm.exp2.f32(float %in)1095 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1096 store float %call, ptr %out.gep, align 41097 %iv.next = add nuw nsw i64 %iv, 11098 %exitcond = icmp eq i64 %iv.next, 10001099 br i1 %exitcond, label %for.end, label %for.body1100 1101 for.end:1102 ret void1103}1104 1105declare double @llvm.fabs.f64(double)1106declare float @llvm.fabs.f32(float)1107 1108define void @fabs_f64(ptr noalias %in.ptr, ptr %out.ptr) {1109; LIBMVEC-NEON-LABEL: define void @fabs_f641110; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1111; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1112;1113; LIBMVEC-NEON-WIDTH-2-LABEL: define void @fabs_f641114; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1115; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1116;1117; LIBMVEC-SVE-LABEL: define void @fabs_f641118; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1119; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1120;1121; SLEEF-NEON-LABEL: define void @fabs_f641122; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1123; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1124;1125; SLEEF-SVE-LABEL: define void @fabs_f641126; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1127; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.fabs.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])1128;1129; ARMPL-NEON-LABEL: define void @fabs_f641130; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1131; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1132;1133; ARMPL-SVE-LABEL: define void @fabs_f641134; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1135; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.fabs.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])1136;1137 entry:1138 br label %for.body1139 1140 for.body:1141 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1142 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1143 %in = load double, ptr %in.gep, align 81144 %call = tail call double @llvm.fabs.f64(double %in)1145 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1146 store double %call, ptr %out.gep, align 81147 %iv.next = add nuw nsw i64 %iv, 11148 %exitcond = icmp eq i64 %iv.next, 10001149 br i1 %exitcond, label %for.end, label %for.body1150 1151 for.end:1152 ret void1153}1154 1155define void @fabs_f32(ptr noalias %in.ptr, ptr %out.ptr) {1156; LIBMVEC-NEON-LABEL: define void @fabs_f321157; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1158; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1159;1160; LIBMVEC-NEON-WIDTH-2-LABEL: define void @fabs_f321161; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1162; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[WIDE_LOAD:%.*]])1163;1164; LIBMVEC-SVE-LABEL: define void @fabs_f321165; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1166; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1167;1168; SLEEF-NEON-LABEL: define void @fabs_f321169; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1170; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1171;1172; SLEEF-SVE-LABEL: define void @fabs_f321173; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1174; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.fabs.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])1175;1176; ARMPL-NEON-LABEL: define void @fabs_f321177; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1178; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1179;1180; ARMPL-SVE-LABEL: define void @fabs_f321181; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1182; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.fabs.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])1183;1184 entry:1185 br label %for.body1186 1187 for.body:1188 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1189 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1190 %in = load float, ptr %in.gep, align 81191 %call = tail call float @llvm.fabs.f32(float %in)1192 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1193 store float %call, ptr %out.gep, align 41194 %iv.next = add nuw nsw i64 %iv, 11195 %exitcond = icmp eq i64 %iv.next, 10001196 br i1 %exitcond, label %for.end, label %for.body1197 1198 for.end:1199 ret void1200}1201 1202declare double @llvm.floor.f64(double)1203declare float @llvm.floor.f32(float)1204 1205define void @floor_f64(ptr noalias %in.ptr, ptr %out.ptr) {1206; LIBMVEC-NEON-LABEL: define void @floor_f641207; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1208; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.floor.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1209;1210; LIBMVEC-NEON-WIDTH-2-LABEL: define void @floor_f641211; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1212; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.floor.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1213;1214; LIBMVEC-SVE-LABEL: define void @floor_f641215; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1216; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.floor.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1217;1218; SLEEF-NEON-LABEL: define void @floor_f641219; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1220; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.floor.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1221;1222; SLEEF-SVE-LABEL: define void @floor_f641223; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1224; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.floor.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])1225;1226; ARMPL-NEON-LABEL: define void @floor_f641227; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1228; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.floor.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1229;1230; ARMPL-SVE-LABEL: define void @floor_f641231; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1232; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.floor.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])1233;1234 entry:1235 br label %for.body1236 1237 for.body:1238 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1239 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1240 %in = load double, ptr %in.gep, align 81241 %call = tail call double @llvm.floor.f64(double %in)1242 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1243 store double %call, ptr %out.gep, align 81244 %iv.next = add nuw nsw i64 %iv, 11245 %exitcond = icmp eq i64 %iv.next, 10001246 br i1 %exitcond, label %for.end, label %for.body1247 1248 for.end:1249 ret void1250}1251 1252define void @floor_f32(ptr noalias %in.ptr, ptr %out.ptr) {1253; LIBMVEC-NEON-LABEL: define void @floor_f321254; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1255; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1256;1257; LIBMVEC-NEON-WIDTH-2-LABEL: define void @floor_f321258; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1259; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[WIDE_LOAD:%.*]])1260;1261; LIBMVEC-SVE-LABEL: define void @floor_f321262; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1263; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1264;1265; SLEEF-NEON-LABEL: define void @floor_f321266; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1267; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1268;1269; SLEEF-SVE-LABEL: define void @floor_f321270; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1271; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.floor.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])1272;1273; ARMPL-NEON-LABEL: define void @floor_f321274; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1275; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1276;1277; ARMPL-SVE-LABEL: define void @floor_f321278; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1279; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.floor.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])1280;1281 entry:1282 br label %for.body1283 1284 for.body:1285 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1286 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1287 %in = load float, ptr %in.gep, align 81288 %call = tail call float @llvm.floor.f32(float %in)1289 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1290 store float %call, ptr %out.gep, align 41291 %iv.next = add nuw nsw i64 %iv, 11292 %exitcond = icmp eq i64 %iv.next, 10001293 br i1 %exitcond, label %for.end, label %for.body1294 1295 for.end:1296 ret void1297}1298 1299declare double @llvm.fma.f64(double, double, double)1300declare float @llvm.fma.f32(float, float, float)1301 1302define void @fma_f64(ptr noalias %in.ptr, ptr %out.ptr) {1303; LIBMVEC-NEON-LABEL: define void @fma_f641304; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1305; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]], <2 x double> [[WIDE_LOAD]])1306;1307; LIBMVEC-NEON-WIDTH-2-LABEL: define void @fma_f641308; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1309; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]], <2 x double> [[WIDE_LOAD]])1310;1311; LIBMVEC-SVE-LABEL: define void @fma_f641312; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1313; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @llvm.fma.nxv2f64(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x double> [[WIDE_LOAD]])1314; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.fma.f64(double [[IN:%.*]], double [[IN]], double [[IN]])1315;1316; SLEEF-NEON-LABEL: define void @fma_f641317; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1318; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]], <2 x double> [[WIDE_LOAD]])1319;1320; SLEEF-SVE-LABEL: define void @fma_f641321; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1322; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.fma.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]])1323;1324; ARMPL-NEON-LABEL: define void @fma_f641325; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1326; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]], <2 x double> [[WIDE_LOAD]])1327;1328; ARMPL-SVE-LABEL: define void @fma_f641329; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1330; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.fma.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]])1331;1332 entry:1333 br label %for.body1334 1335 for.body:1336 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1337 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1338 %in = load double, ptr %in.gep, align 81339 %call = tail call double @llvm.fma.f64(double %in, double %in, double %in)1340 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1341 store double %call, ptr %out.gep, align 81342 %iv.next = add nuw nsw i64 %iv, 11343 %exitcond = icmp eq i64 %iv.next, 10001344 br i1 %exitcond, label %for.end, label %for.body1345 1346 for.end:1347 ret void1348}1349 1350define void @fma_f32(ptr noalias %in.ptr, ptr %out.ptr) {1351; LIBMVEC-NEON-LABEL: define void @fma_f321352; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1353; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]], <4 x float> [[WIDE_LOAD]])1354;1355; LIBMVEC-NEON-WIDTH-2-LABEL: define void @fma_f321356; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1357; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[WIDE_LOAD:%.*]], <2 x float> [[WIDE_LOAD]], <2 x float> [[WIDE_LOAD]])1358;1359; LIBMVEC-SVE-LABEL: define void @fma_f321360; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1361; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @llvm.fma.nxv4f32(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x float> [[WIDE_LOAD]])1362; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.fma.f32(float [[IN:%.*]], float [[IN]], float [[IN]])1363;1364; SLEEF-NEON-LABEL: define void @fma_f321365; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1366; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]], <4 x float> [[WIDE_LOAD]])1367;1368; SLEEF-SVE-LABEL: define void @fma_f321369; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1370; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.fma.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]])1371;1372; ARMPL-NEON-LABEL: define void @fma_f321373; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1374; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]], <4 x float> [[WIDE_LOAD]])1375;1376; ARMPL-SVE-LABEL: define void @fma_f321377; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1378; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.fma.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]])1379;1380 entry:1381 br label %for.body1382 1383 for.body:1384 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1385 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1386 %in = load float, ptr %in.gep, align 81387 %call = tail call float @llvm.fma.f32(float %in, float %in, float %in)1388 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1389 store float %call, ptr %out.gep, align 41390 %iv.next = add nuw nsw i64 %iv, 11391 %exitcond = icmp eq i64 %iv.next, 10001392 br i1 %exitcond, label %for.end, label %for.body1393 1394 for.end:1395 ret void1396}1397 1398declare double @llvm.log.f64(double)1399declare float @llvm.log.f32(float)1400 1401define void @log_f64(ptr noalias %in.ptr, ptr %out.ptr) {1402; LIBMVEC-NEON-LABEL: define void @log_f641403; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1404; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_log(<2 x double> [[WIDE_LOAD:%.*]])1405;1406; LIBMVEC-NEON-WIDTH-2-LABEL: define void @log_f641407; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1408; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_log(<2 x double> [[WIDE_LOAD:%.*]])1409;1410; LIBMVEC-SVE-LABEL: define void @log_f641411; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1412; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))1413; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.log.f64(double [[IN:%.*]])1414;1415; SLEEF-NEON-LABEL: define void @log_f641416; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1417; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_log(<2 x double> [[WIDE_LOAD:%.*]])1418;1419; SLEEF-SVE-LABEL: define void @log_f641420; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1421; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])1422;1423; ARMPL-NEON-LABEL: define void @log_f641424; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1425; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vlogq_f64(<2 x double> [[WIDE_LOAD:%.*]])1426;1427; ARMPL-SVE-LABEL: define void @log_f641428; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1429; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svlog_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])1430;1431 entry:1432 br label %for.body1433 1434 for.body:1435 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1436 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1437 %in = load double, ptr %in.gep, align 81438 %call = tail call double @llvm.log.f64(double %in)1439 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1440 store double %call, ptr %out.gep, align 81441 %iv.next = add nuw nsw i64 %iv, 11442 %exitcond = icmp eq i64 %iv.next, 10001443 br i1 %exitcond, label %for.end, label %for.body1444 1445 for.end:1446 ret void1447}1448 1449define void @log_f32(ptr noalias %in.ptr, ptr %out.ptr) {1450; LIBMVEC-NEON-LABEL: define void @log_f321451; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1452; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_logf(<4 x float> [[WIDE_LOAD:%.*]])1453;1454; LIBMVEC-NEON-WIDTH-2-LABEL: define void @log_f321455; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1456; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_logf(<2 x float> [[WIDE_LOAD:%.*]])1457;1458; LIBMVEC-SVE-LABEL: define void @log_f321459; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1460; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_logf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))1461; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.log.f32(float [[IN:%.*]])1462;1463; SLEEF-NEON-LABEL: define void @log_f321464; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1465; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_logf(<4 x float> [[WIDE_LOAD:%.*]])1466;1467; SLEEF-SVE-LABEL: define void @log_f321468; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1469; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_logf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])1470;1471; ARMPL-NEON-LABEL: define void @log_f321472; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1473; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vlogq_f32(<4 x float> [[WIDE_LOAD:%.*]])1474;1475; ARMPL-SVE-LABEL: define void @log_f321476; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1477; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svlog_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])1478;1479 entry:1480 br label %for.body1481 1482 for.body:1483 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1484 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1485 %in = load float, ptr %in.gep, align 81486 %call = tail call float @llvm.log.f32(float %in)1487 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1488 store float %call, ptr %out.gep, align 41489 %iv.next = add nuw nsw i64 %iv, 11490 %exitcond = icmp eq i64 %iv.next, 10001491 br i1 %exitcond, label %for.end, label %for.body1492 1493 for.end:1494 ret void1495}1496 1497declare double @llvm.log10.f64(double)1498declare float @llvm.log10.f32(float)1499 1500define void @log10_f64(ptr noalias %in.ptr, ptr %out.ptr) {1501; LIBMVEC-NEON-LABEL: define void @log10_f641502; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1503; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_log10(<2 x double> [[WIDE_LOAD:%.*]])1504;1505; LIBMVEC-NEON-WIDTH-2-LABEL: define void @log10_f641506; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1507; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_log10(<2 x double> [[WIDE_LOAD:%.*]])1508;1509; LIBMVEC-SVE-LABEL: define void @log10_f641510; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1511; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log10(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))1512; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.log10.f64(double [[IN:%.*]])1513;1514; SLEEF-NEON-LABEL: define void @log10_f641515; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1516; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_log10(<2 x double> [[WIDE_LOAD:%.*]])1517;1518; SLEEF-SVE-LABEL: define void @log10_f641519; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1520; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log10(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])1521;1522; ARMPL-NEON-LABEL: define void @log10_f641523; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1524; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vlog10q_f64(<2 x double> [[WIDE_LOAD:%.*]])1525;1526; ARMPL-SVE-LABEL: define void @log10_f641527; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1528; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svlog10_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])1529;1530 entry:1531 br label %for.body1532 1533 for.body:1534 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1535 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1536 %in = load double, ptr %in.gep, align 81537 %call = tail call double @llvm.log10.f64(double %in)1538 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1539 store double %call, ptr %out.gep, align 81540 %iv.next = add nuw nsw i64 %iv, 11541 %exitcond = icmp eq i64 %iv.next, 10001542 br i1 %exitcond, label %for.end, label %for.body1543 1544 for.end:1545 ret void1546}1547 1548define void @log10_f32(ptr noalias %in.ptr, ptr %out.ptr) {1549; LIBMVEC-NEON-LABEL: define void @log10_f321550; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1551; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_log10f(<4 x float> [[WIDE_LOAD:%.*]])1552;1553; LIBMVEC-NEON-WIDTH-2-LABEL: define void @log10_f321554; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1555; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_log10f(<2 x float> [[WIDE_LOAD:%.*]])1556;1557; LIBMVEC-SVE-LABEL: define void @log10_f321558; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1559; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log10f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))1560; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.log10.f32(float [[IN:%.*]])1561;1562; SLEEF-NEON-LABEL: define void @log10_f321563; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1564; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_log10f(<4 x float> [[WIDE_LOAD:%.*]])1565;1566; SLEEF-SVE-LABEL: define void @log10_f321567; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1568; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log10f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])1569;1570; ARMPL-NEON-LABEL: define void @log10_f321571; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1572; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vlog10q_f32(<4 x float> [[WIDE_LOAD:%.*]])1573;1574; ARMPL-SVE-LABEL: define void @log10_f321575; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1576; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svlog10_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])1577;1578 entry:1579 br label %for.body1580 1581 for.body:1582 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1583 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1584 %in = load float, ptr %in.gep, align 81585 %call = tail call float @llvm.log10.f32(float %in)1586 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1587 store float %call, ptr %out.gep, align 41588 %iv.next = add nuw nsw i64 %iv, 11589 %exitcond = icmp eq i64 %iv.next, 10001590 br i1 %exitcond, label %for.end, label %for.body1591 1592 for.end:1593 ret void1594}1595 1596declare double @llvm.log2.f64(double)1597declare float @llvm.log2.f32(float)1598 1599define void @log2_f64(ptr noalias %in.ptr, ptr %out.ptr) {1600; LIBMVEC-NEON-LABEL: define void @log2_f641601; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1602; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_log2(<2 x double> [[WIDE_LOAD:%.*]])1603;1604; LIBMVEC-NEON-WIDTH-2-LABEL: define void @log2_f641605; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1606; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_log2(<2 x double> [[WIDE_LOAD:%.*]])1607;1608; LIBMVEC-SVE-LABEL: define void @log2_f641609; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1610; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log2(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))1611; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.log2.f64(double [[IN:%.*]])1612;1613; SLEEF-NEON-LABEL: define void @log2_f641614; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1615; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_log2(<2 x double> [[WIDE_LOAD:%.*]])1616;1617; SLEEF-SVE-LABEL: define void @log2_f641618; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1619; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log2(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])1620;1621; ARMPL-NEON-LABEL: define void @log2_f641622; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1623; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vlog2q_f64(<2 x double> [[WIDE_LOAD:%.*]])1624;1625; ARMPL-SVE-LABEL: define void @log2_f641626; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1627; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svlog2_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])1628;1629 entry:1630 br label %for.body1631 1632 for.body:1633 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1634 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1635 %in = load double, ptr %in.gep, align 81636 %call = tail call double @llvm.log2.f64(double %in)1637 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1638 store double %call, ptr %out.gep, align 81639 %iv.next = add nuw nsw i64 %iv, 11640 %exitcond = icmp eq i64 %iv.next, 10001641 br i1 %exitcond, label %for.end, label %for.body1642 1643 for.end:1644 ret void1645}1646 1647define void @log2_f32(ptr noalias %in.ptr, ptr %out.ptr) {1648; LIBMVEC-NEON-LABEL: define void @log2_f321649; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1650; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_log2f(<4 x float> [[WIDE_LOAD:%.*]])1651;1652; LIBMVEC-NEON-WIDTH-2-LABEL: define void @log2_f321653; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1654; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_log2f(<2 x float> [[WIDE_LOAD:%.*]])1655;1656; LIBMVEC-SVE-LABEL: define void @log2_f321657; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1658; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log2f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))1659; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.log2.f32(float [[IN:%.*]])1660;1661; SLEEF-NEON-LABEL: define void @log2_f321662; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1663; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_log2f(<4 x float> [[WIDE_LOAD:%.*]])1664;1665; SLEEF-SVE-LABEL: define void @log2_f321666; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1667; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log2f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])1668;1669; ARMPL-NEON-LABEL: define void @log2_f321670; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1671; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vlog2q_f32(<4 x float> [[WIDE_LOAD:%.*]])1672;1673; ARMPL-SVE-LABEL: define void @log2_f321674; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1675; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svlog2_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])1676;1677 entry:1678 br label %for.body1679 1680 for.body:1681 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1682 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1683 %in = load float, ptr %in.gep, align 81684 %call = tail call float @llvm.log2.f32(float %in)1685 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1686 store float %call, ptr %out.gep, align 41687 %iv.next = add nuw nsw i64 %iv, 11688 %exitcond = icmp eq i64 %iv.next, 10001689 br i1 %exitcond, label %for.end, label %for.body1690 1691 for.end:1692 ret void1693}1694 1695declare double @llvm.maxnum.f64(double, double)1696declare float @llvm.maxnum.f32(float, float)1697 1698define void @maxnum_f64(ptr noalias %in.ptr, ptr %out.ptr) {1699; LIBMVEC-NEON-LABEL: define void @maxnum_f641700; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1701; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.maxnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1702;1703; LIBMVEC-NEON-WIDTH-2-LABEL: define void @maxnum_f641704; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1705; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.maxnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1706;1707; LIBMVEC-SVE-LABEL: define void @maxnum_f641708; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1709; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.maxnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1710;1711; SLEEF-NEON-LABEL: define void @maxnum_f641712; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1713; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.maxnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1714;1715; SLEEF-SVE-LABEL: define void @maxnum_f641716; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1717; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.maxnum.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]])1718;1719; ARMPL-NEON-LABEL: define void @maxnum_f641720; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1721; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.maxnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1722;1723; ARMPL-SVE-LABEL: define void @maxnum_f641724; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1725; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.maxnum.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]])1726;1727 entry:1728 br label %for.body1729 1730 for.body:1731 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1732 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1733 %in = load double, ptr %in.gep, align 81734 %call = tail call double @llvm.maxnum.f64(double %in, double %in)1735 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1736 store double %call, ptr %out.gep, align 81737 %iv.next = add nuw nsw i64 %iv, 11738 %exitcond = icmp eq i64 %iv.next, 10001739 br i1 %exitcond, label %for.end, label %for.body1740 1741 for.end:1742 ret void1743}1744 1745define void @maxnum_f32(ptr noalias %in.ptr, ptr %out.ptr) {1746; LIBMVEC-NEON-LABEL: define void @maxnum_f321747; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1748; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])1749;1750; LIBMVEC-NEON-WIDTH-2-LABEL: define void @maxnum_f321751; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1752; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.maxnum.v2f32(<2 x float> [[WIDE_LOAD:%.*]], <2 x float> [[WIDE_LOAD]])1753;1754; LIBMVEC-SVE-LABEL: define void @maxnum_f321755; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1756; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])1757;1758; SLEEF-NEON-LABEL: define void @maxnum_f321759; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1760; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])1761;1762; SLEEF-SVE-LABEL: define void @maxnum_f321763; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1764; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.maxnum.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]])1765;1766; ARMPL-NEON-LABEL: define void @maxnum_f321767; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1768; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])1769;1770; ARMPL-SVE-LABEL: define void @maxnum_f321771; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1772; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.maxnum.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]])1773;1774 entry:1775 br label %for.body1776 1777 for.body:1778 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1779 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1780 %in = load float, ptr %in.gep, align 81781 %call = tail call float @llvm.maxnum.f32(float %in, float %in)1782 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1783 store float %call, ptr %out.gep, align 41784 %iv.next = add nuw nsw i64 %iv, 11785 %exitcond = icmp eq i64 %iv.next, 10001786 br i1 %exitcond, label %for.end, label %for.body1787 1788 for.end:1789 ret void1790}1791 1792declare double @llvm.minnum.f64(double, double)1793declare float @llvm.minnum.f32(float, float)1794 1795define void @minnum_f64(ptr noalias %in.ptr, ptr %out.ptr) {1796; LIBMVEC-NEON-LABEL: define void @minnum_f641797; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1798; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.minnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1799;1800; LIBMVEC-NEON-WIDTH-2-LABEL: define void @minnum_f641801; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1802; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.minnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1803;1804; LIBMVEC-SVE-LABEL: define void @minnum_f641805; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1806; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.minnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1807;1808; SLEEF-NEON-LABEL: define void @minnum_f641809; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1810; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.minnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1811;1812; SLEEF-SVE-LABEL: define void @minnum_f641813; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1814; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.minnum.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]])1815;1816; ARMPL-NEON-LABEL: define void @minnum_f641817; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1818; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.minnum.v2f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1819;1820; ARMPL-SVE-LABEL: define void @minnum_f641821; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1822; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.minnum.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]])1823;1824 entry:1825 br label %for.body1826 1827 for.body:1828 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1829 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1830 %in = load double, ptr %in.gep, align 81831 %call = tail call double @llvm.minnum.f64(double %in, double %in)1832 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1833 store double %call, ptr %out.gep, align 81834 %iv.next = add nuw nsw i64 %iv, 11835 %exitcond = icmp eq i64 %iv.next, 10001836 br i1 %exitcond, label %for.end, label %for.body1837 1838 for.end:1839 ret void1840}1841 1842define void @minnum_f32(ptr noalias %in.ptr, ptr %out.ptr) {1843; LIBMVEC-NEON-LABEL: define void @minnum_f321844; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1845; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.minnum.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])1846;1847; LIBMVEC-NEON-WIDTH-2-LABEL: define void @minnum_f321848; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1849; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.minnum.v2f32(<2 x float> [[WIDE_LOAD:%.*]], <2 x float> [[WIDE_LOAD]])1850;1851; LIBMVEC-SVE-LABEL: define void @minnum_f321852; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1853; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.minnum.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])1854;1855; SLEEF-NEON-LABEL: define void @minnum_f321856; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1857; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.minnum.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])1858;1859; SLEEF-SVE-LABEL: define void @minnum_f321860; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1861; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.minnum.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]])1862;1863; ARMPL-NEON-LABEL: define void @minnum_f321864; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1865; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.minnum.v4f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])1866;1867; ARMPL-SVE-LABEL: define void @minnum_f321868; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1869; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.minnum.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]])1870;1871 entry:1872 br label %for.body1873 1874 for.body:1875 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1876 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1877 %in = load float, ptr %in.gep, align 81878 %call = tail call float @llvm.minnum.f32(float %in, float %in)1879 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1880 store float %call, ptr %out.gep, align 41881 %iv.next = add nuw nsw i64 %iv, 11882 %exitcond = icmp eq i64 %iv.next, 10001883 br i1 %exitcond, label %for.end, label %for.body1884 1885 for.end:1886 ret void1887}1888 1889declare double @llvm.nearbyint.f64(double)1890declare float @llvm.nearbyint.f32(float)1891 1892define void @nearbyint_f64(ptr noalias %in.ptr, ptr %out.ptr) {1893; LIBMVEC-NEON-LABEL: define void @nearbyint_f641894; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1895; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1896;1897; LIBMVEC-NEON-WIDTH-2-LABEL: define void @nearbyint_f641898; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1899; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1900;1901; LIBMVEC-SVE-LABEL: define void @nearbyint_f641902; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1903; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1904;1905; SLEEF-NEON-LABEL: define void @nearbyint_f641906; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1907; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1908;1909; SLEEF-SVE-LABEL: define void @nearbyint_f641910; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1911; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.nearbyint.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])1912;1913; ARMPL-NEON-LABEL: define void @nearbyint_f641914; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1915; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])1916;1917; ARMPL-SVE-LABEL: define void @nearbyint_f641918; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1919; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.nearbyint.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])1920;1921 entry:1922 br label %for.body1923 1924 for.body:1925 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1926 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv1927 %in = load double, ptr %in.gep, align 81928 %call = tail call double @llvm.nearbyint.f64(double %in)1929 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv1930 store double %call, ptr %out.gep, align 81931 %iv.next = add nuw nsw i64 %iv, 11932 %exitcond = icmp eq i64 %iv.next, 10001933 br i1 %exitcond, label %for.end, label %for.body1934 1935 for.end:1936 ret void1937}1938 1939define void @nearbyint_f32(ptr noalias %in.ptr, ptr %out.ptr) {1940; LIBMVEC-NEON-LABEL: define void @nearbyint_f321941; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1942; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1943;1944; LIBMVEC-NEON-WIDTH-2-LABEL: define void @nearbyint_f321945; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1946; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> [[WIDE_LOAD:%.*]])1947;1948; LIBMVEC-SVE-LABEL: define void @nearbyint_f321949; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1950; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1951;1952; SLEEF-NEON-LABEL: define void @nearbyint_f321953; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1954; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1955;1956; SLEEF-SVE-LABEL: define void @nearbyint_f321957; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1958; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.nearbyint.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])1959;1960; ARMPL-NEON-LABEL: define void @nearbyint_f321961; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1962; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> [[WIDE_LOAD:%.*]])1963;1964; ARMPL-SVE-LABEL: define void @nearbyint_f321965; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1966; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.nearbyint.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])1967;1968 entry:1969 br label %for.body1970 1971 for.body:1972 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1973 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv1974 %in = load float, ptr %in.gep, align 81975 %call = tail call float @llvm.nearbyint.f32(float %in)1976 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv1977 store float %call, ptr %out.gep, align 41978 %iv.next = add nuw nsw i64 %iv, 11979 %exitcond = icmp eq i64 %iv.next, 10001980 br i1 %exitcond, label %for.end, label %for.body1981 1982 for.end:1983 ret void1984}1985 1986declare double @llvm.pow.f64(double, double)1987declare float @llvm.pow.f32(float, float)1988 1989define void @pow_f64(ptr noalias %in.ptr, ptr %out.ptr) {1990; LIBMVEC-NEON-LABEL: define void @pow_f641991; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1992; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2vv_pow(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1993;1994; LIBMVEC-NEON-WIDTH-2-LABEL: define void @pow_f641995; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {1996; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2vv_pow(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])1997;1998; LIBMVEC-SVE-LABEL: define void @pow_f641999; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2000; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_pow(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true))2001; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.pow.f64(double [[IN:%.*]], double [[IN]])2002;2003; SLEEF-NEON-LABEL: define void @pow_f642004; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2005; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2vv_pow(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])2006;2007; SLEEF-SVE-LABEL: define void @pow_f642008; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2009; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_pow(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2010;2011; ARMPL-NEON-LABEL: define void @pow_f642012; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2013; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vpowq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])2014;2015; ARMPL-SVE-LABEL: define void @pow_f642016; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2017; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svpow_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2018;2019 entry:2020 br label %for.body2021 2022 for.body:2023 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2024 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv2025 %in = load double, ptr %in.gep, align 82026 %call = tail call double @llvm.pow.f64(double %in, double %in)2027 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv2028 store double %call, ptr %out.gep, align 82029 %iv.next = add nuw nsw i64 %iv, 12030 %exitcond = icmp eq i64 %iv.next, 10002031 br i1 %exitcond, label %for.end, label %for.body2032 2033 for.end:2034 ret void2035}2036 2037define void @pow_f32(ptr noalias %in.ptr, ptr %out.ptr) {2038; LIBMVEC-NEON-LABEL: define void @pow_f322039; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2040; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4vv_powf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])2041;2042; LIBMVEC-NEON-WIDTH-2-LABEL: define void @pow_f322043; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2044; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2vv_powf(<2 x float> [[WIDE_LOAD:%.*]], <2 x float> [[WIDE_LOAD]])2045;2046; LIBMVEC-SVE-LABEL: define void @pow_f322047; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2048; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_powf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true))2049; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.pow.f32(float [[IN:%.*]], float [[IN]])2050;2051; SLEEF-NEON-LABEL: define void @pow_f322052; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2053; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4vv_powf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])2054;2055; SLEEF-SVE-LABEL: define void @pow_f322056; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2057; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_powf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2058;2059; ARMPL-NEON-LABEL: define void @pow_f322060; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2061; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vpowq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])2062;2063; ARMPL-SVE-LABEL: define void @pow_f322064; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2065; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svpow_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2066;2067 entry:2068 br label %for.body2069 2070 for.body:2071 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2072 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv2073 %in = load float, ptr %in.gep, align 82074 %call = tail call float @llvm.pow.f32(float %in, float %in)2075 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv2076 store float %call, ptr %out.gep, align 42077 %iv.next = add nuw nsw i64 %iv, 12078 %exitcond = icmp eq i64 %iv.next, 10002079 br i1 %exitcond, label %for.end, label %for.body2080 2081 for.end:2082 ret void2083}2084 2085declare double @llvm.rint.f64(double)2086declare float @llvm.rint.f32(float)2087 2088define void @rint_f64(ptr noalias %in.ptr, ptr %out.ptr) {2089; LIBMVEC-NEON-LABEL: define void @rint_f642090; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2091; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.rint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2092;2093; LIBMVEC-NEON-WIDTH-2-LABEL: define void @rint_f642094; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2095; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.rint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2096;2097; LIBMVEC-SVE-LABEL: define void @rint_f642098; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2099; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.rint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2100;2101; SLEEF-NEON-LABEL: define void @rint_f642102; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2103; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.rint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2104;2105; SLEEF-SVE-LABEL: define void @rint_f642106; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2107; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.rint.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])2108;2109; ARMPL-NEON-LABEL: define void @rint_f642110; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2111; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.rint.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2112;2113; ARMPL-SVE-LABEL: define void @rint_f642114; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2115; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.rint.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])2116;2117 entry:2118 br label %for.body2119 2120 for.body:2121 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2122 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv2123 %in = load double, ptr %in.gep, align 82124 %call = tail call double @llvm.rint.f64(double %in)2125 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv2126 store double %call, ptr %out.gep, align 82127 %iv.next = add nuw nsw i64 %iv, 12128 %exitcond = icmp eq i64 %iv.next, 10002129 br i1 %exitcond, label %for.end, label %for.body2130 2131 for.end:2132 ret void2133}2134 2135define void @rint_f32(ptr noalias %in.ptr, ptr %out.ptr) {2136; LIBMVEC-NEON-LABEL: define void @rint_f322137; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2138; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2139;2140; LIBMVEC-NEON-WIDTH-2-LABEL: define void @rint_f322141; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2142; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> [[WIDE_LOAD:%.*]])2143;2144; LIBMVEC-SVE-LABEL: define void @rint_f322145; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2146; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2147;2148; SLEEF-NEON-LABEL: define void @rint_f322149; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2150; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2151;2152; SLEEF-SVE-LABEL: define void @rint_f322153; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2154; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.rint.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])2155;2156; ARMPL-NEON-LABEL: define void @rint_f322157; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2158; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2159;2160; ARMPL-SVE-LABEL: define void @rint_f322161; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2162; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.rint.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])2163;2164 entry:2165 br label %for.body2166 2167 for.body:2168 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2169 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv2170 %in = load float, ptr %in.gep, align 82171 %call = tail call float @llvm.rint.f32(float %in)2172 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv2173 store float %call, ptr %out.gep, align 42174 %iv.next = add nuw nsw i64 %iv, 12175 %exitcond = icmp eq i64 %iv.next, 10002176 br i1 %exitcond, label %for.end, label %for.body2177 2178 for.end:2179 ret void2180}2181 2182declare double @llvm.round.f64(double)2183declare float @llvm.round.f32(float)2184 2185define void @round_f64(ptr noalias %in.ptr, ptr %out.ptr) {2186; LIBMVEC-NEON-LABEL: define void @round_f642187; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2188; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.round.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2189;2190; LIBMVEC-NEON-WIDTH-2-LABEL: define void @round_f642191; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2192; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.round.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2193;2194; LIBMVEC-SVE-LABEL: define void @round_f642195; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2196; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.round.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2197;2198; SLEEF-NEON-LABEL: define void @round_f642199; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2200; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.round.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2201;2202; SLEEF-SVE-LABEL: define void @round_f642203; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2204; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.round.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])2205;2206; ARMPL-NEON-LABEL: define void @round_f642207; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2208; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.round.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2209;2210; ARMPL-SVE-LABEL: define void @round_f642211; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2212; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.round.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])2213;2214 entry:2215 br label %for.body2216 2217 for.body:2218 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2219 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv2220 %in = load double, ptr %in.gep, align 82221 %call = tail call double @llvm.round.f64(double %in)2222 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv2223 store double %call, ptr %out.gep, align 82224 %iv.next = add nuw nsw i64 %iv, 12225 %exitcond = icmp eq i64 %iv.next, 10002226 br i1 %exitcond, label %for.end, label %for.body2227 2228 for.end:2229 ret void2230}2231 2232define void @round_f32(ptr noalias %in.ptr, ptr %out.ptr) {2233; LIBMVEC-NEON-LABEL: define void @round_f322234; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2235; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2236;2237; LIBMVEC-NEON-WIDTH-2-LABEL: define void @round_f322238; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2239; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> [[WIDE_LOAD:%.*]])2240;2241; LIBMVEC-SVE-LABEL: define void @round_f322242; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2243; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2244;2245; SLEEF-NEON-LABEL: define void @round_f322246; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2247; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2248;2249; SLEEF-SVE-LABEL: define void @round_f322250; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2251; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.round.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])2252;2253; ARMPL-NEON-LABEL: define void @round_f322254; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2255; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2256;2257; ARMPL-SVE-LABEL: define void @round_f322258; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2259; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.round.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])2260;2261 entry:2262 br label %for.body2263 2264 for.body:2265 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2266 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv2267 %in = load float, ptr %in.gep, align 82268 %call = tail call float @llvm.round.f32(float %in)2269 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv2270 store float %call, ptr %out.gep, align 42271 %iv.next = add nuw nsw i64 %iv, 12272 %exitcond = icmp eq i64 %iv.next, 10002273 br i1 %exitcond, label %for.end, label %for.body2274 2275 for.end:2276 ret void2277}2278 2279declare double @llvm.sin.f64(double)2280declare float @llvm.sin.f32(float)2281 2282define void @sin_f64(ptr noalias %in.ptr, ptr %out.ptr) {2283; LIBMVEC-NEON-LABEL: define void @sin_f642284; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2285; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_sin(<2 x double> [[WIDE_LOAD:%.*]])2286;2287; LIBMVEC-NEON-WIDTH-2-LABEL: define void @sin_f642288; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2289; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_sin(<2 x double> [[WIDE_LOAD:%.*]])2290;2291; LIBMVEC-SVE-LABEL: define void @sin_f642292; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2293; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sin(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))2294; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.sin.f64(double [[IN:%.*]])2295;2296; SLEEF-NEON-LABEL: define void @sin_f642297; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2298; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_sin(<2 x double> [[WIDE_LOAD:%.*]])2299;2300; SLEEF-SVE-LABEL: define void @sin_f642301; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2302; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sin(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2303;2304; ARMPL-NEON-LABEL: define void @sin_f642305; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2306; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vsinq_f64(<2 x double> [[WIDE_LOAD:%.*]])2307;2308; ARMPL-SVE-LABEL: define void @sin_f642309; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2310; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svsin_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2311;2312 entry:2313 br label %for.body2314 2315 for.body:2316 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2317 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv2318 %in = load double, ptr %in.gep, align 82319 %call = tail call double @llvm.sin.f64(double %in)2320 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv2321 store double %call, ptr %out.gep, align 82322 %iv.next = add nuw nsw i64 %iv, 12323 %exitcond = icmp eq i64 %iv.next, 10002324 br i1 %exitcond, label %for.end, label %for.body2325 2326 for.end:2327 ret void2328}2329 2330define void @sin_f32(ptr noalias %in.ptr, ptr %out.ptr) {2331; LIBMVEC-NEON-LABEL: define void @sin_f322332; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2333; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_sinf(<4 x float> [[WIDE_LOAD:%.*]])2334;2335; LIBMVEC-NEON-WIDTH-2-LABEL: define void @sin_f322336; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2337; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_sinf(<2 x float> [[WIDE_LOAD:%.*]])2338;2339; LIBMVEC-SVE-LABEL: define void @sin_f322340; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2341; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))2342; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.sin.f32(float [[IN:%.*]])2343;2344; SLEEF-NEON-LABEL: define void @sin_f322345; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2346; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_sinf(<4 x float> [[WIDE_LOAD:%.*]])2347;2348; SLEEF-SVE-LABEL: define void @sin_f322349; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2350; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2351;2352; ARMPL-NEON-LABEL: define void @sin_f322353; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2354; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vsinq_f32(<4 x float> [[WIDE_LOAD:%.*]])2355;2356; ARMPL-SVE-LABEL: define void @sin_f322357; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2358; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svsin_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2359;2360 entry:2361 br label %for.body2362 2363 for.body:2364 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2365 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv2366 %in = load float, ptr %in.gep, align 82367 %call = tail call float @llvm.sin.f32(float %in)2368 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv2369 store float %call, ptr %out.gep, align 42370 %iv.next = add nuw nsw i64 %iv, 12371 %exitcond = icmp eq i64 %iv.next, 10002372 br i1 %exitcond, label %for.end, label %for.body2373 2374 for.end:2375 ret void2376}2377 2378declare double @llvm.sinh.f64(double)2379declare float @llvm.sinh.f32(float)2380 2381define void @sinh_f64(ptr noalias %in.ptr, ptr %out.ptr) {2382; LIBMVEC-NEON-LABEL: define void @sinh_f642383; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2384; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_sinh(<2 x double> [[WIDE_LOAD:%.*]])2385;2386; LIBMVEC-NEON-WIDTH-2-LABEL: define void @sinh_f642387; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2388; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_sinh(<2 x double> [[WIDE_LOAD:%.*]])2389;2390; LIBMVEC-SVE-LABEL: define void @sinh_f642391; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2392; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sinh(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))2393; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.sinh.f64(double [[IN:%.*]])2394;2395; SLEEF-NEON-LABEL: define void @sinh_f642396; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2397; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_sinh(<2 x double> [[WIDE_LOAD:%.*]])2398;2399; SLEEF-SVE-LABEL: define void @sinh_f642400; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2401; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sinh(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2402;2403; ARMPL-NEON-LABEL: define void @sinh_f642404; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2405; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vsinhq_f64(<2 x double> [[WIDE_LOAD:%.*]])2406;2407; ARMPL-SVE-LABEL: define void @sinh_f642408; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2409; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svsinh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2410;2411 entry:2412 br label %for.body2413 2414 for.body:2415 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2416 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv2417 %in = load double, ptr %in.gep, align 82418 %call = tail call double @llvm.sinh.f64(double %in)2419 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv2420 store double %call, ptr %out.gep, align 82421 %iv.next = add nuw nsw i64 %iv, 12422 %exitcond = icmp eq i64 %iv.next, 10002423 br i1 %exitcond, label %for.end, label %for.body2424 2425 for.end:2426 ret void2427}2428 2429define void @sinh_f32(ptr noalias %in.ptr, ptr %out.ptr) {2430; LIBMVEC-NEON-LABEL: define void @sinh_f322431; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2432; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_sinhf(<4 x float> [[WIDE_LOAD:%.*]])2433;2434; LIBMVEC-NEON-WIDTH-2-LABEL: define void @sinh_f322435; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2436; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_sinhf(<2 x float> [[WIDE_LOAD:%.*]])2437;2438; LIBMVEC-SVE-LABEL: define void @sinh_f322439; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2440; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinhf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))2441; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.sinh.f32(float [[IN:%.*]])2442;2443; SLEEF-NEON-LABEL: define void @sinh_f322444; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2445; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_sinhf(<4 x float> [[WIDE_LOAD:%.*]])2446;2447; SLEEF-SVE-LABEL: define void @sinh_f322448; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2449; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinhf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2450;2451; ARMPL-NEON-LABEL: define void @sinh_f322452; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2453; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vsinhq_f32(<4 x float> [[WIDE_LOAD:%.*]])2454;2455; ARMPL-SVE-LABEL: define void @sinh_f322456; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2457; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svsinh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2458;2459 entry:2460 br label %for.body2461 2462 for.body:2463 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2464 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv2465 %in = load float, ptr %in.gep, align 82466 %call = tail call float @llvm.sinh.f32(float %in)2467 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv2468 store float %call, ptr %out.gep, align 42469 %iv.next = add nuw nsw i64 %iv, 12470 %exitcond = icmp eq i64 %iv.next, 10002471 br i1 %exitcond, label %for.end, label %for.body2472 2473 for.end:2474 ret void2475}2476 2477declare double @llvm.sqrt.f64(double)2478declare float @llvm.sqrt.f32(float)2479 2480define void @sqrt_f64(ptr noalias %in.ptr, ptr %out.ptr) {2481; LIBMVEC-NEON-LABEL: define void @sqrt_f642482; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2483; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2484;2485; LIBMVEC-NEON-WIDTH-2-LABEL: define void @sqrt_f642486; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2487; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2488;2489; LIBMVEC-SVE-LABEL: define void @sqrt_f642490; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2491; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2492;2493; SLEEF-NEON-LABEL: define void @sqrt_f642494; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2495; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2496;2497; SLEEF-SVE-LABEL: define void @sqrt_f642498; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2499; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.sqrt.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])2500;2501; ARMPL-NEON-LABEL: define void @sqrt_f642502; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2503; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2504;2505; ARMPL-SVE-LABEL: define void @sqrt_f642506; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2507; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.sqrt.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])2508;2509 entry:2510 br label %for.body2511 2512 for.body:2513 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2514 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv2515 %in = load double, ptr %in.gep, align 82516 %call = tail call double @llvm.sqrt.f64(double %in)2517 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv2518 store double %call, ptr %out.gep, align 82519 %iv.next = add nuw nsw i64 %iv, 12520 %exitcond = icmp eq i64 %iv.next, 10002521 br i1 %exitcond, label %for.end, label %for.body2522 2523 for.end:2524 ret void2525}2526 2527define void @sqrt_f32(ptr noalias %in.ptr, ptr %out.ptr) {2528; LIBMVEC-NEON-LABEL: define void @sqrt_f322529; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2530; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2531;2532; LIBMVEC-NEON-WIDTH-2-LABEL: define void @sqrt_f322533; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2534; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.sqrt.v2f32(<2 x float> [[WIDE_LOAD:%.*]])2535;2536; LIBMVEC-SVE-LABEL: define void @sqrt_f322537; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2538; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2539;2540; SLEEF-NEON-LABEL: define void @sqrt_f322541; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2542; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2543;2544; SLEEF-SVE-LABEL: define void @sqrt_f322545; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2546; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.sqrt.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])2547;2548; ARMPL-NEON-LABEL: define void @sqrt_f322549; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2550; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2551;2552; ARMPL-SVE-LABEL: define void @sqrt_f322553; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2554; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.sqrt.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])2555;2556 entry:2557 br label %for.body2558 2559 for.body:2560 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2561 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv2562 %in = load float, ptr %in.gep, align 82563 %call = tail call float @llvm.sqrt.f32(float %in)2564 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv2565 store float %call, ptr %out.gep, align 42566 %iv.next = add nuw nsw i64 %iv, 12567 %exitcond = icmp eq i64 %iv.next, 10002568 br i1 %exitcond, label %for.end, label %for.body2569 2570 for.end:2571 ret void2572}2573 2574declare double @llvm.tan.f64(double)2575declare float @llvm.tan.f32(float)2576 2577define void @tan_f64(ptr noalias %in.ptr, ptr %out.ptr) {2578; LIBMVEC-NEON-LABEL: define void @tan_f642579; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2580; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_tan(<2 x double> [[WIDE_LOAD:%.*]])2581;2582; LIBMVEC-NEON-WIDTH-2-LABEL: define void @tan_f642583; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2584; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_tan(<2 x double> [[WIDE_LOAD:%.*]])2585;2586; LIBMVEC-SVE-LABEL: define void @tan_f642587; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2588; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tan(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))2589; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.tan.f64(double [[IN:%.*]])2590;2591; SLEEF-NEON-LABEL: define void @tan_f642592; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2593; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_tan(<2 x double> [[WIDE_LOAD:%.*]])2594;2595; SLEEF-SVE-LABEL: define void @tan_f642596; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2597; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tan(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2598;2599; ARMPL-NEON-LABEL: define void @tan_f642600; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2601; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vtanq_f64(<2 x double> [[WIDE_LOAD:%.*]])2602;2603; ARMPL-SVE-LABEL: define void @tan_f642604; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2605; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svtan_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2606;2607 entry:2608 br label %for.body2609 2610 for.body:2611 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2612 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv2613 %in = load double, ptr %in.gep, align 82614 %call = tail call double @llvm.tan.f64(double %in)2615 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv2616 store double %call, ptr %out.gep, align 82617 %iv.next = add nuw nsw i64 %iv, 12618 %exitcond = icmp eq i64 %iv.next, 10002619 br i1 %exitcond, label %for.end, label %for.body2620 2621 for.end:2622 ret void2623}2624 2625define void @tan_f32(ptr noalias %in.ptr, ptr %out.ptr) {2626; LIBMVEC-NEON-LABEL: define void @tan_f322627; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2628; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_tanf(<4 x float> [[WIDE_LOAD:%.*]])2629;2630; LIBMVEC-NEON-WIDTH-2-LABEL: define void @tan_f322631; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2632; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_tanf(<2 x float> [[WIDE_LOAD:%.*]])2633;2634; LIBMVEC-SVE-LABEL: define void @tan_f322635; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2636; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))2637; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.tan.f32(float [[IN:%.*]])2638;2639; SLEEF-NEON-LABEL: define void @tan_f322640; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2641; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_tanf(<4 x float> [[WIDE_LOAD:%.*]])2642;2643; SLEEF-SVE-LABEL: define void @tan_f322644; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2645; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2646;2647; ARMPL-NEON-LABEL: define void @tan_f322648; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2649; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vtanq_f32(<4 x float> [[WIDE_LOAD:%.*]])2650;2651; ARMPL-SVE-LABEL: define void @tan_f322652; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2653; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svtan_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2654;2655 entry:2656 br label %for.body2657 2658 for.body:2659 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2660 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv2661 %in = load float, ptr %in.gep, align 82662 %call = tail call float @llvm.tan.f32(float %in)2663 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv2664 store float %call, ptr %out.gep, align 42665 %iv.next = add nuw nsw i64 %iv, 12666 %exitcond = icmp eq i64 %iv.next, 10002667 br i1 %exitcond, label %for.end, label %for.body2668 2669 for.end:2670 ret void2671}2672 2673declare double @llvm.tanh.f64(double)2674declare float @llvm.tanh.f32(float)2675 2676define void @tanh_f64(ptr noalias %in.ptr, ptr %out.ptr) {2677; LIBMVEC-NEON-LABEL: define void @tanh_f642678; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2679; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_tanh(<2 x double> [[WIDE_LOAD:%.*]])2680;2681; LIBMVEC-NEON-WIDTH-2-LABEL: define void @tanh_f642682; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2683; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @_ZGVnN2v_tanh(<2 x double> [[WIDE_LOAD:%.*]])2684;2685; LIBMVEC-SVE-LABEL: define void @tanh_f642686; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2687; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tanh(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true))2688; LIBMVEC-SVE: [[CALL:%.*]] = tail call double @llvm.tanh.f64(double [[IN:%.*]])2689;2690; SLEEF-NEON-LABEL: define void @tanh_f642691; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2692; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_tanh(<2 x double> [[WIDE_LOAD:%.*]])2693;2694; SLEEF-SVE-LABEL: define void @tanh_f642695; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2696; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tanh(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2697;2698; ARMPL-NEON-LABEL: define void @tanh_f642699; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2700; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x double> @armpl_vtanhq_f64(<2 x double> [[WIDE_LOAD:%.*]])2701;2702; ARMPL-SVE-LABEL: define void @tanh_f642703; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2704; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @armpl_svtanh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])2705;2706 entry:2707 br label %for.body2708 2709 for.body:2710 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2711 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv2712 %in = load double, ptr %in.gep, align 82713 %call = tail call double @llvm.tanh.f64(double %in)2714 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv2715 store double %call, ptr %out.gep, align 82716 %iv.next = add nuw nsw i64 %iv, 12717 %exitcond = icmp eq i64 %iv.next, 10002718 br i1 %exitcond, label %for.end, label %for.body2719 2720 for.end:2721 ret void2722}2723 2724define void @tanh_f32(ptr noalias %in.ptr, ptr %out.ptr) {2725; LIBMVEC-NEON-LABEL: define void @tanh_f322726; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2727; LIBMVEC-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @_ZGVnN4v_tanhf(<4 x float> [[WIDE_LOAD:%.*]])2728;2729; LIBMVEC-NEON-WIDTH-2-LABEL: define void @tanh_f322730; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2731; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call aarch64_vector_pcs <2 x float> @_ZGVnN2v_tanhf(<2 x float> [[WIDE_LOAD:%.*]])2732;2733; LIBMVEC-SVE-LABEL: define void @tanh_f322734; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2735; LIBMVEC-SVE: [[TMP8:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanhf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true))2736; LIBMVEC-SVE: [[CALL:%.*]] = tail call float @llvm.tanh.f32(float [[IN:%.*]])2737;2738; SLEEF-NEON-LABEL: define void @tanh_f322739; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2740; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_tanhf(<4 x float> [[WIDE_LOAD:%.*]])2741;2742; SLEEF-SVE-LABEL: define void @tanh_f322743; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2744; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanhf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2745;2746; ARMPL-NEON-LABEL: define void @tanh_f322747; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2748; ARMPL-NEON: [[TMP2:%.*]] = call aarch64_vector_pcs <4 x float> @armpl_vtanhq_f32(<4 x float> [[WIDE_LOAD:%.*]])2749;2750; ARMPL-SVE-LABEL: define void @tanh_f322751; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2752; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @armpl_svtanh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])2753;2754 entry:2755 br label %for.body2756 2757 for.body:2758 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2759 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv2760 %in = load float, ptr %in.gep, align 82761 %call = tail call float @llvm.tanh.f32(float %in)2762 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv2763 store float %call, ptr %out.gep, align 42764 %iv.next = add nuw nsw i64 %iv, 12765 %exitcond = icmp eq i64 %iv.next, 10002766 br i1 %exitcond, label %for.end, label %for.body2767 2768 for.end:2769 ret void2770}2771 2772declare double @llvm.trunc.f64(double)2773declare float @llvm.trunc.f32(float)2774 2775define void @trunc_f64(ptr noalias %in.ptr, ptr %out.ptr) {2776; LIBMVEC-NEON-LABEL: define void @trunc_f642777; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2778; LIBMVEC-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.trunc.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2779;2780; LIBMVEC-NEON-WIDTH-2-LABEL: define void @trunc_f642781; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2782; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x double> @llvm.trunc.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2783;2784; LIBMVEC-SVE-LABEL: define void @trunc_f642785; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2786; LIBMVEC-SVE: [[TMP2:%.*]] = call <2 x double> @llvm.trunc.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2787;2788; SLEEF-NEON-LABEL: define void @trunc_f642789; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2790; SLEEF-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.trunc.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2791;2792; SLEEF-SVE-LABEL: define void @trunc_f642793; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2794; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.trunc.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])2795;2796; ARMPL-NEON-LABEL: define void @trunc_f642797; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2798; ARMPL-NEON: [[TMP2:%.*]] = call <2 x double> @llvm.trunc.v2f64(<2 x double> [[WIDE_LOAD:%.*]])2799;2800; ARMPL-SVE-LABEL: define void @trunc_f642801; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2802; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 2 x double> @llvm.trunc.nxv2f64(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]])2803;2804 entry:2805 br label %for.body2806 2807 for.body:2808 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2809 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv2810 %in = load double, ptr %in.gep, align 82811 %call = tail call double @llvm.trunc.f64(double %in)2812 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv2813 store double %call, ptr %out.gep, align 82814 %iv.next = add nuw nsw i64 %iv, 12815 %exitcond = icmp eq i64 %iv.next, 10002816 br i1 %exitcond, label %for.end, label %for.body2817 2818 for.end:2819 ret void2820}2821 2822define void @trunc_f32(ptr noalias %in.ptr, ptr %out.ptr) {2823; LIBMVEC-NEON-LABEL: define void @trunc_f322824; LIBMVEC-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2825; LIBMVEC-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2826;2827; LIBMVEC-NEON-WIDTH-2-LABEL: define void @trunc_f322828; LIBMVEC-NEON-WIDTH-2-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2829; LIBMVEC-NEON-WIDTH-2: [[TMP2:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> [[WIDE_LOAD:%.*]])2830;2831; LIBMVEC-SVE-LABEL: define void @trunc_f322832; LIBMVEC-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2833; LIBMVEC-SVE: [[TMP2:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2834;2835; SLEEF-NEON-LABEL: define void @trunc_f322836; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2837; SLEEF-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2838;2839; SLEEF-SVE-LABEL: define void @trunc_f322840; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2841; SLEEF-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.trunc.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])2842;2843; ARMPL-NEON-LABEL: define void @trunc_f322844; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2845; ARMPL-NEON: [[TMP2:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> [[WIDE_LOAD:%.*]])2846;2847; ARMPL-SVE-LABEL: define void @trunc_f322848; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) #[[ATTR1]] {2849; ARMPL-SVE: [[TMP12:%.*]] = call <vscale x 4 x float> @llvm.trunc.nxv4f32(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]])2850;2851 entry:2852 br label %for.body2853 2854 for.body:2855 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]2856 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv2857 %in = load float, ptr %in.gep, align 82858 %call = tail call float @llvm.trunc.f32(float %in)2859 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv2860 store float %call, ptr %out.gep, align 42861 %iv.next = add nuw nsw i64 %iv, 12862 %exitcond = icmp eq i64 %iv.next, 10002863 br i1 %exitcond, label %for.end, label %for.body2864 2865 for.end:2866 ret void2867}2868