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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter-out-after "scalar.ph:"2; REQUIRES: asserts3 4; RUN: opt -passes=loop-vectorize -force-vector-interleave=1 -vectorizer-maximize-bandwidth -mtriple=arm64-apple-ios -debug -S %s 2>&1 | FileCheck %s5 6target triple = "arm64-apple-ios"7 8; CHECK-LABEL: LV: Checking a loop in 'test'9; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {10; CHECK-NEXT: Live-in vp<[[VF:%.+]]> = VF11; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF12; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count13 14; CHECK-NEXT: Live-in ir<1024> = original trip-count15; CHECK-EMPTY:16; CHECK-NEXT: ir-bb<entry>:17; CHECK-NEXT: Successor(s): scalar.ph, vector.ph18; CHECK-EMPTY:19; CHECK-NEXT: vector.ph:20; CHECK-NEXT: Successor(s): vector loop21; CHECK-EMPTY:22; CHECK-NEXT: <x1> vector loop: {23; CHECK-NEXT: vector.body:24; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION25; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>, vp<[[VF]]>26; CHECK-NEXT: CLONE ir<%gep.src> = getelementptr inbounds ir<%src>, vp<[[STEPS]]>27; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer inbounds ir<%gep.src>28; CHECK-NEXT: WIDEN ir<%l> = load vp<[[VEC_PTR]]>29; CHECK-NEXT: WIDEN-CAST ir<%conv> = fpext ir<%l> to double30; CHECK-NEXT: WIDEN-CALL ir<%s> = call fast @llvm.sin.f64(ir<%conv>) (using library function: __simd_sin_v2f64)31; CHECK-NEXT: REPLICATE ir<%gep.dst> = getelementptr inbounds ir<%dst>, vp<[[STEPS]]>32; CHECK-NEXT: REPLICATE store ir<%s>, ir<%gep.dst>33; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>34; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>35; CHECK-NEXT: No successors36; CHECK-NEXT: }37; CHECK-NEXT: Successor(s): middle.block38; CHECK-EMPTY:39; CHECK-NEXT: middle.block:40; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq ir<1024>, vp<[[VTC]]>41; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>42; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph43; CHECK-EMPTY:44; CHECK-NEXT: ir-bb<exit>:45; CHECK-NEXT: No successors46; CHECK-EMPTY:47; CHECK-NEXT: scalar.ph:48; CHECK-NEXT: EMIT-SCALAR vp<[[RESUME:%.+]]> = phi [ vp<[[VTC]]>, middle.block ], [ ir<0>, ir-bb<entry> ]49; CHECK-NEXT: Successor(s): ir-bb<loop>50; CHECK-EMPTY:51; CHECK-NEXT: ir-bb<loop>:52; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] (extra operand: vp<[[RESUME]]> from scalar.ph)53; CHECK: IR %cmp = icmp ne i64 %iv.next, 102454; CHECK-NEXT: No successors55; CHECK-NEXT: }56 57; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {58; CHECK-NEXT: Live-in vp<[[VF:%.+]]> = VF59; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF60; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count61; CHECK-NEXT: Live-in ir<1024> = original trip-count62; CHECK-EMPTY:63; CHECK-NEXT: ir-bb<entry>:64; CHECK-NEXT: Successor(s): scalar.ph, vector.ph65; CHECK-EMPTY:66; CHECK-NEXT: vector.ph:67; CHECK-NEXT: Successor(s): vector loop68; CHECK-EMPTY:69; CHECK-NEXT: <x1> vector loop: {70; CHECK-NEXT: vector.body:71; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION72; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>, vp<[[VF]]>73; CHECK-NEXT: CLONE ir<%gep.src> = getelementptr inbounds ir<%src>, vp<[[STEPS]]>74; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer inbounds ir<%gep.src>75; CHECK-NEXT: WIDEN ir<%l> = load vp<[[VEC_PTR]]>76; CHECK-NEXT: WIDEN-CAST ir<%conv> = fpext ir<%l> to double77; CHECK-NEXT: WIDEN-INTRINSIC ir<%s> = call fast llvm.sin(ir<%conv>)78; CHECK-NEXT: REPLICATE ir<%gep.dst> = getelementptr inbounds ir<%dst>, vp<[[STEPS]]>79; CHECK-NEXT: REPLICATE store ir<%s>, ir<%gep.dst>80; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>81; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>82; CHECK-NEXT: No successors83; CHECK-NEXT: }84; CHECK-NEXT: Successor(s): middle.block85; CHECK-EMPTY:86; CHECK-NEXT: middle.block:87; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq ir<1024>, vp<[[VTC]]>88; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>89; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph90; CHECK-EMPTY:91; CHECK-NEXT: ir-bb<exit>:92; CHECK-NEXT: No successors93; CHECK-EMPTY:94; CHECK-NEXT: scalar.ph:95; CHECK-NEXT: EMIT-SCALAR vp<[[RESUME:%.+]]> = phi [ vp<[[VTC]]>, middle.block ], [ ir<0>, ir-bb<entry> ]96; CHECK-NEXT: Successor(s): ir-bb<loop>97; CHECK-EMPTY:98; CHECK-NEXT: ir-bb<loop>:99; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] (extra operand: vp<[[RESUME]]> from scalar.ph)100; CHECK: IR %cmp = icmp ne i64 %iv.next, 1024101; CHECK-NEXT: No successors102; CHECK-NEXT: }103;104;105define void @test(ptr noalias %src, ptr noalias %dst) {106; CHECK-LABEL: @test(107; CHECK-NEXT: entry:108; CHECK-NEXT: br label [[VECTOR_PH:%.*]]109; CHECK: vector.ph:110; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]111; CHECK: vector.body:112; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]113; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0114; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1115; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[SRC:%.*]], i64 [[TMP0]]116; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4117; CHECK-NEXT: [[TMP4:%.*]] = fpext <2 x float> [[WIDE_LOAD]] to <2 x double>118; CHECK-NEXT: [[TMP5:%.*]] = call fast <2 x double> @__simd_sin_v2f64(<2 x double> [[TMP4]])119; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP5]], i32 0120; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[TMP5]], i32 1121; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr [[DST:%.*]], i64 [[TMP0]]122; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[TMP1]]123; CHECK-NEXT: store double [[TMP8]], ptr [[TMP6]], align 8124; CHECK-NEXT: store double [[TMP9]], ptr [[TMP7]], align 8125; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2126; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024127; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]128; CHECK: middle.block:129; CHECK-NEXT: br label [[EXIT:%.*]]130; CHECK: exit:131; CHECK-NEXT: ret void132;133entry:134 br label %loop135 136loop:137 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]138 %gep.src = getelementptr inbounds float, ptr %src, i64 %iv139 %l = load float, ptr %gep.src, align 4140 %conv = fpext float %l to double141 %s = call fast double @llvm.sin.f64(double %conv) #0142 %gep.dst = getelementptr inbounds float, ptr %dst, i64 %iv143 store double %s, ptr %gep.dst144 %iv.next = add nsw i64 %iv, 1145 %cmp = icmp ne i64 %iv.next, 1024146 br i1 %cmp, label %loop, label %exit147 148exit:149 ret void150}151 152declare double @llvm.sin.f64(double)153 154declare <2 x double> @__simd_sin_v2f64(<2 x double>)155 156attributes #0 = { "vector-function-abi-variant"="_ZGV_LLVM_N2v_llvm.sin.f64(__simd_sin_v2f64)" }157