72 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=loop-vectorize -mattr=+armv8.1-m.main,+mve.fp -tail-predication=disabled< %s | FileCheck %s3; RUN: opt -S -passes=loop-vectorize -mattr=+armv8.1-m.main,+mve.fp -tail-predication=enabled < %s | FileCheck %s4 5; This test should produce the same result (vectorized loop + scalar epilogue) with6; default options and when MVE Tail Predication is enabled, as this loop's tail cannot be folded7; by masking due to an outside user of %incdec.ptr in %end.8 9target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"10target triple = "thumbv8.1m.main-arm-unknown-eabihf"11 12define void @outside_user_blocks_tail_folding(ptr nocapture readonly %ptr, i32 %size, ptr %pos) {13; CHECK-LABEL: @outside_user_blocks_tail_folding(14; CHECK-NEXT: header:15; CHECK-NEXT: [[PTR0:%.*]] = load ptr, ptr [[POS:%.*]], align 416; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[SIZE:%.*]], 1617; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]18; CHECK: vector.ph:19; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[SIZE]], 1620; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[SIZE]], [[N_MOD_VF]]21; CHECK-NEXT: [[IND_END:%.*]] = sub i32 [[SIZE]], [[N_VEC]]22; CHECK-NEXT: [[IND_END1:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i32 [[N_VEC]]23; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]24; CHECK: vector.body:25; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]26; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[PTR]], i32 [[INDEX]]27; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[NEXT_GEP]], i32 128; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP1]], align 129; CHECK-NEXT: store <16 x i8> [[WIDE_LOAD]], ptr [[NEXT_GEP]], align 130; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 1631; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]32; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]33; CHECK: middle.block:34; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[SIZE]], [[N_VEC]]35; CHECK-NEXT: br i1 [[CMP_N]], label [[END:%.*]], label [[SCALAR_PH]]36; CHECK: scalar.ph:37; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[SIZE]], [[HEADER:%.*]] ]38; CHECK-NEXT: [[BC_RESUME_VAL2:%.*]] = phi ptr [ [[IND_END1]], [[MIDDLE_BLOCK]] ], [ [[PTR]], [[HEADER]] ]39; CHECK-NEXT: br label [[BODY:%.*]]40; CHECK: body:41; CHECK-NEXT: [[DEC66:%.*]] = phi i32 [ [[DEC:%.*]], [[BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]42; CHECK-NEXT: [[BUFF:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[BODY]] ], [ [[BC_RESUME_VAL2]], [[SCALAR_PH]] ]43; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[BUFF]], i32 144; CHECK-NEXT: [[DEC]] = add nsw i32 [[DEC66]], -145; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[INCDEC_PTR]], align 146; CHECK-NEXT: store i8 [[TMP5]], ptr [[BUFF]], align 147; CHECK-NEXT: [[TOBOOL11:%.*]] = icmp eq i32 [[DEC]], 048; CHECK-NEXT: br i1 [[TOBOOL11]], label [[END]], label [[BODY]], !llvm.loop [[LOOP3:![0-9]+]]49; CHECK: end:50; CHECK-NEXT: [[INCDEC_PTR_LCSSA:%.*]] = phi ptr [ [[INCDEC_PTR]], [[BODY]] ], [ [[IND_END1]], [[MIDDLE_BLOCK]] ]51; CHECK-NEXT: store ptr [[INCDEC_PTR_LCSSA]], ptr [[POS]], align 452; CHECK-NEXT: ret void53;54header:55 %ptr0 = load ptr, ptr %pos, align 456 br label %body57 58body:59 %dec66 = phi i32 [ %dec, %body ], [ %size, %header ]60 %buff = phi ptr [ %incdec.ptr, %body ], [ %ptr, %header ]61 %incdec.ptr = getelementptr inbounds i8, ptr %buff, i32 162 %dec = add nsw i32 %dec66, -163 %0 = load i8, ptr %incdec.ptr, align 164 store i8 %0, ptr %buff, align 165 %tobool11 = icmp eq i32 %dec, 066 br i1 %tobool11, label %end, label %body67 68end:69 store ptr %incdec.ptr, ptr %pos, align 470 ret void71}72