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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -S -passes=loop-vectorize -vectorize-memory-check-threshold=60 < %s -o - | FileCheck %s3 4; The case will do aggressive interleave on PowerPC, resulting in a lot of memory checks.5; (On the A2, always unroll aggressively. In fact, if aggressive interleaving is enabled,6; similar issues may occur on other targets).7; Interleaving should also be restricted by the threshold of memory checks similar to VF.8; (e.g., runtime-memory-check-threshold, default 8).9 10; CHECK-LABEL: @eddy_diff_caleddy_11; CHECK-NOT: vector.memcheck12 13define fastcc void @eddy_diff_caleddy_(ptr %wet_cl, i64 %0, i32 %ncol.cast.val) {14entry:15 %trip.count = add nuw i32 %ncol.cast.val, 116 %wide.trip.count = zext i32 %ncol.cast.val to i6417 %1 = shl i64 %0, 118 %2 = mul i64 %0, 319 %3 = shl i64 %0, 220 %4 = mul i64 %0, 521 %5 = mul i64 %0, 622 %6 = mul i64 %0, 723 %7 = shl i64 %0, 324 %8 = mul i64 %0, 925 %9 = mul i64 %0, 1026 %10 = mul i64 %0, 1127 %11 = mul i64 %0, 1228 br label %loop.body29 30loop.body:31 %indvars.iv774 = phi i64 [ 0, %entry ], [ %indvars.iv.next775, %loop.body ]32 %12 = add nsw i64 %indvars.iv774, -533 %13 = add i64 %12, %034 %14 = getelementptr i64, ptr %wet_cl, i64 %1335 store double 0.000000e+00, ptr %14, align 836 %15 = add i64 %12, %137 %16 = getelementptr i64, ptr %wet_cl, i64 %1538 store double 0.000000e+00, ptr %16, align 839 %17 = add i64 %12, %240 %18 = getelementptr i64, ptr %wet_cl, i64 %1741 store double 0.000000e+00, ptr %18, align 842 %19 = add i64 %12, %343 %20 = getelementptr i64, ptr %wet_cl, i64 %1944 store double 0.000000e+00, ptr %20, align 845 %21 = add i64 %12, %446 %22 = getelementptr i64, ptr %wet_cl, i64 %2147 store double 0.000000e+00, ptr %22, align 848 %23 = add i64 %12, %549 %24 = getelementptr i64, ptr %wet_cl, i64 %2350 store double 0.000000e+00, ptr %24, align 851 %25 = add i64 %12, %652 %26 = getelementptr i64, ptr %wet_cl, i64 %2553 store double 0.000000e+00, ptr %26, align 854 %27 = add i64 %12, %755 %28 = getelementptr i64, ptr %wet_cl, i64 %2756 store double 0.000000e+00, ptr %28, align 857 %29 = add i64 %12, %858 %30 = getelementptr i64, ptr %wet_cl, i64 %2959 store double 0.000000e+00, ptr %30, align 860 %31 = add i64 %12, %961 %32 = getelementptr i64, ptr %wet_cl, i64 %3162 store double 0.000000e+00, ptr %32, align 863 %33 = add i64 %12, %1064 %34 = getelementptr i64, ptr %wet_cl, i64 %3365 store double 0.000000e+00, ptr %34, align 866 %35 = add i64 %12, %1167 %36 = getelementptr i64, ptr %wet_cl, i64 %3568 store double 0.000000e+00, ptr %36, align 869 %indvars.iv.next775 = add nuw nsw i64 %indvars.iv774, 170 %exitcond778.not = icmp eq i64 %indvars.iv.next775, %wide.trip.count71 br i1 %exitcond778.not, label %loop.end, label %loop.body72 73loop.end:74 ret void75}76