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1; RUN: opt < %s -debug-only=loop-vectorize,vplan -passes='function(loop-vectorize),default<O2>' -vectorizer-maximize-bandwidth -mtriple=powerpc64-unknown-linux -S -mcpu=pwr8 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-PWR82; RUN: opt < %s -debug-only=loop-vectorize,vplan -passes='function(loop-vectorize),default<O2>' -vectorizer-maximize-bandwidth -mtriple=powerpc64le-unknown-linux -S -mcpu=pwr9 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-PWR93; REQUIRES: asserts4 5@a = global [1024 x i8] zeroinitializer, align 166@b = global [1024 x i8] zeroinitializer, align 167 8define i32 @foo() {9; CHECK-LABEL: foo10 11; CHECK-PWR8: Executing best plan with VF=16, UF=412 13; CHECK-PWR9: Executing best plan with VF=8, UF=814 15 16entry:17  br label %for.body18 19for.cond.cleanup:20  %add.lcssa = phi i32 [ %add, %for.body ]21  ret i32 %add.lcssa22 23for.body:24  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]25  %s.015 = phi i32 [ 0, %entry ], [ %add, %for.body ]26  %arrayidx = getelementptr inbounds [1024 x i8], ptr @a, i64 0, i64 %indvars.iv27  %0 = load i8, ptr %arrayidx, align 128  %conv = zext i8 %0 to i3229  %arrayidx2 = getelementptr inbounds [1024 x i8], ptr @b, i64 0, i64 %indvars.iv30  %1 = load i8, ptr %arrayidx2, align 131  %conv3 = zext i8 %1 to i3232  %sub = sub nsw i32 %conv, %conv333  %ispos = icmp sgt i32 %sub, -134  %neg = sub nsw i32 0, %sub35  %2 = select i1 %ispos, i32 %sub, i32 %neg36  %add = add nsw i32 %2, %s.01537  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 138  %exitcond = icmp eq i64 %indvars.iv.next, 102439  br i1 %exitcond, label %for.cond.cleanup, label %for.body40}41 42define i32 @goo() {43; For indvars.iv used in a computating chain only feeding into getelementptr or cmp,44; it will not have vector version and the vector register usage will not exceed the45; available vector register number.46 47; CHECK-LABEL: goo48 49; CHECK: Executing best plan with VF=16, UF=450 51entry:52  br label %for.body53 54for.cond.cleanup:                                 ; preds = %for.body55  %add.lcssa = phi i32 [ %add, %for.body ]56  ret i32 %add.lcssa57 58for.body:                                         ; preds = %for.body, %entry59  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]60  %s.015 = phi i32 [ 0, %entry ], [ %add, %for.body ]61  %tmp1 = add nsw i64 %indvars.iv, 362  %arrayidx = getelementptr inbounds [1024 x i8], ptr @a, i64 0, i64 %tmp163  %tmp = load i8, ptr %arrayidx, align 164  %conv = zext i8 %tmp to i3265  %tmp2 = add nsw i64 %indvars.iv, 266  %arrayidx2 = getelementptr inbounds [1024 x i8], ptr @b, i64 0, i64 %tmp267  %tmp3 = load i8, ptr %arrayidx2, align 168  %conv3 = zext i8 %tmp3 to i3269  %sub = sub nsw i32 %conv, %conv370  %ispos = icmp sgt i32 %sub, -171  %neg = sub nsw i32 0, %sub72  %tmp4 = select i1 %ispos, i32 %sub, i32 %neg73  %add = add nsw i32 %tmp4, %s.01574  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 175  %exitcond = icmp eq i64 %indvars.iv.next, 102476  br i1 %exitcond, label %for.cond.cleanup, label %for.body77}78 79define i64 @bar(ptr nocapture %a) {80; CHECK-LABEL: bar81 82; CHECK: Executing best plan with VF=2, UF=883 84entry:85  br label %for.body86 87for.cond.cleanup:88  %add2.lcssa = phi i64 [ %add2, %for.body ]89  ret i64 %add2.lcssa90 91for.body:92  %i.012 = phi i64 [ 0, %entry ], [ %inc, %for.body ]93  %s.011 = phi i64 [ 0, %entry ], [ %add2, %for.body ]94  %arrayidx = getelementptr inbounds i64, ptr %a, i64 %i.01295  %0 = load i64, ptr %arrayidx, align 896  %add = add nsw i64 %0, %i.01297  store i64 %add, ptr %arrayidx, align 898  %add2 = add nsw i64 %add, %s.01199  %inc = add nuw nsw i64 %i.012, 1100  %exitcond = icmp eq i64 %inc, 1024101  br i1 %exitcond, label %for.cond.cleanup, label %for.body102}103 104@d = external global [0 x i64], align 8105@e = external global [0 x i32], align 4106@c = external global [0 x i32], align 4107 108define void @hoo(i32 %n) {109; CHECK-LABEL: hoo110; CHECK: Executing best plan with VF=1, UF=8111 112entry:113  br label %for.body114 115for.body:                                         ; preds = %for.body, %entry116  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]117  %arrayidx = getelementptr inbounds [0 x i64], ptr @d, i64 0, i64 %indvars.iv118  %tmp = load i64, ptr %arrayidx, align 8119  %arrayidx1 = getelementptr inbounds [0 x i32], ptr @e, i64 0, i64 %tmp120  %tmp1 = load i32, ptr %arrayidx1, align 4121  %arrayidx3 = getelementptr inbounds [0 x i32], ptr @c, i64 0, i64 %indvars.iv122  store i32 %tmp1, ptr %arrayidx3, align 4123  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1124  %exitcond = icmp eq i64 %indvars.iv.next, 10000125  br i1 %exitcond, label %for.end, label %for.body126 127for.end:                                          ; preds = %for.body128  ret void129}130 131define float @float_(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %n) {132;CHECK-LABEL: float_133;CHECK: LV(REG): VF = 1134;CHECK: LV(REG): Found max usage: 2 item135;CHECK-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 3 registers136;CHECK-NEXT: LV(REG): RegisterClass: PPC::VSXRC, 3 registers137;CHECK: LV(REG): Found invariant usage: 1 item138;CHECK-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 1 registers139 140entry:141  %cmp = icmp sgt i32 %n, 0142  br i1 %cmp, label %preheader, label %for.end143 144preheader:145  %t0 = sext i32 %n to i64146  br label %for147 148for:149  %indvars.iv = phi i64 [ 0, %preheader ], [ %indvars.iv.next, %for ]150  %s.02 = phi float [ 0.0, %preheader ], [ %add4, %for ]151  %arrayidx = getelementptr inbounds float, ptr %a, i64 %indvars.iv152  %t1 = load float, ptr %arrayidx, align 4153  %arrayidx3 = getelementptr inbounds float, ptr %b, i64 %indvars.iv154  %t2 = load float, ptr %arrayidx3, align 4155  %add = fadd fast float %t1, %s.02156  %add4 = fadd fast float %add, %t2157  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 32158  %cmp1 = icmp slt i64 %indvars.iv.next, %t0159  br i1 %cmp1, label %for, label %loopexit160 161loopexit:162  %add4.lcssa = phi float [ %add4, %for ]163  br label %for.end164 165for.end:166  %s.0.lcssa = phi float [ 0.0, %entry ], [ %add4.lcssa, %loopexit ]167  ret float %s.0.lcssa168}169 170 171define void @double_(ptr nocapture %A, i32 %n) nounwind uwtable ssp {172;CHECK-LABEL: double_173;CHECK-PWR8: LV(REG): VF = 2174;CHECK-PWR8: LV(REG): Found max usage: 2 item175;CHECK-PWR8-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 2 registers176;CHECK-PWR8-NEXT: LV(REG): RegisterClass: PPC::VSXRC, 5 registers177;CHECK-PWR8: LV(REG): Found invariant usage: 1 item178;CHECK-PWR8-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 2 registers179 180;CHECK-PWR9: LV(REG): VF = 1181;CHECK-PWR9: LV(REG): Found max usage: 2 item182;CHECK-PWR9-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 2 registers183;CHECK-PWR9-NEXT: LV(REG): RegisterClass: PPC::VSXRC, 5 registers184;CHECK-PWR9: LV(REG): Found invariant usage: 1 item185;CHECK-PWR9-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 2 registers186 187  %1 = sext i32 %n to i64188  br label %2189 190; <label>:2                                       ; preds = %2, %0191  %indvars.iv = phi i64 [ %indvars.iv.next, %2 ], [ %1, %0 ]192  %3 = getelementptr inbounds double, ptr %A, i64 %indvars.iv193  %4 = load double, ptr %3, align 8194  %5 = fadd double %4, 3.000000e+00195  %6 = fmul double %4, 2.000000e+00196  %7 = fadd double %5, %6197  %8 = fadd double %7, 2.000000e+00198  %9 = fmul double %8, 5.000000e-01199  %10 = fadd double %6, %9200  %11 = fsub double %10, %5201  %12 = fadd double %4, %11202  %13 = fdiv double %8, %12203  %14 = fmul double %13, %8204  %15 = fmul double %6, %14205  %16 = fmul double %5, %15206  %17 = fadd double %16, -3.000000e+00207  %18 = fsub double %4, %5208  %19 = fadd double %6, %18209  %20 = fadd double %13, %19210  %21 = fadd double %20, %17211  %22 = fadd double %21, 3.000000e+00212  %23 = fmul double %4, %22213  store double %23, ptr %3, align 8214  %indvars.iv.next = add i64 %indvars.iv, -1215  %24 = trunc i64 %indvars.iv to i32216  %25 = icmp eq i32 %24, 0217  br i1 %25, label %26, label %2218 219; <label>:26                                      ; preds = %2220  ret void221}222 223define ppc_fp128 @fp128_(ptr nocapture %n, ppc_fp128 %d) nounwind readonly {224;CHECK-LABEL: fp128_225;CHECK: LV(REG): VF = 1226;CHECK: LV(REG): Found max usage: 2 item227;CHECK: LV(REG): RegisterClass: PPC::GPRRC, 2 registers228;CHECK: LV(REG): RegisterClass: PPC::VRRC, 2 registers229entry:230  br label %for.body231 232for.body:                                         ; preds = %for.body, %entry233  %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ]234  %x.05 = phi ppc_fp128 [ %d, %entry ], [ %sub, %for.body ]235  %arrayidx = getelementptr inbounds ppc_fp128, ptr %n, i32 %i.06236  %0 = load ppc_fp128, ptr %arrayidx, align 8237  %sub = fsub fast ppc_fp128 %x.05, %0238  %inc = add nsw i32 %i.06, 1239  %exitcond = icmp eq i32 %inc, 2048240  br i1 %exitcond, label %for.end, label %for.body241 242for.end:                                          ; preds = %for.body243  ret ppc_fp128 %sub244}245 246 247define void @fp16_(ptr nocapture readonly %pIn, ptr nocapture %pOut, i32 %numRows, i32 %numCols, i32 %scale.coerce) #0 {248;CHECK-LABEL: fp16_249;CHECK: LV(REG): VF = 1250;CHECK: LV(REG): Found max usage: 2 item251;CHECK: LV(REG): RegisterClass: PPC::GPRRC, 3 registers252;CHECK: LV(REG): RegisterClass: PPC::VSXRC, 2 registers253;CHECK: LV(REG): Found invariant usage: 2 item254;CHECK: LV(REG): RegisterClass: PPC::GPRRC, 1 registers255;CHECK: LV(REG): RegisterClass: PPC::VSXRC, 1 registers256 257entry:258  %tmp.0.extract.trunc = trunc i32 %scale.coerce to i16259  %0 = bitcast i16 %tmp.0.extract.trunc to half260  %mul = mul i32 %numCols, %numRows261  %shr = lshr i32 %mul, 2262  %cmp26 = icmp eq i32 %shr, 0263  br i1 %cmp26, label %while.end, label %while.body264 265while.body:                                       ; preds = %entry, %while.body266  %pIn.addr.029 = phi ptr [ %add.ptr, %while.body ], [ %pIn, %entry ]267  %pOut.addr.028 = phi ptr [ %add.ptr7, %while.body ], [ %pOut, %entry ]268  %blkCnt.027 = phi i32 [ %dec, %while.body ], [ %shr, %entry ]269  %1 = load half, ptr %pIn.addr.029, align 2270  %arrayidx2 = getelementptr inbounds half, ptr %pIn.addr.029, i32 1271  %2 = load half, ptr %arrayidx2, align 2272  %mul3 = fmul half %1, %0273  %mul4 = fmul half %2, %0274  store half %mul3, ptr %pOut.addr.028, align 2275  %arrayidx6 = getelementptr inbounds half, ptr %pOut.addr.028, i32 1276  store half %mul4, ptr %arrayidx6, align 2277  %add.ptr = getelementptr inbounds half, ptr %pIn.addr.029, i32 2278  %add.ptr7 = getelementptr inbounds half, ptr %pOut.addr.028, i32 2279  %dec = add nsw i32 %blkCnt.027, -1280  %cmp = icmp eq i32 %dec, 0281  br i1 %cmp, label %while.end, label %while.body282 283while.end:                                        ; preds = %while.body, %entry284  ret void285}286