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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize -mtriple=riscv64 -mattr=+v -S < %s | FileCheck %s3 4define void @trip1_i8(ptr noalias nocapture noundef %dst, ptr noalias nocapture noundef readonly %src) #0 {5; CHECK-LABEL: @trip1_i8(6; CHECK-NEXT: entry:7; CHECK-NEXT: br label [[FOR_BODY:%.*]]8; CHECK: for.body:9; CHECK-NEXT: [[I_08:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]10; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[SRC:%.*]], i64 [[I_08]]11; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 112; CHECK-NEXT: [[MUL:%.*]] = shl i8 [[TMP0]], 113; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[DST:%.*]], i64 [[I_08]]14; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX1]], align 115; CHECK-NEXT: [[ADD:%.*]] = add i8 [[MUL]], [[TMP1]]16; CHECK-NEXT: store i8 [[ADD]], ptr [[ARRAYIDX1]], align 117; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 118; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], 119; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END:%.*]], label [[FOR_BODY]]20; CHECK: for.end:21; CHECK-NEXT: ret void22;23entry:24 br label %for.body25 26for.body: ; preds = %entry, %for.body27 %i.08 = phi i64 [ 0, %entry ], [ %inc, %for.body ]28 %arrayidx = getelementptr inbounds i8, ptr %src, i64 %i.0829 %0 = load i8, ptr %arrayidx, align 130 %mul = shl i8 %0, 131 %arrayidx1 = getelementptr inbounds i8, ptr %dst, i64 %i.0832 %1 = load i8, ptr %arrayidx1, align 133 %add = add i8 %mul, %134 store i8 %add, ptr %arrayidx1, align 135 %inc = add nuw nsw i64 %i.08, 136 %exitcond.not = icmp eq i64 %inc, 137 br i1 %exitcond.not, label %for.end, label %for.body38 39for.end: ; preds = %for.body40 ret void41}42 43define void @trip3_i8(ptr noalias nocapture noundef %dst, ptr noalias nocapture noundef readonly %src) #0 {44; CHECK-LABEL: @trip3_i8(45; CHECK-NEXT: entry:46; CHECK-NEXT: br label [[FOR_BODY:%.*]]47; CHECK: for.body:48; CHECK-NEXT: [[I_08:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]49; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[DST:%.*]], i64 [[I_08]]50; CHECK-NEXT: [[TMP15:%.*]] = load i8, ptr [[ARRAYIDX]], align 151; CHECK-NEXT: [[MUL:%.*]] = shl i8 [[TMP15]], 152; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[DST1:%.*]], i64 [[I_08]]53; CHECK-NEXT: [[TMP16:%.*]] = load i8, ptr [[ARRAYIDX1]], align 154; CHECK-NEXT: [[ADD:%.*]] = add i8 [[MUL]], [[TMP16]]55; CHECK-NEXT: store i8 [[ADD]], ptr [[ARRAYIDX1]], align 156; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 157; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], 358; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END:%.*]], label [[FOR_BODY]]59; CHECK: for.end:60; CHECK-NEXT: ret void61;62entry:63 br label %for.body64 65for.body: ; preds = %entry, %for.body66 %i.08 = phi i64 [ 0, %entry ], [ %inc, %for.body ]67 %arrayidx = getelementptr inbounds i8, ptr %src, i64 %i.0868 %0 = load i8, ptr %arrayidx, align 169 %mul = shl i8 %0, 170 %arrayidx1 = getelementptr inbounds i8, ptr %dst, i64 %i.0871 %1 = load i8, ptr %arrayidx1, align 172 %add = add i8 %mul, %173 store i8 %add, ptr %arrayidx1, align 174 %inc = add nuw nsw i64 %i.08, 175 %exitcond.not = icmp eq i64 %inc, 376 br i1 %exitcond.not, label %for.end, label %for.body77 78for.end: ; preds = %for.body79 ret void80}81 82define void @trip5_i8(ptr noalias nocapture noundef %dst, ptr noalias nocapture noundef readonly %src) #0 {83; CHECK-LABEL: @trip5_i8(84; CHECK-NEXT: entry:85; CHECK-NEXT: br label [[FOR_BODY:%.*]]86; CHECK: for.body:87; CHECK-NEXT: [[I_08:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]88; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[DST:%.*]], i64 [[I_08]]89; CHECK-NEXT: [[TMP15:%.*]] = load i8, ptr [[ARRAYIDX]], align 190; CHECK-NEXT: [[MUL:%.*]] = shl i8 [[TMP15]], 191; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[DST1:%.*]], i64 [[I_08]]92; CHECK-NEXT: [[TMP16:%.*]] = load i8, ptr [[ARRAYIDX1]], align 193; CHECK-NEXT: [[ADD:%.*]] = add i8 [[MUL]], [[TMP16]]94; CHECK-NEXT: store i8 [[ADD]], ptr [[ARRAYIDX1]], align 195; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 196; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], 597; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END:%.*]], label [[FOR_BODY]]98; CHECK: for.end:99; CHECK-NEXT: ret void100;101entry:102 br label %for.body103 104for.body: ; preds = %entry, %for.body105 %i.08 = phi i64 [ 0, %entry ], [ %inc, %for.body ]106 %arrayidx = getelementptr inbounds i8, ptr %src, i64 %i.08107 %0 = load i8, ptr %arrayidx, align 1108 %mul = shl i8 %0, 1109 %arrayidx1 = getelementptr inbounds i8, ptr %dst, i64 %i.08110 %1 = load i8, ptr %arrayidx1, align 1111 %add = add i8 %mul, %1112 store i8 %add, ptr %arrayidx1, align 1113 %inc = add nuw nsw i64 %i.08, 1114 %exitcond.not = icmp eq i64 %inc, 5115 br i1 %exitcond.not, label %for.end, label %for.body116 117for.end: ; preds = %for.body118 ret void119}120 121define void @trip8_i8(ptr noalias nocapture noundef %dst, ptr noalias nocapture noundef readonly %src) #0 {122; CHECK-LABEL: @trip8_i8(123; CHECK-NEXT: entry:124; CHECK-NEXT: br label [[VECTOR_PH:%.*]]125; CHECK: vector.ph:126; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]127; CHECK: vector.body:128; CHECK-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i8> @llvm.vp.load.nxv4i8.p0(ptr align 1 [[SRC:%.*]], <vscale x 4 x i1> splat (i1 true), i32 8)129; CHECK-NEXT: [[TMP6:%.*]] = shl <vscale x 4 x i8> [[VP_OP_LOAD]], splat (i8 1)130; CHECK-NEXT: [[VP_OP_LOAD1:%.*]] = call <vscale x 4 x i8> @llvm.vp.load.nxv4i8.p0(ptr align 1 [[DST:%.*]], <vscale x 4 x i1> splat (i1 true), i32 8)131; CHECK-NEXT: [[TMP7:%.*]] = add <vscale x 4 x i8> [[TMP6]], [[VP_OP_LOAD1]]132; CHECK-NEXT: call void @llvm.vp.store.nxv4i8.p0(<vscale x 4 x i8> [[TMP7]], ptr align 1 [[DST]], <vscale x 4 x i1> splat (i1 true), i32 8)133; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]]134; CHECK: middle.block:135; CHECK-NEXT: br label [[FOR_BODY:%.*]]136; CHECK: for.end:137; CHECK-NEXT: ret void138;139entry:140 br label %for.body141 142for.body: ; preds = %entry, %for.body143 %i.08 = phi i64 [ 0, %entry ], [ %inc, %for.body ]144 %arrayidx = getelementptr inbounds i8, ptr %src, i64 %i.08145 %0 = load i8, ptr %arrayidx, align 1146 %mul = shl i8 %0, 1147 %arrayidx1 = getelementptr inbounds i8, ptr %dst, i64 %i.08148 %1 = load i8, ptr %arrayidx1, align 1149 %add = add i8 %mul, %1150 store i8 %add, ptr %arrayidx1, align 1151 %inc = add nuw nsw i64 %i.08, 1152 %exitcond.not = icmp eq i64 %inc, 8153 br i1 %exitcond.not, label %for.end, label %for.body154 155for.end: ; preds = %for.body156 ret void157}158 159define void @trip16_i8(ptr noalias nocapture noundef %dst, ptr noalias nocapture noundef readonly %src) #0 {160; CHECK-LABEL: @trip16_i8(161; CHECK-NEXT: entry:162; CHECK-NEXT: br label [[VECTOR_PH:%.*]]163; CHECK: vector.ph:164; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]165; CHECK: vector.body:166; CHECK-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 8 x i8> @llvm.vp.load.nxv8i8.p0(ptr align 1 [[SRC:%.*]], <vscale x 8 x i1> splat (i1 true), i32 16)167; CHECK-NEXT: [[TMP6:%.*]] = shl <vscale x 8 x i8> [[VP_OP_LOAD]], splat (i8 1)168; CHECK-NEXT: [[VP_OP_LOAD1:%.*]] = call <vscale x 8 x i8> @llvm.vp.load.nxv8i8.p0(ptr align 1 [[DST:%.*]], <vscale x 8 x i1> splat (i1 true), i32 16)169; CHECK-NEXT: [[TMP11:%.*]] = add <vscale x 8 x i8> [[TMP6]], [[VP_OP_LOAD1]]170; CHECK-NEXT: call void @llvm.vp.store.nxv8i8.p0(<vscale x 8 x i8> [[TMP11]], ptr align 1 [[DST]], <vscale x 8 x i1> splat (i1 true), i32 16)171; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]]172; CHECK: middle.block:173; CHECK-NEXT: br label [[FOR_BODY:%.*]]174; CHECK: for.end:175; CHECK-NEXT: ret void176;177entry:178 br label %for.body179 180for.body: ; preds = %entry, %for.body181 %i.08 = phi i64 [ 0, %entry ], [ %inc, %for.body ]182 %arrayidx = getelementptr inbounds i8, ptr %src, i64 %i.08183 %0 = load i8, ptr %arrayidx, align 1184 %mul = shl i8 %0, 1185 %arrayidx1 = getelementptr inbounds i8, ptr %dst, i64 %i.08186 %1 = load i8, ptr %arrayidx1, align 1187 %add = add i8 %mul, %1188 store i8 %add, ptr %arrayidx1, align 1189 %inc = add nuw nsw i64 %i.08, 1190 %exitcond.not = icmp eq i64 %inc, 16191 br i1 %exitcond.not, label %for.end, label %for.body192 193for.end: ; preds = %for.body194 ret void195}196 197 198define void @trip32_i8(ptr noalias nocapture noundef %dst, ptr noalias nocapture noundef readonly %src) #0 {199; CHECK-LABEL: @trip32_i8(200; CHECK-NEXT: entry:201; CHECK-NEXT: br label [[VECTOR_PH:%.*]]202; CHECK: vector.ph:203; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]204; CHECK: vector.body:205; CHECK-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[SRC:%.*]], <vscale x 16 x i1> splat (i1 true), i32 32)206; CHECK-NEXT: [[TMP6:%.*]] = shl <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1)207; CHECK-NEXT: [[VP_OP_LOAD1:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[DST:%.*]], <vscale x 16 x i1> splat (i1 true), i32 32)208; CHECK-NEXT: [[TMP11:%.*]] = add <vscale x 16 x i8> [[TMP6]], [[VP_OP_LOAD1]]209; CHECK-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[TMP11]], ptr align 1 [[DST]], <vscale x 16 x i1> splat (i1 true), i32 32)210; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]]211; CHECK: middle.block:212; CHECK-NEXT: br label [[FOR_BODY:%.*]]213; CHECK: for.end:214; CHECK-NEXT: ret void215;216entry:217 br label %for.body218 219for.body: ; preds = %entry, %for.body220 %i.08 = phi i64 [ 0, %entry ], [ %inc, %for.body ]221 %arrayidx = getelementptr inbounds i8, ptr %src, i64 %i.08222 %0 = load i8, ptr %arrayidx, align 1223 %mul = shl i8 %0, 1224 %arrayidx1 = getelementptr inbounds i8, ptr %dst, i64 %i.08225 %1 = load i8, ptr %arrayidx1, align 1226 %add = add i8 %mul, %1227 store i8 %add, ptr %arrayidx1, align 1228 %inc = add nuw nsw i64 %i.08, 1229 %exitcond.not = icmp eq i64 %inc, 32230 br i1 %exitcond.not, label %for.end, label %for.body231 232for.end: ; preds = %for.body233 ret void234}235 236define void @trip24_i8(ptr noalias nocapture noundef %dst, ptr noalias nocapture noundef readonly %src) #0 {237; CHECK-LABEL: @trip24_i8(238; CHECK-NEXT: entry:239; CHECK-NEXT: br label [[VECTOR_PH:%.*]]240; CHECK: vector.ph:241; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]242; CHECK: vector.body:243; CHECK-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[SRC:%.*]], <vscale x 16 x i1> splat (i1 true), i32 24)244; CHECK-NEXT: [[TMP6:%.*]] = shl <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1)245; CHECK-NEXT: [[VP_OP_LOAD1:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[DST:%.*]], <vscale x 16 x i1> splat (i1 true), i32 24)246; CHECK-NEXT: [[TMP7:%.*]] = add <vscale x 16 x i8> [[TMP6]], [[VP_OP_LOAD1]]247; CHECK-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[TMP7]], ptr align 1 [[DST]], <vscale x 16 x i1> splat (i1 true), i32 24)248; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]]249; CHECK: middle.block:250; CHECK-NEXT: br label [[FOR_BODY:%.*]]251; CHECK: for.end:252; CHECK-NEXT: ret void253;254entry:255 br label %for.body256 257for.body: ; preds = %entry, %for.body258 %i.08 = phi i64 [ 0, %entry ], [ %inc, %for.body ]259 %arrayidx = getelementptr inbounds i8, ptr %src, i64 %i.08260 %0 = load i8, ptr %arrayidx, align 1261 %mul = shl i8 %0, 1262 %arrayidx1 = getelementptr inbounds i8, ptr %dst, i64 %i.08263 %1 = load i8, ptr %arrayidx1, align 1264 %add = add i8 %mul, %1265 store i8 %add, ptr %arrayidx1, align 1266 %inc = add nuw nsw i64 %i.08, 1267 %exitcond.not = icmp eq i64 %inc, 24268 br i1 %exitcond.not, label %for.end, label %for.body269 270for.end: ; preds = %for.body271 ret void272}273 274attributes #0 = { "target-features"="+v,+d" vscale_range(2, 1024) }275 276; This is a non-power-of-2 low trip count, so we will try to tail-fold this. But277; the reduction is a multiply which is only legal for fixed-length VFs. But278; fixed-length VFs aren't legal for the default tail-folding style279; data-with-evl, so make sure we gracefully fall back to data-without-lane-mask.280 281define i8 @mul_non_pow_2_low_trip_count(ptr noalias %a) {282; CHECK-LABEL: @mul_non_pow_2_low_trip_count(283; CHECK-NEXT: entry:284; CHECK-NEXT: br label [[VECTOR_PH:%.*]]285; CHECK: vector.ph:286; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]287; CHECK: vector.body:288; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]289; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <8 x i8> [ <i8 2, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, [[VECTOR_PH]] ], [ [[TMP1:%.*]], [[VECTOR_BODY]] ]290; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 [[INDEX]]291; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i8>, ptr [[TMP0]], align 1292; CHECK-NEXT: [[TMP1]] = mul <8 x i8> [[WIDE_LOAD]], [[VEC_PHI]]293; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8294; CHECK-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]295; CHECK: middle.block:296; CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.vector.reduce.mul.v8i8(<8 x i8> [[TMP1]])297; CHECK-NEXT: br label [[SCALAR_PH:%.*]]298; CHECK: scalar.ph:299; CHECK-NEXT: br label [[FOR_BODY:%.*]]300; CHECK: for.body:301; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 8, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]302; CHECK-NEXT: [[RDX:%.*]] = phi i8 [ [[TMP3]], [[SCALAR_PH]] ], [ [[MUL:%.*]], [[FOR_BODY]] ]303; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[IV]]304; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[GEP]], align 1305; CHECK-NEXT: [[MUL]] = mul i8 [[TMP5]], [[RDX]]306; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1307; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 10308; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]309; CHECK: for.end:310; CHECK-NEXT: [[MUL_LCSSA:%.*]] = phi i8 [ [[MUL]], [[FOR_BODY]] ]311; CHECK-NEXT: ret i8 [[MUL_LCSSA]]312;313entry:314 br label %for.body315 316for.body: ; preds = %entry, %for.body317 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]318 %rdx = phi i8 [ 2, %entry ], [ %mul, %for.body ]319 %gep = getelementptr i8, ptr %a, i64 %iv320 %0 = load i8, ptr %gep321 %mul = mul i8 %0, %rdx322 %iv.next = add i64 %iv, 1323 %exitcond.not = icmp eq i64 %iv.next, 10324 br i1 %exitcond.not, label %for.end, label %for.body325 326for.end: ; preds = %for.body, %entry327 ret i8 %mul328}329