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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+v,+f -S 2>%t | FileCheck %s3 4; A collection of fairly basic functional tests when both fixed and scalable vectorization is5; allowed. The primary goal of this is check for crashes during cost modeling, but it also6; exercises the default heuristics in a useful way.7 8define void @vector_add(ptr noalias nocapture %a, i64 %v, i64 %n) {9; CHECK-LABEL: @vector_add(10; CHECK-NEXT: entry:11; CHECK-NEXT: br label [[VECTOR_PH:%.*]]12; CHECK: vector.ph:13; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[V:%.*]], i64 014; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer15; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]16; CHECK: vector.body:17; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]18; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]19; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)20; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], i64 [[INDEX]]21; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.vp.load.nxv2i64.p0(ptr align 8 [[TMP6]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP10]])22; CHECK-NEXT: [[TMP8:%.*]] = add <vscale x 2 x i64> [[WIDE_LOAD]], [[BROADCAST_SPLAT]]23; CHECK-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> [[TMP8]], ptr align 8 [[TMP6]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP10]])24; CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i6425; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP11]], [[INDEX]]26; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP11]]27; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[AVL_NEXT]], 028; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]29; CHECK: middle.block:30; CHECK-NEXT: br label [[FOR_BODY:%.*]]31; CHECK: for.end:32; CHECK-NEXT: ret void33;34entry:35 br label %for.body36 37for.body:38 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]39 %arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv40 %elem = load i64, ptr %arrayidx41 %add = add i64 %elem, %v42 store i64 %add, ptr %arrayidx43 %iv.next = add nuw nsw i64 %iv, 144 %exitcond.not = icmp eq i64 %iv.next, 102445 br i1 %exitcond.not, label %for.end, label %for.body46 47for.end:48 ret void49}50 51; Same as above, but with op type of i32. We currently have a bug around52; etype=ELEN profitability in the vectorizer, and having a smaller element53; width test allows us to highlight different aspects of codegen.54define void @vector_add_i32(ptr noalias nocapture %a, i32 %v, i64 %n) {55; CHECK-LABEL: @vector_add_i32(56; CHECK-NEXT: entry:57; CHECK-NEXT: br label [[VECTOR_PH:%.*]]58; CHECK: vector.ph:59; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[V:%.*]], i64 060; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer61; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]62; CHECK: vector.body:63; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]64; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]65; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)66; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDEX]]67; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])68; CHECK-NEXT: [[TMP8:%.*]] = add <vscale x 4 x i32> [[WIDE_LOAD]], [[BROADCAST_SPLAT]]69; CHECK-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP8]], ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])70; CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i6471; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP11]], [[INDEX]]72; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP11]]73; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[AVL_NEXT]], 074; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]75; CHECK: middle.block:76; CHECK-NEXT: br label [[FOR_BODY:%.*]]77; CHECK: for.end:78; CHECK-NEXT: ret void79;80entry:81 br label %for.body82 83for.body:84 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]85 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv86 %elem = load i32, ptr %arrayidx87 %add = add i32 %elem, %v88 store i32 %add, ptr %arrayidx89 %iv.next = add nuw nsw i64 %iv, 190 %exitcond.not = icmp eq i64 %iv.next, 102491 br i1 %exitcond.not, label %for.end, label %for.body92 93for.end:94 ret void95}96 97 98; a[b[i]] += v, mostly to exercise scatter/gather costing99; TODO: Currently fails to vectorize due to a memory conflict100define void @indexed_add(ptr noalias nocapture %a, ptr noalias nocapture %b, i64 %v, i64 %n) {101; CHECK-LABEL: @indexed_add(102; CHECK-NEXT: entry:103; CHECK-NEXT: br label [[FOR_BODY:%.*]]104; CHECK: for.body:105; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]106; CHECK-NEXT: [[BADDR:%.*]] = getelementptr inbounds i64, ptr [[B:%.*]], i64 [[IV]]107; CHECK-NEXT: [[AIDX:%.*]] = load i64, ptr [[BADDR]], align 8108; CHECK-NEXT: [[AADDR:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], i64 [[AIDX]]109; CHECK-NEXT: [[ELEM:%.*]] = load i64, ptr [[AADDR]], align 8110; CHECK-NEXT: [[ADD:%.*]] = add i64 [[ELEM]], [[V:%.*]]111; CHECK-NEXT: store i64 [[ADD]], ptr [[AADDR]], align 8112; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1113; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 1024114; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END:%.*]], label [[FOR_BODY]]115; CHECK: for.end:116; CHECK-NEXT: ret void117;118entry:119 br label %for.body120 121for.body:122 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]123 %baddr = getelementptr inbounds i64, ptr %b, i64 %iv124 %aidx = load i64, ptr %baddr125 %aaddr = getelementptr inbounds i64, ptr %a, i64 %aidx126 %elem = load i64, ptr %aaddr127 %add = add i64 %elem, %v128 store i64 %add, ptr %aaddr129 %iv.next = add nuw nsw i64 %iv, 1130 %exitcond.not = icmp eq i64 %iv.next, 1024131 br i1 %exitcond.not, label %for.end, label %for.body132 133for.end:134 ret void135}136 137; a[b[i]] = v, exercise scatter support138define void @indexed_store(ptr noalias nocapture %a, ptr noalias nocapture %b, i64 %v, i64 %n) {139; CHECK-LABEL: @indexed_store(140; CHECK-NEXT: entry:141; CHECK-NEXT: br label [[VECTOR_PH:%.*]]142; CHECK: vector.ph:143; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[V:%.*]], i64 0144; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer145; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]146; CHECK: vector.body:147; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]148; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]149; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)150; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[B:%.*]], i64 [[INDEX]]151; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.vp.load.nxv2i64.p0(ptr align 8 [[TMP6]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP10]])152; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], <vscale x 2 x i64> [[WIDE_LOAD]]153; CHECK-NEXT: call void @llvm.vp.scatter.nxv2i64.nxv2p0(<vscale x 2 x i64> [[BROADCAST_SPLAT]], <vscale x 2 x ptr> align 8 [[TMP8]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP10]])154; CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64155; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP11]], [[INDEX]]156; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP11]]157; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[AVL_NEXT]], 0158; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]159; CHECK: middle.block:160; CHECK-NEXT: br label [[FOR_BODY:%.*]]161; CHECK: for.end:162; CHECK-NEXT: ret void163;164entry:165 br label %for.body166 167for.body:168 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]169 %baddr = getelementptr inbounds i64, ptr %b, i64 %iv170 %aidx = load i64, ptr %baddr171 %aaddr = getelementptr inbounds i64, ptr %a, i64 %aidx172 store i64 %v, ptr %aaddr173 %iv.next = add nuw nsw i64 %iv, 1174 %exitcond.not = icmp eq i64 %iv.next, 1024175 br i1 %exitcond.not, label %for.end, label %for.body176 177for.end:178 ret void179}180 181define i64 @indexed_load(ptr noalias nocapture %a, ptr noalias nocapture %b, i64 %v, i64 %n) {182; CHECK-LABEL: @indexed_load(183; CHECK-NEXT: entry:184; CHECK-NEXT: br label [[VECTOR_PH:%.*]]185; CHECK: vector.ph:186; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]187; CHECK: vector.body:188; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]189; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 2 x i64> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ]190; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]191; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)192; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[B:%.*]], i64 [[INDEX]]193; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.vp.load.nxv2i64.p0(ptr align 8 [[TMP6]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]])194; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], <vscale x 2 x i64> [[WIDE_LOAD]]195; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i64> @llvm.vp.gather.nxv2i64.nxv2p0(<vscale x 2 x ptr> align 8 [[TMP8]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]])196; CHECK-NEXT: [[TMP13:%.*]] = add <vscale x 2 x i64> [[VEC_PHI]], [[WIDE_MASKED_GATHER]]197; CHECK-NEXT: [[TMP9]] = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> splat (i1 true), <vscale x 2 x i64> [[TMP13]], <vscale x 2 x i64> [[VEC_PHI]], i32 [[TMP12]])198; CHECK-NEXT: [[TMP10:%.*]] = zext i32 [[TMP12]] to i64199; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP10]], [[INDEX]]200; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP10]]201; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0202; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]203; CHECK: middle.block:204; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.vector.reduce.add.nxv2i64(<vscale x 2 x i64> [[TMP9]])205; CHECK-NEXT: br label [[FOR_BODY:%.*]]206; CHECK: for.end:207; CHECK-NEXT: ret i64 [[TMP11]]208;209entry:210 br label %for.body211 212for.body:213 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]214 %sum = phi i64 [0, %entry], [%sum.next, %for.body]215 %baddr = getelementptr inbounds i64, ptr %b, i64 %iv216 %aidx = load i64, ptr %baddr217 %aaddr = getelementptr inbounds i64, ptr %a, i64 %aidx218 %elem = load i64, ptr %aaddr219 %iv.next = add nuw nsw i64 %iv, 1220 %sum.next = add i64 %sum, %elem221 %exitcond.not = icmp eq i64 %iv.next, 1024222 br i1 %exitcond.not, label %for.end, label %for.body223 224for.end:225 ret i64 %sum.next226}227 228define void @splat_int(ptr noalias nocapture %a, i64 %v, i64 %n) {229; CHECK-LABEL: @splat_int(230; CHECK-NEXT: entry:231; CHECK-NEXT: br label [[VECTOR_PH:%.*]]232; CHECK: vector.ph:233; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[V:%.*]], i64 0234; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer235; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]236; CHECK: vector.body:237; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]238; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]239; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)240; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], i64 [[INDEX]]241; CHECK-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> [[BROADCAST_SPLAT]], ptr align 8 [[TMP6]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP10]])242; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP10]] to i64243; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP7]], [[INDEX]]244; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP7]]245; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[AVL_NEXT]], 0246; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]247; CHECK: middle.block:248; CHECK-NEXT: br label [[FOR_BODY:%.*]]249; CHECK: for.end:250; CHECK-NEXT: ret void251;252entry:253 br label %for.body254 255for.body:256 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]257 %arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv258 store i64 %v, ptr %arrayidx259 %iv.next = add nuw nsw i64 %iv, 1260 %exitcond.not = icmp eq i64 %iv.next, 1024261 br i1 %exitcond.not, label %for.end, label %for.body262 263for.end:264 ret void265}266 267define void @splat_ptr(ptr noalias nocapture %a, ptr %v, i64 %n) {268; CHECK-LABEL: @splat_ptr(269; CHECK-NEXT: entry:270; CHECK-NEXT: br label [[VECTOR_PH:%.*]]271; CHECK: vector.ph:272; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[V:%.*]], i64 0273; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer274; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]275; CHECK: vector.body:276; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]277; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]278; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)279; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], i64 [[INDEX]]280; CHECK-NEXT: call void @llvm.vp.store.nxv2p0.p0(<vscale x 2 x ptr> [[BROADCAST_SPLAT]], ptr align 8 [[TMP6]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP10]])281; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP10]] to i64282; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP7]], [[INDEX]]283; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP7]]284; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[AVL_NEXT]], 0285; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]286; CHECK: middle.block:287; CHECK-NEXT: br label [[FOR_BODY:%.*]]288; CHECK: for.end:289; CHECK-NEXT: ret void290;291entry:292 br label %for.body293 294for.body:295 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]296 %arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv297 store ptr %v, ptr %arrayidx298 %iv.next = add nuw nsw i64 %iv, 1299 %exitcond.not = icmp eq i64 %iv.next, 1024300 br i1 %exitcond.not, label %for.end, label %for.body301 302for.end:303 ret void304}305 306