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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 52; RUN: opt -p loop-vectorize -mtriple riscv64 -mattr=+v -S < %s | FileCheck %s3 4define i32 @select_icmp(i32 %x, i32 %y, ptr nocapture readonly %c, i64 %n) {5; CHECK-LABEL: define i32 @select_icmp(6; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], ptr readonly captures(none) [[C:%.*]], i64 [[N:%.*]]) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: br label %[[VECTOR_PH:.*]]9; CHECK: [[VECTOR_PH]]:10; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[X]], i64 011; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer12; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]13; CHECK: [[VECTOR_BODY]]:14; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]15; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ]16; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]17; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)18; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]19; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])20; CHECK-NEXT: [[TMP7:%.*]] = icmp sge <vscale x 4 x i32> [[WIDE_LOAD]], [[BROADCAST_SPLAT]]21; CHECK-NEXT: [[TMP8]] = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> [[TMP7]], <vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> [[VEC_PHI]], i32 [[TMP14]])22; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[TMP14]] to i6423; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP9]], [[INDEX]]24; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP9]]25; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[AVL_NEXT]], 026; CHECK-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]27; CHECK: [[MIDDLE_BLOCK]]:28; CHECK-NEXT: [[TMP10:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP8]])29; CHECK-NEXT: [[TMP11:%.*]] = freeze i1 [[TMP10]]30; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP11]], i32 [[Y]], i32 031; CHECK-NEXT: br label %[[FOR_END:.*]]32; CHECK: [[FOR_END]]:33; CHECK-NEXT: ret i32 [[RDX_SELECT]]34;35entry:36 br label %for.body37 38for.body:39 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]40 %a = phi i32 [ 0, %entry], [ %cond, %for.body ]41 %arrayidx = getelementptr inbounds i32, ptr %c, i64 %indvars.iv42 %0 = load i32, ptr %arrayidx, align 443 %cmp1 = icmp slt i32 %0, %x44 %cond = select i1 %cmp1, i32 %a, i32 %y45 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 146 %exitcond.not = icmp eq i64 %indvars.iv.next, %n47 br i1 %exitcond.not, label %for.end, label %for.body48 49for.end:50 ret i32 %cond51}52 53define i32 @select_fcmp(float %x, i32 %y, ptr nocapture readonly %c, i64 %n) {54; CHECK-LABEL: define i32 @select_fcmp(55; CHECK-SAME: float [[X:%.*]], i32 [[Y:%.*]], ptr readonly captures(none) [[C:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {56; CHECK-NEXT: [[ENTRY:.*:]]57; CHECK-NEXT: br label %[[VECTOR_PH:.*]]58; CHECK: [[VECTOR_PH]]:59; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x float> poison, float [[X]], i64 060; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x float> [[BROADCAST_SPLATINSERT]], <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer61; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]62; CHECK: [[VECTOR_BODY]]:63; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]64; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ]65; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]66; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)67; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[INDEX]]68; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])69; CHECK-NEXT: [[TMP7:%.*]] = fcmp fast uge <vscale x 4 x float> [[WIDE_LOAD]], [[BROADCAST_SPLAT]]70; CHECK-NEXT: [[TMP8]] = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> [[TMP7]], <vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> [[VEC_PHI]], i32 [[TMP14]])71; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[TMP14]] to i6472; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP9]], [[INDEX]]73; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP9]]74; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[AVL_NEXT]], 075; CHECK-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]76; CHECK: [[MIDDLE_BLOCK]]:77; CHECK-NEXT: [[TMP10:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP8]])78; CHECK-NEXT: [[TMP11:%.*]] = freeze i1 [[TMP10]]79; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP11]], i32 [[Y]], i32 080; CHECK-NEXT: br label %[[FOR_END:.*]]81; CHECK: [[FOR_END]]:82; CHECK-NEXT: ret i32 [[RDX_SELECT]]83;84entry:85 br label %for.body86 87for.body:88 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]89 %a = phi i32 [ 0, %entry], [ %cond, %for.body ]90 %arrayidx = getelementptr inbounds float, ptr %c, i64 %indvars.iv91 %0 = load float, ptr %arrayidx, align 492 %cmp1 = fcmp fast olt float %0, %x93 %cond = select i1 %cmp1, i32 %a, i32 %y94 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 195 %exitcond.not = icmp eq i64 %indvars.iv.next, %n96 br i1 %exitcond.not, label %for.end, label %for.body97 98for.end:99 ret i32 %cond100}101 102define i32 @select_const_i32_from_icmp(ptr nocapture readonly %v, i64 %n) {103; CHECK-LABEL: define i32 @select_const_i32_from_icmp(104; CHECK-SAME: ptr readonly captures(none) [[V:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {105; CHECK-NEXT: [[ENTRY:.*:]]106; CHECK-NEXT: br label %[[VECTOR_PH:.*]]107; CHECK: [[VECTOR_PH]]:108; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]109; CHECK: [[VECTOR_BODY]]:110; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]111; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ]112; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]113; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)114; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[V]], i64 [[INDEX]]115; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP21]])116; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <vscale x 4 x i32> [[WIDE_LOAD]], splat (i32 3)117; CHECK-NEXT: [[TMP8]] = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> [[TMP7]], <vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> [[VEC_PHI]], i32 [[TMP21]])118; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[TMP21]] to i64119; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP9]], [[INDEX]]120; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP9]]121; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[AVL_NEXT]], 0122; CHECK-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]123; CHECK: [[MIDDLE_BLOCK]]:124; CHECK-NEXT: [[TMP10:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP8]])125; CHECK-NEXT: [[TMP11:%.*]] = freeze i1 [[TMP10]]126; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP11]], i32 7, i32 3127; CHECK-NEXT: br label %[[EXIT:.*]]128; CHECK: [[EXIT]]:129; CHECK-NEXT: ret i32 [[RDX_SELECT]]130;131entry:132 br label %for.body133 134for.body: ; preds = %entry, %for.body135 %0 = phi i64 [ 0, %entry ], [ %6, %for.body ]136 %1 = phi i32 [ 3, %entry ], [ %5, %for.body ]137 %2 = getelementptr inbounds i32, ptr %v, i64 %0138 %3 = load i32, ptr %2, align 4139 %4 = icmp eq i32 %3, 3140 %5 = select i1 %4, i32 %1, i32 7141 %6 = add nuw nsw i64 %0, 1142 %7 = icmp eq i64 %6, %n143 br i1 %7, label %exit, label %for.body144 145exit: ; preds = %for.body146 ret i32 %5147}148 149define i32 @select_i32_from_icmp(ptr nocapture readonly %v, i32 %a, i32 %b, i64 %n) {150; CHECK-LABEL: define i32 @select_i32_from_icmp(151; CHECK-SAME: ptr readonly captures(none) [[V:%.*]], i32 [[A:%.*]], i32 [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {152; CHECK-NEXT: [[ENTRY:.*:]]153; CHECK-NEXT: br label %[[VECTOR_PH:.*]]154; CHECK: [[VECTOR_PH]]:155; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]156; CHECK: [[VECTOR_BODY]]:157; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]158; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ]159; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]160; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)161; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[V]], i64 [[INDEX]]162; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP21]])163; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <vscale x 4 x i32> [[WIDE_LOAD]], splat (i32 3)164; CHECK-NEXT: [[TMP8]] = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> [[TMP7]], <vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> [[VEC_PHI]], i32 [[TMP21]])165; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[TMP21]] to i64166; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP9]], [[INDEX]]167; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP9]]168; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[AVL_NEXT]], 0169; CHECK-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]170; CHECK: [[MIDDLE_BLOCK]]:171; CHECK-NEXT: [[TMP10:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP8]])172; CHECK-NEXT: [[TMP11:%.*]] = freeze i1 [[TMP10]]173; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP11]], i32 [[B]], i32 [[A]]174; CHECK-NEXT: br label %[[EXIT:.*]]175; CHECK: [[EXIT]]:176; CHECK-NEXT: ret i32 [[RDX_SELECT]]177;178entry:179 br label %for.body180 181for.body: ; preds = %entry, %for.body182 %0 = phi i64 [ 0, %entry ], [ %6, %for.body ]183 %1 = phi i32 [ %a, %entry ], [ %5, %for.body ]184 %2 = getelementptr inbounds i32, ptr %v, i64 %0185 %3 = load i32, ptr %2, align 4186 %4 = icmp eq i32 %3, 3187 %5 = select i1 %4, i32 %1, i32 %b188 %6 = add nuw nsw i64 %0, 1189 %7 = icmp eq i64 %6, %n190 br i1 %7, label %exit, label %for.body191 192exit: ; preds = %for.body193 ret i32 %5194}195 196define i32 @select_const_i32_from_fcmp(ptr nocapture readonly %v, i64 %n) {197; CHECK-LABEL: define i32 @select_const_i32_from_fcmp(198; CHECK-SAME: ptr readonly captures(none) [[V:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {199; CHECK-NEXT: [[ENTRY:.*:]]200; CHECK-NEXT: br label %[[VECTOR_PH:.*]]201; CHECK: [[VECTOR_PH]]:202; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]203; CHECK: [[VECTOR_BODY]]:204; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]205; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ]206; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]207; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)208; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr [[V]], i64 [[INDEX]]209; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP21]])210; CHECK-NEXT: [[TMP7:%.*]] = fcmp fast one <vscale x 4 x float> [[WIDE_LOAD]], splat (float 3.000000e+00)211; CHECK-NEXT: [[TMP8]] = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> [[TMP7]], <vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> [[VEC_PHI]], i32 [[TMP21]])212; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[TMP21]] to i64213; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP9]], [[INDEX]]214; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP9]]215; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[AVL_NEXT]], 0216; CHECK-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]217; CHECK: [[MIDDLE_BLOCK]]:218; CHECK-NEXT: [[TMP10:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP8]])219; CHECK-NEXT: [[TMP11:%.*]] = freeze i1 [[TMP10]]220; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP11]], i32 1, i32 2221; CHECK-NEXT: br label %[[EXIT:.*]]222; CHECK: [[EXIT]]:223; CHECK-NEXT: ret i32 [[RDX_SELECT]]224;225entry:226 br label %for.body227 228for.body: ; preds = %entry, %for.body229 %0 = phi i64 [ 0, %entry ], [ %6, %for.body ]230 %1 = phi i32 [ 2, %entry ], [ %5, %for.body ]231 %2 = getelementptr inbounds float, ptr %v, i64 %0232 %3 = load float, ptr %2, align 4233 %4 = fcmp fast ueq float %3, 3.0234 %5 = select i1 %4, i32 %1, i32 1235 %6 = add nuw nsw i64 %0, 1236 %7 = icmp eq i64 %6, %n237 br i1 %7, label %exit, label %for.body238 239exit: ; preds = %for.body240 ret i32 %5241}242 243define float @select_const_f32_from_icmp(ptr nocapture readonly %v, i64 %n) {244; CHECK-LABEL: define float @select_const_f32_from_icmp(245; CHECK-SAME: ptr readonly captures(none) [[V:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {246; CHECK-NEXT: [[ENTRY:.*]]:247; CHECK-NEXT: br label %[[FOR_BODY:.*]]248; CHECK: [[FOR_BODY]]:249; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[TMP6:%.*]], %[[FOR_BODY]] ]250; CHECK-NEXT: [[TMP1:%.*]] = phi fast float [ 3.000000e+00, %[[ENTRY]] ], [ [[TMP5:%.*]], %[[FOR_BODY]] ]251; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[V]], i64 [[TMP0]]252; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4253; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 3254; CHECK-NEXT: [[TMP5]] = select fast i1 [[TMP4]], float [[TMP1]], float 7.000000e+00255; CHECK-NEXT: [[TMP6]] = add nuw nsw i64 [[TMP0]], 1256; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[TMP6]], [[N]]257; CHECK-NEXT: br i1 [[TMP7]], label %[[EXIT:.*]], label %[[FOR_BODY]]258; CHECK: [[EXIT]]:259; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi float [ [[TMP5]], %[[FOR_BODY]] ]260; CHECK-NEXT: ret float [[DOTLCSSA]]261;262entry:263 br label %for.body264 265for.body: ; preds = %entry, %for.body266 %0 = phi i64 [ 0, %entry ], [ %6, %for.body ]267 %1 = phi fast float [ 3.0, %entry ], [ %5, %for.body ]268 %2 = getelementptr inbounds i32, ptr %v, i64 %0269 %3 = load i32, ptr %2, align 4270 %4 = icmp eq i32 %3, 3271 %5 = select fast i1 %4, float %1, float 7.0272 %6 = add nuw nsw i64 %0, 1273 %7 = icmp eq i64 %6, %n274 br i1 %7, label %exit, label %for.body275 276exit: ; preds = %for.body277 ret float %5278}279 280define i32 @pred_select_const_i32_from_icmp(ptr noalias nocapture readonly %src1, ptr noalias nocapture readonly %src2, i64 %n) {281; CHECK-LABEL: define i32 @pred_select_const_i32_from_icmp(282; CHECK-SAME: ptr noalias readonly captures(none) [[SRC1:%.*]], ptr noalias readonly captures(none) [[SRC2:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {283; CHECK-NEXT: [[ENTRY:.*:]]284; CHECK-NEXT: br label %[[VECTOR_PH:.*]]285; CHECK: [[VECTOR_PH]]:286; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]287; CHECK: [[VECTOR_BODY]]:288; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]289; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PREDPHI:%.*]], %[[VECTOR_BODY]] ]290; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]291; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)292; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[SRC1]], i64 [[INDEX]]293; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP17]])294; CHECK-NEXT: [[TMP7:%.*]] = icmp sgt <vscale x 4 x i32> [[WIDE_LOAD]], splat (i32 35)295; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i32, ptr [[SRC2]], i64 [[INDEX]]296; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP8]], <vscale x 4 x i1> [[TMP7]], i32 [[TMP17]])297; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <vscale x 4 x i32> [[WIDE_MASKED_LOAD]], splat (i32 2)298; CHECK-NEXT: [[TMP10:%.*]] = or <vscale x 4 x i1> [[VEC_PHI]], [[TMP9]]299; CHECK-NEXT: [[PREDPHI1:%.*]] = select <vscale x 4 x i1> [[TMP7]], <vscale x 4 x i1> [[TMP10]], <vscale x 4 x i1> [[VEC_PHI]]300; CHECK-NEXT: [[PREDPHI]] = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> [[PREDPHI1]], <vscale x 4 x i1> [[VEC_PHI]], i32 [[TMP17]])301; CHECK-NEXT: [[TMP21:%.*]] = zext i32 [[TMP17]] to i64302; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP21]], [[INDEX]]303; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP21]]304; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[AVL_NEXT]], 0305; CHECK-NEXT: br i1 [[TMP16]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]306; CHECK: [[MIDDLE_BLOCK]]:307; CHECK-NEXT: [[TMP12:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[PREDPHI]])308; CHECK-NEXT: [[TMP13:%.*]] = freeze i1 [[TMP12]]309; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP13]], i32 1, i32 0310; CHECK-NEXT: br label %[[FOR_END_LOOPEXIT:.*]]311; CHECK: [[FOR_END_LOOPEXIT]]:312; CHECK-NEXT: ret i32 [[RDX_SELECT]]313;314entry:315 br label %for.body316 317for.body: ; preds = %entry, %for.inc318 %i.013 = phi i64 [ %inc, %for.inc ], [ 0, %entry ]319 %r.012 = phi i32 [ %r.1, %for.inc ], [ 0, %entry ]320 %arrayidx = getelementptr inbounds i32, ptr %src1, i64 %i.013321 %0 = load i32, ptr %arrayidx, align 4322 %cmp1 = icmp sgt i32 %0, 35323 br i1 %cmp1, label %if.then, label %for.inc324 325if.then: ; preds = %for.body326 %arrayidx2 = getelementptr inbounds i32, ptr %src2, i64 %i.013327 %1 = load i32, ptr %arrayidx2, align 4328 %cmp3 = icmp eq i32 %1, 2329 %spec.select = select i1 %cmp3, i32 1, i32 %r.012330 br label %for.inc331 332for.inc: ; preds = %if.then, %for.body333 %r.1 = phi i32 [ %r.012, %for.body ], [ %spec.select, %if.then ]334 %inc = add nuw nsw i64 %i.013, 1335 %exitcond.not = icmp eq i64 %inc, %n336 br i1 %exitcond.not, label %for.end.loopexit, label %for.body337 338for.end.loopexit: ; preds = %for.inc339 %r.1.lcssa = phi i32 [ %r.1, %for.inc ]340 ret i32 %r.1.lcssa341}342