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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -passes=loop-vectorize \3; RUN: -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue \4; RUN: -mtriple=riscv64 -mattr=+v -S %s | FileCheck %s --check-prefix=IF-EVL5 6; RUN: opt -passes=loop-vectorize \7; RUN: -prefer-predicate-over-epilogue=scalar-epilogue \8; RUN: -mtriple=riscv64 -mattr=+v -S %s | FileCheck %s --check-prefix=NO-VP9 10define void @vp_sext(ptr %a, ptr %b, i64 %N) {11; IF-EVL-LABEL: define void @vp_sext(12; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0:[0-9]+]] {13; IF-EVL-NEXT: [[ENTRY:.*:]]14; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]15; IF-EVL: [[VECTOR_MEMCHECK]]:16; IF-EVL-NEXT: [[TMP5:%.*]] = shl i64 [[N]], 317; IF-EVL-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]18; IF-EVL-NEXT: [[TMP6:%.*]] = shl i64 [[N]], 219; IF-EVL-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP6]]20; IF-EVL-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]21; IF-EVL-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]22; IF-EVL-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]23; IF-EVL-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]24; IF-EVL: [[VECTOR_PH]]:25; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]26; IF-EVL: [[VECTOR_BODY]]:27; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]28; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]29; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)30; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[EVL_BASED_IV]]31; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.vp.load.nxv2i32.p0(ptr align 4 [[TMP14]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META0:![0-9]+]]32; IF-EVL-NEXT: [[TMP16:%.*]] = sext <vscale x 2 x i32> [[VP_OP_LOAD]] to <vscale x 2 x i64>33; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[EVL_BASED_IV]]34; IF-EVL-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> [[TMP16]], ptr align 8 [[TMP17]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META3:![0-9]+]], !noalias [[META0]]35; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i6436; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP19]], [[EVL_BASED_IV]]37; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]38; IF-EVL-NEXT: [[TMP13:%.*]] = icmp eq i64 [[AVL_NEXT]], 039; IF-EVL-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]40; IF-EVL: [[MIDDLE_BLOCK]]:41; IF-EVL-NEXT: br label %[[EXIT:.*]]42; IF-EVL: [[SCALAR_PH]]:43; IF-EVL-NEXT: br label %[[LOOP:.*]]44; IF-EVL: [[LOOP]]:45; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[LOOP]] ], [ 0, %[[SCALAR_PH]] ]46; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]47; IF-EVL-NEXT: [[TMP21:%.*]] = load i32, ptr [[GEP]], align 448; IF-EVL-NEXT: [[CONV2:%.*]] = sext i32 [[TMP21]] to i6449; IF-EVL-NEXT: [[GEP4:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]]50; IF-EVL-NEXT: store i64 [[CONV2]], ptr [[GEP4]], align 851; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 152; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]53; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP8:![0-9]+]]54; IF-EVL: [[EXIT]]:55; IF-EVL-NEXT: ret void56;57; NO-VP-LABEL: define void @vp_sext(58; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0:[0-9]+]] {59; NO-VP-NEXT: [[ENTRY:.*]]:60; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()61; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 162; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 20)63; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]64; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]65; NO-VP: [[VECTOR_MEMCHECK]]:66; NO-VP-NEXT: [[TMP3:%.*]] = shl i64 [[N]], 367; NO-VP-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]68; NO-VP-NEXT: [[TMP4:%.*]] = shl i64 [[N]], 269; NO-VP-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP4]]70; NO-VP-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]71; NO-VP-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]72; NO-VP-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]73; NO-VP-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]74; NO-VP: [[VECTOR_PH]]:75; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()76; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 277; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP6]]78; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]79; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]80; NO-VP: [[VECTOR_BODY]]:81; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]82; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]83; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x i32>, ptr [[GEP]], align 4, !alias.scope [[META0:![0-9]+]]84; NO-VP-NEXT: [[TMP10:%.*]] = sext <vscale x 2 x i32> [[WIDE_LOAD]] to <vscale x 2 x i64>85; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]]86; NO-VP-NEXT: store <vscale x 2 x i64> [[TMP10]], ptr [[TMP11]], align 8, !alias.scope [[META3:![0-9]+]], !noalias [[META0]]87; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP6]]88; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]89; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]90; NO-VP: [[MIDDLE_BLOCK]]:91; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]92; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]93; NO-VP: [[SCALAR_PH]]:94; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]95; NO-VP-NEXT: br label %[[LOOP:.*]]96; NO-VP: [[LOOP]]:97; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]98; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV1]]99; NO-VP-NEXT: [[TMP0:%.*]] = load i32, ptr [[GEP1]], align 4100; NO-VP-NEXT: [[CONV2:%.*]] = sext i32 [[TMP0]] to i64101; NO-VP-NEXT: [[GEP4:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV1]]102; NO-VP-NEXT: store i64 [[CONV2]], ptr [[GEP4]], align 8103; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1104; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]105; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP8:![0-9]+]]106; NO-VP: [[EXIT]]:107; NO-VP-NEXT: ret void108;109entry:110 br label %loop111 112loop:113 %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]114 %gep = getelementptr inbounds i32, ptr %b, i64 %iv115 %0 = load i32, ptr %gep, align 4116 %conv2 = sext i32 %0 to i64117 %gep4 = getelementptr inbounds i64, ptr %a, i64 %iv118 store i64 %conv2, ptr %gep4, align 8119 %iv.next = add nuw nsw i64 %iv, 1120 %exitcond.not = icmp eq i64 %iv.next, %N121 br i1 %exitcond.not, label %exit, label %loop122 123exit:124 ret void125}126 127define void @vp_zext(ptr %a, ptr %b, i64 %N) {128; IF-EVL-LABEL: define void @vp_zext(129; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {130; IF-EVL-NEXT: [[ENTRY:.*:]]131; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]132; IF-EVL: [[VECTOR_MEMCHECK]]:133; IF-EVL-NEXT: [[TMP5:%.*]] = shl i64 [[N]], 3134; IF-EVL-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]135; IF-EVL-NEXT: [[TMP6:%.*]] = shl i64 [[N]], 2136; IF-EVL-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP6]]137; IF-EVL-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]138; IF-EVL-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]139; IF-EVL-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]140; IF-EVL-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]141; IF-EVL: [[VECTOR_PH]]:142; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]143; IF-EVL: [[VECTOR_BODY]]:144; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]145; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]146; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)147; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[EVL_BASED_IV]]148; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.vp.load.nxv2i32.p0(ptr align 4 [[TMP14]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META9:![0-9]+]]149; IF-EVL-NEXT: [[TMP16:%.*]] = zext <vscale x 2 x i32> [[VP_OP_LOAD]] to <vscale x 2 x i64>150; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[EVL_BASED_IV]]151; IF-EVL-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> [[TMP16]], ptr align 8 [[TMP17]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META12:![0-9]+]], !noalias [[META9]]152; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i64153; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP19]], [[EVL_BASED_IV]]154; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]155; IF-EVL-NEXT: [[TMP13:%.*]] = icmp eq i64 [[AVL_NEXT]], 0156; IF-EVL-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]157; IF-EVL: [[MIDDLE_BLOCK]]:158; IF-EVL-NEXT: br label %[[EXIT:.*]]159; IF-EVL: [[SCALAR_PH]]:160; IF-EVL-NEXT: br label %[[LOOP:.*]]161; IF-EVL: [[LOOP]]:162; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]163; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]164; IF-EVL-NEXT: [[TMP21:%.*]] = load i32, ptr [[GEP]], align 4165; IF-EVL-NEXT: [[CONV:%.*]] = zext i32 [[TMP21]] to i64166; IF-EVL-NEXT: [[GEP2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]]167; IF-EVL-NEXT: store i64 [[CONV]], ptr [[GEP2]], align 8168; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1169; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]170; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP15:![0-9]+]]171; IF-EVL: [[EXIT]]:172; IF-EVL-NEXT: ret void173;174; NO-VP-LABEL: define void @vp_zext(175; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {176; NO-VP-NEXT: [[ENTRY:.*]]:177; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()178; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 1179; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 20)180; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]181; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]182; NO-VP: [[VECTOR_MEMCHECK]]:183; NO-VP-NEXT: [[TMP3:%.*]] = shl i64 [[N]], 3184; NO-VP-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]185; NO-VP-NEXT: [[TMP4:%.*]] = shl i64 [[N]], 2186; NO-VP-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP4]]187; NO-VP-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]188; NO-VP-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]189; NO-VP-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]190; NO-VP-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]191; NO-VP: [[VECTOR_PH]]:192; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()193; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 2194; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP6]]195; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]196; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]197; NO-VP: [[VECTOR_BODY]]:198; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]199; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]200; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x i32>, ptr [[GEP]], align 4, !alias.scope [[META9:![0-9]+]]201; NO-VP-NEXT: [[TMP10:%.*]] = zext <vscale x 2 x i32> [[WIDE_LOAD]] to <vscale x 2 x i64>202; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]]203; NO-VP-NEXT: store <vscale x 2 x i64> [[TMP10]], ptr [[TMP11]], align 8, !alias.scope [[META12:![0-9]+]], !noalias [[META9]]204; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP6]]205; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]206; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]207; NO-VP: [[MIDDLE_BLOCK]]:208; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]209; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]210; NO-VP: [[SCALAR_PH]]:211; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]212; NO-VP-NEXT: br label %[[LOOP:.*]]213; NO-VP: [[LOOP]]:214; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]215; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV1]]216; NO-VP-NEXT: [[TMP0:%.*]] = load i32, ptr [[GEP1]], align 4217; NO-VP-NEXT: [[CONV:%.*]] = zext i32 [[TMP0]] to i64218; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV1]]219; NO-VP-NEXT: store i64 [[CONV]], ptr [[GEP2]], align 8220; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1221; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]222; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP15:![0-9]+]]223; NO-VP: [[EXIT]]:224; NO-VP-NEXT: ret void225;226entry:227 br label %loop228 229loop:230 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]231 %gep = getelementptr inbounds i32, ptr %b, i64 %iv232 %0 = load i32, ptr %gep, align 4233 %conv = zext i32 %0 to i64234 %gep2 = getelementptr inbounds i64, ptr %a, i64 %iv235 store i64 %conv, ptr %gep2, align 8236 %iv.next = add nuw nsw i64 %iv, 1237 %exitcond.not = icmp eq i64 %iv.next, %N238 br i1 %exitcond.not, label %exit, label %loop239 240exit:241 ret void242}243 244define void @vp_trunc(ptr %a, ptr %b, i64 %N) {245; IF-EVL-LABEL: define void @vp_trunc(246; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {247; IF-EVL-NEXT: [[ENTRY:.*:]]248; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]249; IF-EVL: [[VECTOR_MEMCHECK]]:250; IF-EVL-NEXT: [[TMP5:%.*]] = shl i64 [[N]], 2251; IF-EVL-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]252; IF-EVL-NEXT: [[TMP6:%.*]] = shl i64 [[N]], 3253; IF-EVL-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP6]]254; IF-EVL-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]255; IF-EVL-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]256; IF-EVL-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]257; IF-EVL-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]258; IF-EVL: [[VECTOR_PH]]:259; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]260; IF-EVL: [[VECTOR_BODY]]:261; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]262; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]263; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)264; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[EVL_BASED_IV]]265; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.vp.load.nxv2i64.p0(ptr align 8 [[TMP14]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META16:![0-9]+]]266; IF-EVL-NEXT: [[TMP16:%.*]] = trunc <vscale x 2 x i64> [[VP_OP_LOAD]] to <vscale x 2 x i32>267; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[EVL_BASED_IV]]268; IF-EVL-NEXT: call void @llvm.vp.store.nxv2i32.p0(<vscale x 2 x i32> [[TMP16]], ptr align 4 [[TMP17]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META19:![0-9]+]], !noalias [[META16]]269; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i64270; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP19]], [[EVL_BASED_IV]]271; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]272; IF-EVL-NEXT: [[TMP13:%.*]] = icmp eq i64 [[AVL_NEXT]], 0273; IF-EVL-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]274; IF-EVL: [[MIDDLE_BLOCK]]:275; IF-EVL-NEXT: br label %[[EXIT:.*]]276; IF-EVL: [[SCALAR_PH]]:277; IF-EVL-NEXT: br label %[[LOOP:.*]]278; IF-EVL: [[LOOP]]:279; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]280; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]]281; IF-EVL-NEXT: [[TMP21:%.*]] = load i64, ptr [[GEP]], align 8282; IF-EVL-NEXT: [[CONV:%.*]] = trunc i64 [[TMP21]] to i32283; IF-EVL-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]284; IF-EVL-NEXT: store i32 [[CONV]], ptr [[GEP2]], align 4285; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1286; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]287; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP22:![0-9]+]]288; IF-EVL: [[EXIT]]:289; IF-EVL-NEXT: ret void290;291; NO-VP-LABEL: define void @vp_trunc(292; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {293; NO-VP-NEXT: [[ENTRY:.*]]:294; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()295; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 1296; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 20)297; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]298; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]299; NO-VP: [[VECTOR_MEMCHECK]]:300; NO-VP-NEXT: [[TMP3:%.*]] = shl i64 [[N]], 2301; NO-VP-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]302; NO-VP-NEXT: [[TMP4:%.*]] = shl i64 [[N]], 3303; NO-VP-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP4]]304; NO-VP-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]305; NO-VP-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]306; NO-VP-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]307; NO-VP-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]308; NO-VP: [[VECTOR_PH]]:309; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()310; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 2311; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP6]]312; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]313; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]314; NO-VP: [[VECTOR_BODY]]:315; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]316; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]]317; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x i64>, ptr [[GEP]], align 8, !alias.scope [[META16:![0-9]+]]318; NO-VP-NEXT: [[TMP10:%.*]] = trunc <vscale x 2 x i64> [[WIDE_LOAD]] to <vscale x 2 x i32>319; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]320; NO-VP-NEXT: store <vscale x 2 x i32> [[TMP10]], ptr [[TMP11]], align 4, !alias.scope [[META19:![0-9]+]], !noalias [[META16]]321; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP6]]322; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]323; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]324; NO-VP: [[MIDDLE_BLOCK]]:325; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]326; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]327; NO-VP: [[SCALAR_PH]]:328; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]329; NO-VP-NEXT: br label %[[LOOP:.*]]330; NO-VP: [[LOOP]]:331; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]332; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV1]]333; NO-VP-NEXT: [[TMP0:%.*]] = load i64, ptr [[GEP1]], align 8334; NO-VP-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32335; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV1]]336; NO-VP-NEXT: store i32 [[CONV]], ptr [[GEP2]], align 4337; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1338; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]339; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP22:![0-9]+]]340; NO-VP: [[EXIT]]:341; NO-VP-NEXT: ret void342;343entry:344 br label %loop345 346loop:347 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]348 %gep = getelementptr inbounds i64, ptr %b, i64 %iv349 %0 = load i64, ptr %gep, align 8350 %conv = trunc i64 %0 to i32351 %gep2 = getelementptr inbounds i32, ptr %a, i64 %iv352 store i32 %conv, ptr %gep2, align 4353 %iv.next = add nuw nsw i64 %iv, 1354 %exitcond.not = icmp eq i64 %iv.next, %N355 br i1 %exitcond.not, label %exit, label %loop356 357exit:358 ret void359}360 361define void @vp_fpext(ptr %a, ptr %b, i64 %N) {362; IF-EVL-LABEL: define void @vp_fpext(363; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {364; IF-EVL-NEXT: [[ENTRY:.*:]]365; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]366; IF-EVL: [[VECTOR_MEMCHECK]]:367; IF-EVL-NEXT: [[TMP5:%.*]] = shl i64 [[N]], 3368; IF-EVL-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]369; IF-EVL-NEXT: [[TMP6:%.*]] = shl i64 [[N]], 2370; IF-EVL-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP6]]371; IF-EVL-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]372; IF-EVL-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]373; IF-EVL-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]374; IF-EVL-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]375; IF-EVL: [[VECTOR_PH]]:376; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]377; IF-EVL: [[VECTOR_BODY]]:378; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]379; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]380; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)381; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[EVL_BASED_IV]]382; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 2 x float> @llvm.vp.load.nxv2f32.p0(ptr align 4 [[TMP14]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META23:![0-9]+]]383; IF-EVL-NEXT: [[TMP16:%.*]] = fpext <vscale x 2 x float> [[VP_OP_LOAD]] to <vscale x 2 x double>384; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds double, ptr [[A]], i64 [[EVL_BASED_IV]]385; IF-EVL-NEXT: call void @llvm.vp.store.nxv2f64.p0(<vscale x 2 x double> [[TMP16]], ptr align 8 [[TMP17]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META26:![0-9]+]], !noalias [[META23]]386; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i64387; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP19]], [[EVL_BASED_IV]]388; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]389; IF-EVL-NEXT: [[TMP13:%.*]] = icmp eq i64 [[AVL_NEXT]], 0390; IF-EVL-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]391; IF-EVL: [[MIDDLE_BLOCK]]:392; IF-EVL-NEXT: br label %[[EXIT:.*]]393; IF-EVL: [[SCALAR_PH]]:394; IF-EVL-NEXT: br label %[[LOOP:.*]]395; IF-EVL: [[LOOP]]:396; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]397; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]398; IF-EVL-NEXT: [[TMP21:%.*]] = load float, ptr [[GEP]], align 4399; IF-EVL-NEXT: [[CONV:%.*]] = fpext float [[TMP21]] to double400; IF-EVL-NEXT: [[GEP2:%.*]] = getelementptr inbounds double, ptr [[A]], i64 [[IV]]401; IF-EVL-NEXT: store double [[CONV]], ptr [[GEP2]], align 8402; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1403; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]404; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP29:![0-9]+]]405; IF-EVL: [[EXIT]]:406; IF-EVL-NEXT: ret void407;408; NO-VP-LABEL: define void @vp_fpext(409; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {410; NO-VP-NEXT: [[ENTRY:.*]]:411; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()412; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 1413; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16)414; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]415; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]416; NO-VP: [[VECTOR_MEMCHECK]]:417; NO-VP-NEXT: [[TMP3:%.*]] = shl i64 [[N]], 3418; NO-VP-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]419; NO-VP-NEXT: [[TMP4:%.*]] = shl i64 [[N]], 2420; NO-VP-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP4]]421; NO-VP-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]422; NO-VP-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]423; NO-VP-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]424; NO-VP-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]425; NO-VP: [[VECTOR_PH]]:426; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()427; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 2428; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP6]]429; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]430; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]431; NO-VP: [[VECTOR_BODY]]:432; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]433; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]434; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x float>, ptr [[GEP]], align 4, !alias.scope [[META23:![0-9]+]]435; NO-VP-NEXT: [[TMP10:%.*]] = fpext <vscale x 2 x float> [[WIDE_LOAD]] to <vscale x 2 x double>436; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds double, ptr [[A]], i64 [[IV]]437; NO-VP-NEXT: store <vscale x 2 x double> [[TMP10]], ptr [[TMP11]], align 8, !alias.scope [[META26:![0-9]+]], !noalias [[META23]]438; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP6]]439; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]440; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]441; NO-VP: [[MIDDLE_BLOCK]]:442; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]443; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]444; NO-VP: [[SCALAR_PH]]:445; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]446; NO-VP-NEXT: br label %[[LOOP:.*]]447; NO-VP: [[LOOP]]:448; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]449; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV1]]450; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[GEP1]], align 4451; NO-VP-NEXT: [[CONV:%.*]] = fpext float [[TMP0]] to double452; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds double, ptr [[A]], i64 [[IV1]]453; NO-VP-NEXT: store double [[CONV]], ptr [[GEP2]], align 8454; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1455; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]456; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP29:![0-9]+]]457; NO-VP: [[EXIT]]:458; NO-VP-NEXT: ret void459;460entry:461 br label %loop462 463loop:464 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]465 %gep = getelementptr inbounds float, ptr %b, i64 %iv466 %0 = load float, ptr %gep, align 4467 %conv = fpext float %0 to double468 %gep2 = getelementptr inbounds double, ptr %a, i64 %iv469 store double %conv, ptr %gep2, align 8470 %iv.next = add nuw nsw i64 %iv, 1471 %exitcond.not = icmp eq i64 %iv.next, %N472 br i1 %exitcond.not, label %exit, label %loop473 474exit:475 ret void476}477 478define void @vp_fptrunc(ptr %a, ptr %b, i64 %N) {479; IF-EVL-LABEL: define void @vp_fptrunc(480; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {481; IF-EVL-NEXT: [[ENTRY:.*:]]482; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]483; IF-EVL: [[VECTOR_MEMCHECK]]:484; IF-EVL-NEXT: [[TMP5:%.*]] = shl i64 [[N]], 2485; IF-EVL-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]486; IF-EVL-NEXT: [[TMP6:%.*]] = shl i64 [[N]], 3487; IF-EVL-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP6]]488; IF-EVL-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]489; IF-EVL-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]490; IF-EVL-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]491; IF-EVL-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]492; IF-EVL: [[VECTOR_PH]]:493; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]494; IF-EVL: [[VECTOR_BODY]]:495; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]496; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]497; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)498; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds double, ptr [[B]], i64 [[EVL_BASED_IV]]499; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 2 x double> @llvm.vp.load.nxv2f64.p0(ptr align 8 [[TMP14]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META30:![0-9]+]]500; IF-EVL-NEXT: [[TMP16:%.*]] = fptrunc <vscale x 2 x double> [[VP_OP_LOAD]] to <vscale x 2 x float>501; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[EVL_BASED_IV]]502; IF-EVL-NEXT: call void @llvm.vp.store.nxv2f32.p0(<vscale x 2 x float> [[TMP16]], ptr align 4 [[TMP17]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP12]]), !alias.scope [[META33:![0-9]+]], !noalias [[META30]]503; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i64504; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP19]], [[EVL_BASED_IV]]505; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]506; IF-EVL-NEXT: [[TMP13:%.*]] = icmp eq i64 [[AVL_NEXT]], 0507; IF-EVL-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]]508; IF-EVL: [[MIDDLE_BLOCK]]:509; IF-EVL-NEXT: br label %[[EXIT:.*]]510; IF-EVL: [[SCALAR_PH]]:511; IF-EVL-NEXT: br label %[[LOOP:.*]]512; IF-EVL: [[LOOP]]:513; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]514; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds double, ptr [[B]], i64 [[IV]]515; IF-EVL-NEXT: [[TMP21:%.*]] = load double, ptr [[GEP]], align 8516; IF-EVL-NEXT: [[CONV:%.*]] = fptrunc double [[TMP21]] to float517; IF-EVL-NEXT: [[GEP2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV]]518; IF-EVL-NEXT: store float [[CONV]], ptr [[GEP2]], align 4519; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1520; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]521; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP36:![0-9]+]]522; IF-EVL: [[EXIT]]:523; IF-EVL-NEXT: ret void524;525; NO-VP-LABEL: define void @vp_fptrunc(526; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {527; NO-VP-NEXT: [[ENTRY:.*]]:528; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()529; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 1530; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16)531; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]532; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]533; NO-VP: [[VECTOR_MEMCHECK]]:534; NO-VP-NEXT: [[TMP3:%.*]] = shl i64 [[N]], 2535; NO-VP-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]536; NO-VP-NEXT: [[TMP4:%.*]] = shl i64 [[N]], 3537; NO-VP-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP4]]538; NO-VP-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]539; NO-VP-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]540; NO-VP-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]541; NO-VP-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]542; NO-VP: [[VECTOR_PH]]:543; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()544; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 2545; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP6]]546; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]547; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]548; NO-VP: [[VECTOR_BODY]]:549; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]550; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds double, ptr [[B]], i64 [[IV]]551; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x double>, ptr [[GEP]], align 8, !alias.scope [[META30:![0-9]+]]552; NO-VP-NEXT: [[TMP10:%.*]] = fptrunc <vscale x 2 x double> [[WIDE_LOAD]] to <vscale x 2 x float>553; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV]]554; NO-VP-NEXT: store <vscale x 2 x float> [[TMP10]], ptr [[TMP11]], align 4, !alias.scope [[META33:![0-9]+]], !noalias [[META30]]555; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP6]]556; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]557; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]]558; NO-VP: [[MIDDLE_BLOCK]]:559; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]560; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]561; NO-VP: [[SCALAR_PH]]:562; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]563; NO-VP-NEXT: br label %[[LOOP:.*]]564; NO-VP: [[LOOP]]:565; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]566; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds double, ptr [[B]], i64 [[IV1]]567; NO-VP-NEXT: [[TMP0:%.*]] = load double, ptr [[GEP1]], align 8568; NO-VP-NEXT: [[CONV:%.*]] = fptrunc double [[TMP0]] to float569; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV1]]570; NO-VP-NEXT: store float [[CONV]], ptr [[GEP2]], align 4571; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1572; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]573; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP36:![0-9]+]]574; NO-VP: [[EXIT]]:575; NO-VP-NEXT: ret void576;577entry:578 br label %loop579 580loop:581 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]582 %gep = getelementptr inbounds double, ptr %b, i64 %iv583 %0 = load double, ptr %gep, align 8584 %conv = fptrunc double %0 to float585 %gep2 = getelementptr inbounds float, ptr %a, i64 %iv586 store float %conv, ptr %gep2, align 4587 %iv.next = add nuw nsw i64 %iv, 1588 %exitcond.not = icmp eq i64 %iv.next, %N589 br i1 %exitcond.not, label %exit, label %loop590 591exit:592 ret void593}594 595define void @vp_sitofp(ptr %a, ptr %b, i64 %N) {596; IF-EVL-LABEL: define void @vp_sitofp(597; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {598; IF-EVL-NEXT: [[ENTRY:.*:]]599; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64600; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64601; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]602; IF-EVL: [[VECTOR_MEMCHECK]]:603; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()604; IF-EVL-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 4605; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4606; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[A1]], [[B2]]607; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP8]], [[TMP7]]608; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]609; IF-EVL: [[VECTOR_PH]]:610; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]611; IF-EVL: [[VECTOR_BODY]]:612; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]613; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]614; IF-EVL-NEXT: [[TMP14:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)615; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[EVL_BASED_IV]]616; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP16]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])617; IF-EVL-NEXT: [[TMP18:%.*]] = sitofp <vscale x 4 x i32> [[VP_OP_LOAD]] to <vscale x 4 x float>618; IF-EVL-NEXT: [[TMP19:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[EVL_BASED_IV]]619; IF-EVL-NEXT: call void @llvm.vp.store.nxv4f32.p0(<vscale x 4 x float> [[TMP18]], ptr align 4 [[TMP19]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])620; IF-EVL-NEXT: [[TMP21:%.*]] = zext i32 [[TMP14]] to i64621; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP21]], [[EVL_BASED_IV]]622; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP21]]623; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0624; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP37:![0-9]+]]625; IF-EVL: [[MIDDLE_BLOCK]]:626; IF-EVL-NEXT: br label %[[EXIT:.*]]627; IF-EVL: [[SCALAR_PH]]:628; IF-EVL-NEXT: br label %[[LOOP:.*]]629; IF-EVL: [[LOOP]]:630; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]631; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]632; IF-EVL-NEXT: [[TMP23:%.*]] = load i32, ptr [[GEP]], align 4633; IF-EVL-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP23]] to float634; IF-EVL-NEXT: [[GEP2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV]]635; IF-EVL-NEXT: store float [[CONV]], ptr [[GEP2]], align 4636; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1637; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]638; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP38:![0-9]+]]639; IF-EVL: [[EXIT]]:640; IF-EVL-NEXT: ret void641;642; NO-VP-LABEL: define void @vp_sitofp(643; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {644; NO-VP-NEXT: [[ENTRY:.*]]:645; NO-VP-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64646; NO-VP-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64647; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()648; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 2649; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16)650; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]651; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]652; NO-VP: [[VECTOR_MEMCHECK]]:653; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()654; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4655; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4656; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[A1]], [[B2]]657; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]]658; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]659; NO-VP: [[VECTOR_PH]]:660; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()661; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4662; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP8]]663; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]664; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]665; NO-VP: [[VECTOR_BODY]]:666; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]667; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]668; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[GEP]], align 4669; NO-VP-NEXT: [[TMP12:%.*]] = sitofp <vscale x 4 x i32> [[WIDE_LOAD]] to <vscale x 4 x float>670; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV]]671; NO-VP-NEXT: store <vscale x 4 x float> [[TMP12]], ptr [[TMP13]], align 4672; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP8]]673; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]674; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP37:![0-9]+]]675; NO-VP: [[MIDDLE_BLOCK]]:676; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]677; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]678; NO-VP: [[SCALAR_PH]]:679; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]680; NO-VP-NEXT: br label %[[LOOP:.*]]681; NO-VP: [[LOOP]]:682; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]683; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV1]]684; NO-VP-NEXT: [[TMP0:%.*]] = load i32, ptr [[GEP1]], align 4685; NO-VP-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float686; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV1]]687; NO-VP-NEXT: store float [[CONV]], ptr [[GEP2]], align 4688; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1689; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]690; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP38:![0-9]+]]691; NO-VP: [[EXIT]]:692; NO-VP-NEXT: ret void693;694entry:695 br label %loop696 697loop:698 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]699 %gep = getelementptr inbounds i32, ptr %b, i64 %iv700 %0 = load i32, ptr %gep, align 4701 %conv = sitofp i32 %0 to float702 %gep2 = getelementptr inbounds float, ptr %a, i64 %iv703 store float %conv, ptr %gep2, align 4704 %iv.next = add nuw nsw i64 %iv, 1705 %exitcond.not = icmp eq i64 %iv.next, %N706 br i1 %exitcond.not, label %exit, label %loop707 708exit:709 ret void710}711 712define void @vp_uitofp(ptr %a, ptr %b, i64 %N) {713; IF-EVL-LABEL: define void @vp_uitofp(714; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {715; IF-EVL-NEXT: [[ENTRY:.*:]]716; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64717; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64718; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]719; IF-EVL: [[VECTOR_MEMCHECK]]:720; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()721; IF-EVL-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 4722; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4723; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[A1]], [[B2]]724; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP8]], [[TMP7]]725; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]726; IF-EVL: [[VECTOR_PH]]:727; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]728; IF-EVL: [[VECTOR_BODY]]:729; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]730; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]731; IF-EVL-NEXT: [[TMP14:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)732; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[EVL_BASED_IV]]733; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP16]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])734; IF-EVL-NEXT: [[TMP18:%.*]] = uitofp <vscale x 4 x i32> [[VP_OP_LOAD]] to <vscale x 4 x float>735; IF-EVL-NEXT: [[TMP19:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[EVL_BASED_IV]]736; IF-EVL-NEXT: call void @llvm.vp.store.nxv4f32.p0(<vscale x 4 x float> [[TMP18]], ptr align 4 [[TMP19]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])737; IF-EVL-NEXT: [[TMP21:%.*]] = zext i32 [[TMP14]] to i64738; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP21]], [[EVL_BASED_IV]]739; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP21]]740; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0741; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP39:![0-9]+]]742; IF-EVL: [[MIDDLE_BLOCK]]:743; IF-EVL-NEXT: br label %[[EXIT:.*]]744; IF-EVL: [[SCALAR_PH]]:745; IF-EVL-NEXT: br label %[[LOOP:.*]]746; IF-EVL: [[LOOP]]:747; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]748; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]749; IF-EVL-NEXT: [[TMP23:%.*]] = load i32, ptr [[GEP]], align 4750; IF-EVL-NEXT: [[CONV:%.*]] = uitofp i32 [[TMP23]] to float751; IF-EVL-NEXT: [[GEP2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV]]752; IF-EVL-NEXT: store float [[CONV]], ptr [[GEP2]], align 4753; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1754; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]755; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP40:![0-9]+]]756; IF-EVL: [[EXIT]]:757; IF-EVL-NEXT: ret void758;759; NO-VP-LABEL: define void @vp_uitofp(760; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {761; NO-VP-NEXT: [[ENTRY:.*]]:762; NO-VP-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64763; NO-VP-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64764; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()765; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 2766; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16)767; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]768; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]769; NO-VP: [[VECTOR_MEMCHECK]]:770; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()771; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4772; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4773; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[A1]], [[B2]]774; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]]775; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]776; NO-VP: [[VECTOR_PH]]:777; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()778; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4779; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP8]]780; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]781; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]782; NO-VP: [[VECTOR_BODY]]:783; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]784; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]785; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[GEP]], align 4786; NO-VP-NEXT: [[TMP12:%.*]] = uitofp <vscale x 4 x i32> [[WIDE_LOAD]] to <vscale x 4 x float>787; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV]]788; NO-VP-NEXT: store <vscale x 4 x float> [[TMP12]], ptr [[TMP13]], align 4789; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP8]]790; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]791; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP39:![0-9]+]]792; NO-VP: [[MIDDLE_BLOCK]]:793; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]794; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]795; NO-VP: [[SCALAR_PH]]:796; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]797; NO-VP-NEXT: br label %[[LOOP:.*]]798; NO-VP: [[LOOP]]:799; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]800; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV1]]801; NO-VP-NEXT: [[TMP0:%.*]] = load i32, ptr [[GEP1]], align 4802; NO-VP-NEXT: [[CONV:%.*]] = uitofp i32 [[TMP0]] to float803; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV1]]804; NO-VP-NEXT: store float [[CONV]], ptr [[GEP2]], align 4805; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1806; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]807; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP40:![0-9]+]]808; NO-VP: [[EXIT]]:809; NO-VP-NEXT: ret void810;811entry:812 br label %loop813 814loop:815 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]816 %gep = getelementptr inbounds i32, ptr %b, i64 %iv817 %0 = load i32, ptr %gep, align 4818 %conv = uitofp i32 %0 to float819 %gep2 = getelementptr inbounds float, ptr %a, i64 %iv820 store float %conv, ptr %gep2, align 4821 %iv.next = add nuw nsw i64 %iv, 1822 %exitcond.not = icmp eq i64 %iv.next, %N823 br i1 %exitcond.not, label %exit, label %loop824 825exit:826 ret void827}828 829define void @vp_fptosi(ptr %a, ptr %b, i64 %N) {830; IF-EVL-LABEL: define void @vp_fptosi(831; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {832; IF-EVL-NEXT: [[ENTRY:.*:]]833; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64834; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64835; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]836; IF-EVL: [[VECTOR_MEMCHECK]]:837; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()838; IF-EVL-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 4839; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4840; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[A1]], [[B2]]841; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP8]], [[TMP7]]842; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]843; IF-EVL: [[VECTOR_PH]]:844; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]845; IF-EVL: [[VECTOR_BODY]]:846; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]847; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]848; IF-EVL-NEXT: [[TMP14:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)849; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[EVL_BASED_IV]]850; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP16]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])851; IF-EVL-NEXT: [[TMP18:%.*]] = fptosi <vscale x 4 x float> [[VP_OP_LOAD]] to <vscale x 4 x i32>852; IF-EVL-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[EVL_BASED_IV]]853; IF-EVL-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP18]], ptr align 4 [[TMP19]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])854; IF-EVL-NEXT: [[TMP21:%.*]] = zext i32 [[TMP14]] to i64855; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP21]], [[EVL_BASED_IV]]856; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP21]]857; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0858; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP41:![0-9]+]]859; IF-EVL: [[MIDDLE_BLOCK]]:860; IF-EVL-NEXT: br label %[[EXIT:.*]]861; IF-EVL: [[SCALAR_PH]]:862; IF-EVL-NEXT: br label %[[LOOP:.*]]863; IF-EVL: [[LOOP]]:864; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]865; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]866; IF-EVL-NEXT: [[TMP23:%.*]] = load float, ptr [[GEP]], align 4867; IF-EVL-NEXT: [[CONV:%.*]] = fptosi float [[TMP23]] to i32868; IF-EVL-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]869; IF-EVL-NEXT: store i32 [[CONV]], ptr [[GEP2]], align 4870; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1871; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]872; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP42:![0-9]+]]873; IF-EVL: [[EXIT]]:874; IF-EVL-NEXT: ret void875;876; NO-VP-LABEL: define void @vp_fptosi(877; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {878; NO-VP-NEXT: [[ENTRY:.*]]:879; NO-VP-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64880; NO-VP-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64881; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()882; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 2883; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16)884; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]885; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]886; NO-VP: [[VECTOR_MEMCHECK]]:887; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()888; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4889; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4890; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[A1]], [[B2]]891; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]]892; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]893; NO-VP: [[VECTOR_PH]]:894; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()895; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4896; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP8]]897; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]898; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]899; NO-VP: [[VECTOR_BODY]]:900; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]901; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]902; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[GEP]], align 4903; NO-VP-NEXT: [[TMP12:%.*]] = fptosi <vscale x 4 x float> [[WIDE_LOAD]] to <vscale x 4 x i32>904; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]905; NO-VP-NEXT: store <vscale x 4 x i32> [[TMP12]], ptr [[TMP13]], align 4906; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP8]]907; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]908; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP41:![0-9]+]]909; NO-VP: [[MIDDLE_BLOCK]]:910; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]911; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]912; NO-VP: [[SCALAR_PH]]:913; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]914; NO-VP-NEXT: br label %[[LOOP:.*]]915; NO-VP: [[LOOP]]:916; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]917; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV1]]918; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[GEP1]], align 4919; NO-VP-NEXT: [[CONV:%.*]] = fptosi float [[TMP0]] to i32920; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV1]]921; NO-VP-NEXT: store i32 [[CONV]], ptr [[GEP2]], align 4922; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1923; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]924; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP42:![0-9]+]]925; NO-VP: [[EXIT]]:926; NO-VP-NEXT: ret void927;928entry:929 br label %loop930 931loop:932 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]933 %gep = getelementptr inbounds float, ptr %b, i64 %iv934 %0 = load float, ptr %gep, align 4935 %conv = fptosi float %0 to i32936 %gep2 = getelementptr inbounds i32, ptr %a, i64 %iv937 store i32 %conv, ptr %gep2, align 4938 %iv.next = add nuw nsw i64 %iv, 1939 %exitcond.not = icmp eq i64 %iv.next, %N940 br i1 %exitcond.not, label %exit, label %loop941 942exit:943 ret void944}945 946define void @vp_fptoui(ptr %a, ptr %b, i64 %N) {947; IF-EVL-LABEL: define void @vp_fptoui(948; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {949; IF-EVL-NEXT: [[ENTRY:.*:]]950; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64951; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64952; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]953; IF-EVL: [[VECTOR_MEMCHECK]]:954; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()955; IF-EVL-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 4956; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4957; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[A1]], [[B2]]958; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP8]], [[TMP7]]959; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]960; IF-EVL: [[VECTOR_PH]]:961; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]962; IF-EVL: [[VECTOR_BODY]]:963; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]964; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]965; IF-EVL-NEXT: [[TMP14:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)966; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[EVL_BASED_IV]]967; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP16]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])968; IF-EVL-NEXT: [[TMP18:%.*]] = fptoui <vscale x 4 x float> [[VP_OP_LOAD]] to <vscale x 4 x i32>969; IF-EVL-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[EVL_BASED_IV]]970; IF-EVL-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP18]], ptr align 4 [[TMP19]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP14]])971; IF-EVL-NEXT: [[TMP21:%.*]] = zext i32 [[TMP14]] to i64972; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP21]], [[EVL_BASED_IV]]973; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP21]]974; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0975; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP43:![0-9]+]]976; IF-EVL: [[MIDDLE_BLOCK]]:977; IF-EVL-NEXT: br label %[[EXIT:.*]]978; IF-EVL: [[SCALAR_PH]]:979; IF-EVL-NEXT: br label %[[LOOP:.*]]980; IF-EVL: [[LOOP]]:981; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]982; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]983; IF-EVL-NEXT: [[TMP23:%.*]] = load float, ptr [[GEP]], align 4984; IF-EVL-NEXT: [[CONV:%.*]] = fptoui float [[TMP23]] to i32985; IF-EVL-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]986; IF-EVL-NEXT: store i32 [[CONV]], ptr [[GEP2]], align 4987; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1988; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]989; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP44:![0-9]+]]990; IF-EVL: [[EXIT]]:991; IF-EVL-NEXT: ret void992;993; NO-VP-LABEL: define void @vp_fptoui(994; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {995; NO-VP-NEXT: [[ENTRY:.*]]:996; NO-VP-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64997; NO-VP-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64998; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()999; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 21000; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16)1001; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]1002; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]1003; NO-VP: [[VECTOR_MEMCHECK]]:1004; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()1005; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 41006; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 41007; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[A1]], [[B2]]1008; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]]1009; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]1010; NO-VP: [[VECTOR_PH]]:1011; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()1012; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 41013; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP8]]1014; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]1015; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]1016; NO-VP: [[VECTOR_BODY]]:1017; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1018; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]1019; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[GEP]], align 41020; NO-VP-NEXT: [[TMP12:%.*]] = fptoui <vscale x 4 x float> [[WIDE_LOAD]] to <vscale x 4 x i32>1021; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]1022; NO-VP-NEXT: store <vscale x 4 x i32> [[TMP12]], ptr [[TMP13]], align 41023; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP8]]1024; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1025; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP43:![0-9]+]]1026; NO-VP: [[MIDDLE_BLOCK]]:1027; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]1028; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]1029; NO-VP: [[SCALAR_PH]]:1030; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]1031; NO-VP-NEXT: br label %[[LOOP:.*]]1032; NO-VP: [[LOOP]]:1033; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]1034; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV1]]1035; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[GEP1]], align 41036; NO-VP-NEXT: [[CONV:%.*]] = fptoui float [[TMP0]] to i321037; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV1]]1038; NO-VP-NEXT: store i32 [[CONV]], ptr [[GEP2]], align 41039; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 11040; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]1041; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP44:![0-9]+]]1042; NO-VP: [[EXIT]]:1043; NO-VP-NEXT: ret void1044;1045entry:1046 br label %loop1047 1048loop:1049 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]1050 %gep = getelementptr inbounds float, ptr %b, i64 %iv1051 %0 = load float, ptr %gep, align 41052 %conv = fptoui float %0 to i321053 %gep2 = getelementptr inbounds i32, ptr %a, i64 %iv1054 store i32 %conv, ptr %gep2, align 41055 %iv.next = add nuw nsw i64 %iv, 11056 %exitcond.not = icmp eq i64 %iv.next, %N1057 br i1 %exitcond.not, label %exit, label %loop1058 1059exit:1060 ret void1061}1062 1063define void @vp_inttoptr(ptr %a, ptr %b, i64 %N) {1064; IF-EVL-LABEL: define void @vp_inttoptr(1065; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {1066; IF-EVL-NEXT: [[ENTRY:.*:]]1067; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i641068; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i641069; IF-EVL-NEXT: br label %[[VECTOR_MEMCHECK:.*]]1070; IF-EVL: [[VECTOR_MEMCHECK]]:1071; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()1072; IF-EVL-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 21073; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 81074; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[A1]], [[B2]]1075; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP8]], [[TMP7]]1076; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]1077; IF-EVL: [[VECTOR_PH]]:1078; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]1079; IF-EVL: [[VECTOR_BODY]]:1080; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]1081; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]1082; IF-EVL-NEXT: [[TMP14:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)1083; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[EVL_BASED_IV]]1084; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.vp.load.nxv2i64.p0(ptr align 8 [[TMP16]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP14]])1085; IF-EVL-NEXT: [[TMP18:%.*]] = inttoptr <vscale x 2 x i64> [[VP_OP_LOAD]] to <vscale x 2 x ptr>1086; IF-EVL-NEXT: [[TMP19:%.*]] = getelementptr inbounds ptr, ptr [[A]], i64 [[EVL_BASED_IV]]1087; IF-EVL-NEXT: call void @llvm.vp.store.nxv2p0.p0(<vscale x 2 x ptr> [[TMP18]], ptr align 8 [[TMP19]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP14]])1088; IF-EVL-NEXT: [[TMP21:%.*]] = zext i32 [[TMP14]] to i641089; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP21]], [[EVL_BASED_IV]]1090; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP21]]1091; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 01092; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP45:![0-9]+]]1093; IF-EVL: [[MIDDLE_BLOCK]]:1094; IF-EVL-NEXT: br label %[[EXIT:.*]]1095; IF-EVL: [[SCALAR_PH]]:1096; IF-EVL-NEXT: br label %[[LOOP:.*]]1097; IF-EVL: [[LOOP]]:1098; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]1099; IF-EVL-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]]1100; IF-EVL-NEXT: [[TMP23:%.*]] = load i64, ptr [[GEP]], align 81101; IF-EVL-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP23]] to ptr1102; IF-EVL-NEXT: [[GEP2:%.*]] = getelementptr inbounds ptr, ptr [[A]], i64 [[IV]]1103; IF-EVL-NEXT: store ptr [[TMP24]], ptr [[GEP2]], align 81104; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 11105; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]1106; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP46:![0-9]+]]1107; IF-EVL: [[EXIT]]:1108; IF-EVL-NEXT: ret void1109;1110; NO-VP-LABEL: define void @vp_inttoptr(1111; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {1112; NO-VP-NEXT: [[ENTRY:.*]]:1113; NO-VP-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i641114; NO-VP-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i641115; NO-VP-NEXT: [[TMP10:%.*]] = call i64 @llvm.vscale.i64()1116; NO-VP-NEXT: [[TMP9:%.*]] = shl nuw i64 [[TMP10]], 11117; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP9]], i64 16)1118; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP2]]1119; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]1120; NO-VP: [[VECTOR_MEMCHECK]]:1121; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()1122; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 21123; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 81124; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[A1]], [[B2]]1125; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]]1126; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]1127; NO-VP: [[VECTOR_PH]]:1128; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()1129; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 21130; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP8]]1131; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]1132; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]1133; NO-VP: [[VECTOR_BODY]]:1134; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1135; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]]1136; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x i64>, ptr [[GEP]], align 81137; NO-VP-NEXT: [[TMP12:%.*]] = inttoptr <vscale x 2 x i64> [[WIDE_LOAD]] to <vscale x 2 x ptr>1138; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds ptr, ptr [[A]], i64 [[IV]]1139; NO-VP-NEXT: store <vscale x 2 x ptr> [[TMP12]], ptr [[TMP13]], align 81140; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], [[TMP8]]1141; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1142; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP45:![0-9]+]]1143; NO-VP: [[MIDDLE_BLOCK]]:1144; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]1145; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]1146; NO-VP: [[SCALAR_PH]]:1147; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]1148; NO-VP-NEXT: br label %[[LOOP:.*]]1149; NO-VP: [[LOOP]]:1150; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]1151; NO-VP-NEXT: [[GEP1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV1]]1152; NO-VP-NEXT: [[TMP0:%.*]] = load i64, ptr [[GEP1]], align 81153; NO-VP-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr1154; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds ptr, ptr [[A]], i64 [[IV1]]1155; NO-VP-NEXT: store ptr [[TMP1]], ptr [[GEP2]], align 81156; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 11157; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]1158; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP46:![0-9]+]]1159; NO-VP: [[EXIT]]:1160; NO-VP-NEXT: ret void1161;1162entry:1163 br label %loop1164 1165loop:1166 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]1167 %gep = getelementptr inbounds i64, ptr %b, i64 %iv1168 %0 = load i64, ptr %gep, align 81169 %1 = inttoptr i64 %0 to ptr1170 %gep2 = getelementptr inbounds ptr, ptr %a, i64 %iv1171 store ptr %1, ptr %gep2, align 81172 %iv.next = add nuw nsw i64 %iv, 11173 %exitcond.not = icmp eq i64 %iv.next, %N1174 br i1 %exitcond.not, label %exit, label %loop1175 1176exit:1177 ret void1178}1179 1180define void @vp_ptrtoint(ptr %a, ptr %b, i64 %N) {1181; IF-EVL-LABEL: define void @vp_ptrtoint(1182; IF-EVL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {1183; IF-EVL-NEXT: [[ENTRY:.*:]]1184; IF-EVL-NEXT: br label %[[VECTOR_PH:.*]]1185; IF-EVL: [[VECTOR_PH]]:1186; IF-EVL-NEXT: [[TMP9:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()1187; IF-EVL-NEXT: [[TMP1:%.*]] = mul <vscale x 2 x i64> [[TMP9]], splat (i64 1)1188; IF-EVL-NEXT: [[INDUCTION:%.*]] = add <vscale x 2 x i64> zeroinitializer, [[TMP1]]1189; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]1190; IF-EVL: [[VECTOR_BODY]]:1191; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]1192; IF-EVL-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]1193; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]1194; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)1195; IF-EVL-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i641196; IF-EVL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP12]], i64 01197; IF-EVL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1198; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[B]], <vscale x 2 x i64> [[VEC_IND]]1199; IF-EVL-NEXT: [[TMP15:%.*]] = ptrtoint <vscale x 2 x ptr> [[TMP14]] to <vscale x 2 x i64>1200; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[EVL_BASED_IV]]1201; IF-EVL-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> [[TMP15]], ptr align 8 [[TMP16]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP11]])1202; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP12]], [[EVL_BASED_IV]]1203; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP12]]1204; IF-EVL-NEXT: [[VEC_IND_NEXT]] = add <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]1205; IF-EVL-NEXT: [[TMP17:%.*]] = icmp eq i64 [[AVL_NEXT]], 01206; IF-EVL-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP47:![0-9]+]]1207; IF-EVL: [[MIDDLE_BLOCK]]:1208; IF-EVL-NEXT: br label %[[EXIT:.*]]1209; IF-EVL: [[EXIT]]:1210; IF-EVL-NEXT: ret void1211;1212; NO-VP-LABEL: define void @vp_ptrtoint(1213; NO-VP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {1214; NO-VP-NEXT: [[ENTRY:.*]]:1215; NO-VP-NEXT: [[TMP13:%.*]] = call i64 @llvm.vscale.i64()1216; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP13]], 11217; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP1]]1218; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]1219; NO-VP: [[VECTOR_PH]]:1220; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()1221; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 21222; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]]1223; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]1224; NO-VP-NEXT: [[TMP6:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()1225; NO-VP-NEXT: [[TMP5:%.*]] = mul nuw nsw <vscale x 2 x i64> [[TMP6]], splat (i64 1)1226; NO-VP-NEXT: [[INDUCTION:%.*]] = add nuw nsw <vscale x 2 x i64> zeroinitializer, [[TMP5]]1227; NO-VP-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP3]], i64 01228; NO-VP-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1229; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]1230; NO-VP: [[VECTOR_BODY]]:1231; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1232; NO-VP-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]1233; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[B]], <vscale x 2 x i64> [[VEC_IND]]1234; NO-VP-NEXT: [[TMP10:%.*]] = ptrtoint <vscale x 2 x ptr> [[TMP9]] to <vscale x 2 x i64>1235; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[INDEX]]1236; NO-VP-NEXT: store <vscale x 2 x i64> [[TMP10]], ptr [[TMP11]], align 81237; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]1238; NO-VP-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]1239; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1240; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP47:![0-9]+]]1241; NO-VP: [[MIDDLE_BLOCK]]:1242; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]1243; NO-VP-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]1244; NO-VP: [[SCALAR_PH]]:1245; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]1246; NO-VP-NEXT: br label %[[LOOP:.*]]1247; NO-VP: [[LOOP]]:1248; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]1249; NO-VP-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]1250; NO-VP-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[GEP]] to i641251; NO-VP-NEXT: [[GEP2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]]1252; NO-VP-NEXT: store i64 [[TMP0]], ptr [[GEP2]], align 81253; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 11254; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]1255; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP48:![0-9]+]]1256; NO-VP: [[EXIT]]:1257; NO-VP-NEXT: ret void1258;1259entry:1260 br label %loop1261 1262loop:1263 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]1264 %gep = getelementptr inbounds i32, ptr %b, i64 %iv1265 %0 = ptrtoint ptr %gep to i641266 %gep2 = getelementptr inbounds i64, ptr %a, i64 %iv1267 store i64 %0, ptr %gep2, align 81268 %iv.next = add nuw nsw i64 %iv, 11269 %exitcond.not = icmp eq i64 %iv.next, %N1270 br i1 %exitcond.not, label %exit, label %loop1271 1272exit:1273 ret void1274}1275;.1276; IF-EVL: [[META0]] = !{[[META1:![0-9]+]]}1277; IF-EVL: [[META1]] = distinct !{[[META1]], [[META2:![0-9]+]]}1278; IF-EVL: [[META2]] = distinct !{[[META2]], !"LVerDomain"}1279; IF-EVL: [[META3]] = !{[[META4:![0-9]+]]}1280; IF-EVL: [[META4]] = distinct !{[[META4]], [[META2]]}1281; IF-EVL: [[LOOP5]] = distinct !{[[LOOP5]], [[META6:![0-9]+]], [[META7:![0-9]+]]}1282; IF-EVL: [[META6]] = !{!"llvm.loop.isvectorized", i32 1}1283; IF-EVL: [[META7]] = !{!"llvm.loop.unroll.runtime.disable"}1284; IF-EVL: [[LOOP8]] = distinct !{[[LOOP8]], [[META6]]}1285; IF-EVL: [[META9]] = !{[[META10:![0-9]+]]}1286; IF-EVL: [[META10]] = distinct !{[[META10]], [[META11:![0-9]+]]}1287; IF-EVL: [[META11]] = distinct !{[[META11]], !"LVerDomain"}1288; IF-EVL: [[META12]] = !{[[META13:![0-9]+]]}1289; IF-EVL: [[META13]] = distinct !{[[META13]], [[META11]]}1290; IF-EVL: [[LOOP14]] = distinct !{[[LOOP14]], [[META6]], [[META7]]}1291; IF-EVL: [[LOOP15]] = distinct !{[[LOOP15]], [[META6]]}1292; IF-EVL: [[META16]] = !{[[META17:![0-9]+]]}1293; IF-EVL: [[META17]] = distinct !{[[META17]], [[META18:![0-9]+]]}1294; IF-EVL: [[META18]] = distinct !{[[META18]], !"LVerDomain"}1295; IF-EVL: [[META19]] = !{[[META20:![0-9]+]]}1296; IF-EVL: [[META20]] = distinct !{[[META20]], [[META18]]}1297; IF-EVL: [[LOOP21]] = distinct !{[[LOOP21]], [[META6]], [[META7]]}1298; IF-EVL: [[LOOP22]] = distinct !{[[LOOP22]], [[META6]]}1299; IF-EVL: [[META23]] = !{[[META24:![0-9]+]]}1300; IF-EVL: [[META24]] = distinct !{[[META24]], [[META25:![0-9]+]]}1301; IF-EVL: [[META25]] = distinct !{[[META25]], !"LVerDomain"}1302; IF-EVL: [[META26]] = !{[[META27:![0-9]+]]}1303; IF-EVL: [[META27]] = distinct !{[[META27]], [[META25]]}1304; IF-EVL: [[LOOP28]] = distinct !{[[LOOP28]], [[META6]], [[META7]]}1305; IF-EVL: [[LOOP29]] = distinct !{[[LOOP29]], [[META6]]}1306; IF-EVL: [[META30]] = !{[[META31:![0-9]+]]}1307; IF-EVL: [[META31]] = distinct !{[[META31]], [[META32:![0-9]+]]}1308; IF-EVL: [[META32]] = distinct !{[[META32]], !"LVerDomain"}1309; IF-EVL: [[META33]] = !{[[META34:![0-9]+]]}1310; IF-EVL: [[META34]] = distinct !{[[META34]], [[META32]]}1311; IF-EVL: [[LOOP35]] = distinct !{[[LOOP35]], [[META6]], [[META7]]}1312; IF-EVL: [[LOOP36]] = distinct !{[[LOOP36]], [[META6]]}1313; IF-EVL: [[LOOP37]] = distinct !{[[LOOP37]], [[META6]], [[META7]]}1314; IF-EVL: [[LOOP38]] = distinct !{[[LOOP38]], [[META6]]}1315; IF-EVL: [[LOOP39]] = distinct !{[[LOOP39]], [[META6]], [[META7]]}1316; IF-EVL: [[LOOP40]] = distinct !{[[LOOP40]], [[META6]]}1317; IF-EVL: [[LOOP41]] = distinct !{[[LOOP41]], [[META6]], [[META7]]}1318; IF-EVL: [[LOOP42]] = distinct !{[[LOOP42]], [[META6]]}1319; IF-EVL: [[LOOP43]] = distinct !{[[LOOP43]], [[META6]], [[META7]]}1320; IF-EVL: [[LOOP44]] = distinct !{[[LOOP44]], [[META6]]}1321; IF-EVL: [[LOOP45]] = distinct !{[[LOOP45]], [[META6]], [[META7]]}1322; IF-EVL: [[LOOP46]] = distinct !{[[LOOP46]], [[META6]]}1323; IF-EVL: [[LOOP47]] = distinct !{[[LOOP47]], [[META6]], [[META7]]}1324;.1325; NO-VP: [[META0]] = !{[[META1:![0-9]+]]}1326; NO-VP: [[META1]] = distinct !{[[META1]], [[META2:![0-9]+]]}1327; NO-VP: [[META2]] = distinct !{[[META2]], !"LVerDomain"}1328; NO-VP: [[META3]] = !{[[META4:![0-9]+]]}1329; NO-VP: [[META4]] = distinct !{[[META4]], [[META2]]}1330; NO-VP: [[LOOP5]] = distinct !{[[LOOP5]], [[META6:![0-9]+]], [[META7:![0-9]+]]}1331; NO-VP: [[META6]] = !{!"llvm.loop.isvectorized", i32 1}1332; NO-VP: [[META7]] = !{!"llvm.loop.unroll.runtime.disable"}1333; NO-VP: [[LOOP8]] = distinct !{[[LOOP8]], [[META6]]}1334; NO-VP: [[META9]] = !{[[META10:![0-9]+]]}1335; NO-VP: [[META10]] = distinct !{[[META10]], [[META11:![0-9]+]]}1336; NO-VP: [[META11]] = distinct !{[[META11]], !"LVerDomain"}1337; NO-VP: [[META12]] = !{[[META13:![0-9]+]]}1338; NO-VP: [[META13]] = distinct !{[[META13]], [[META11]]}1339; NO-VP: [[LOOP14]] = distinct !{[[LOOP14]], [[META6]], [[META7]]}1340; NO-VP: [[LOOP15]] = distinct !{[[LOOP15]], [[META6]]}1341; NO-VP: [[META16]] = !{[[META17:![0-9]+]]}1342; NO-VP: [[META17]] = distinct !{[[META17]], [[META18:![0-9]+]]}1343; NO-VP: [[META18]] = distinct !{[[META18]], !"LVerDomain"}1344; NO-VP: [[META19]] = !{[[META20:![0-9]+]]}1345; NO-VP: [[META20]] = distinct !{[[META20]], [[META18]]}1346; NO-VP: [[LOOP21]] = distinct !{[[LOOP21]], [[META6]], [[META7]]}1347; NO-VP: [[LOOP22]] = distinct !{[[LOOP22]], [[META6]]}1348; NO-VP: [[META23]] = !{[[META24:![0-9]+]]}1349; NO-VP: [[META24]] = distinct !{[[META24]], [[META25:![0-9]+]]}1350; NO-VP: [[META25]] = distinct !{[[META25]], !"LVerDomain"}1351; NO-VP: [[META26]] = !{[[META27:![0-9]+]]}1352; NO-VP: [[META27]] = distinct !{[[META27]], [[META25]]}1353; NO-VP: [[LOOP28]] = distinct !{[[LOOP28]], [[META6]], [[META7]]}1354; NO-VP: [[LOOP29]] = distinct !{[[LOOP29]], [[META6]]}1355; NO-VP: [[META30]] = !{[[META31:![0-9]+]]}1356; NO-VP: [[META31]] = distinct !{[[META31]], [[META32:![0-9]+]]}1357; NO-VP: [[META32]] = distinct !{[[META32]], !"LVerDomain"}1358; NO-VP: [[META33]] = !{[[META34:![0-9]+]]}1359; NO-VP: [[META34]] = distinct !{[[META34]], [[META32]]}1360; NO-VP: [[LOOP35]] = distinct !{[[LOOP35]], [[META6]], [[META7]]}1361; NO-VP: [[LOOP36]] = distinct !{[[LOOP36]], [[META6]]}1362; NO-VP: [[LOOP37]] = distinct !{[[LOOP37]], [[META6]], [[META7]]}1363; NO-VP: [[LOOP38]] = distinct !{[[LOOP38]], [[META6]]}1364; NO-VP: [[LOOP39]] = distinct !{[[LOOP39]], [[META6]], [[META7]]}1365; NO-VP: [[LOOP40]] = distinct !{[[LOOP40]], [[META6]]}1366; NO-VP: [[LOOP41]] = distinct !{[[LOOP41]], [[META6]], [[META7]]}1367; NO-VP: [[LOOP42]] = distinct !{[[LOOP42]], [[META6]]}1368; NO-VP: [[LOOP43]] = distinct !{[[LOOP43]], [[META6]], [[META7]]}1369; NO-VP: [[LOOP44]] = distinct !{[[LOOP44]], [[META6]]}1370; NO-VP: [[LOOP45]] = distinct !{[[LOOP45]], [[META6]], [[META7]]}1371; NO-VP: [[LOOP46]] = distinct !{[[LOOP46]], [[META6]]}1372; NO-VP: [[LOOP47]] = distinct !{[[LOOP47]], [[META6]], [[META7]]}1373; NO-VP: [[LOOP48]] = distinct !{[[LOOP48]], [[META7]], [[META6]]}1374;.1375