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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -passes=loop-vectorize \3; RUN: -prefer-inloop-reductions \4; RUN: -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue \5; RUN: -mtriple=riscv64 -mattr=+v,+f -S < %s| FileCheck %s --check-prefix=IF-EVL6 7; RUN: opt -passes=loop-vectorize \8; RUN: -prefer-inloop-reductions \9; RUN: -prefer-predicate-over-epilogue=scalar-epilogue \10; RUN: -mtriple=riscv64 -mattr=+v,+f -S < %s| FileCheck %s --check-prefix=NO-VP11 12define void @first_order_recurrence(ptr noalias %A, ptr noalias %B, i64 %TC) {13; IF-EVL-LABEL: define void @first_order_recurrence(14; IF-EVL-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[TC:%.*]]) #[[ATTR0:[0-9]+]] {15; IF-EVL-NEXT: [[ENTRY:.*:]]16; IF-EVL-NEXT: br label %[[VECTOR_PH:.*]]17; IF-EVL: [[VECTOR_PH]]:18; IF-EVL-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()19; IF-EVL-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 420; IF-EVL-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP8]] to i3221; IF-EVL-NEXT: [[TMP9:%.*]] = call i32 @llvm.vscale.i32()22; IF-EVL-NEXT: [[TMP10:%.*]] = mul nuw i32 [[TMP9]], 423; IF-EVL-NEXT: [[TMP11:%.*]] = sub i32 [[TMP10]], 124; IF-EVL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 33, i32 [[TMP11]]25; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]26; IF-EVL: [[VECTOR_BODY]]:27; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]28; IF-EVL-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[VP_OP_LOAD:%.*]], %[[VECTOR_BODY]] ]29; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[TC]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]30; IF-EVL-NEXT: [[PREV_EVL:%.*]] = phi i32 [ [[TMP25]], %[[VECTOR_PH]] ], [ [[TMP12:%.*]], %[[VECTOR_BODY]] ]31; IF-EVL-NEXT: [[TMP12]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)32; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[EVL_BASED_IV]]33; IF-EVL-NEXT: [[VP_OP_LOAD]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]])34; IF-EVL-NEXT: [[TMP16:%.*]] = call <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR]], <vscale x 4 x i32> [[VP_OP_LOAD]], i32 -1, <vscale x 4 x i1> splat (i1 true), i32 [[PREV_EVL]], i32 [[TMP12]])35; IF-EVL-NEXT: [[VP_OP:%.*]] = add nsw <vscale x 4 x i32> [[TMP16]], [[VP_OP_LOAD]]36; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[EVL_BASED_IV]]37; IF-EVL-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[VP_OP]], ptr align 4 [[TMP17]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]])38; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i6439; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP19]], [[EVL_BASED_IV]]40; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]41; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 042; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]43; IF-EVL: [[MIDDLE_BLOCK]]:44; IF-EVL-NEXT: br label %[[FOR_END:.*]]45; IF-EVL: [[FOR_END]]:46; IF-EVL-NEXT: ret void47;48; NO-VP-LABEL: define void @first_order_recurrence(49; NO-VP-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[TC:%.*]]) #[[ATTR0:[0-9]+]] {50; NO-VP-NEXT: [[ENTRY:.*]]:51; NO-VP-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()52; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 253; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TC]], [[TMP1]]54; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]55; NO-VP: [[VECTOR_PH]]:56; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()57; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 458; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TC]], [[TMP3]]59; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[TC]], [[N_MOD_VF]]60; NO-VP-NEXT: [[TMP6:%.*]] = call i32 @llvm.vscale.i32()61; NO-VP-NEXT: [[TMP7:%.*]] = mul nuw i32 [[TMP6]], 462; NO-VP-NEXT: [[TMP8:%.*]] = sub i32 [[TMP7]], 163; NO-VP-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 33, i32 [[TMP8]]64; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]65; NO-VP: [[VECTOR_BODY]]:66; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]67; NO-VP-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[WIDE_LOAD:%.*]], %[[VECTOR_BODY]] ]68; NO-VP-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[INDEX]]69; NO-VP-NEXT: [[WIDE_LOAD]] = load <vscale x 4 x i32>, ptr [[TMP10]], align 470; NO-VP-NEXT: [[TMP12:%.*]] = call <vscale x 4 x i32> @llvm.vector.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR]], <vscale x 4 x i32> [[WIDE_LOAD]], i32 -1)71; NO-VP-NEXT: [[TMP13:%.*]] = add nsw <vscale x 4 x i32> [[TMP12]], [[WIDE_LOAD]]72; NO-VP-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[INDEX]]73; NO-VP-NEXT: store <vscale x 4 x i32> [[TMP13]], ptr [[TMP14]], align 474; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]75; NO-VP-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]76; NO-VP-NEXT: br i1 [[TMP16]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]77; NO-VP: [[MIDDLE_BLOCK]]:78; NO-VP-NEXT: [[TMP17:%.*]] = call i32 @llvm.vscale.i32()79; NO-VP-NEXT: [[TMP18:%.*]] = mul nuw i32 [[TMP17]], 480; NO-VP-NEXT: [[TMP19:%.*]] = sub i32 [[TMP18]], 181; NO-VP-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <vscale x 4 x i32> [[WIDE_LOAD]], i32 [[TMP19]]82; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TC]], [[N_VEC]]83; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]84; NO-VP: [[SCALAR_PH]]:85; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]86; NO-VP-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], %[[MIDDLE_BLOCK]] ], [ 33, %[[ENTRY]] ]87; NO-VP-NEXT: br label %[[FOR_BODY:.*]]88; NO-VP: [[FOR_BODY]]:89; NO-VP-NEXT: [[INDVARS:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_NEXT:%.*]], %[[FOR_BODY]] ]90; NO-VP-NEXT: [[FOR1:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT]], %[[SCALAR_PH]] ], [ [[TMP20:%.*]], %[[FOR_BODY]] ]91; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[INDVARS]]92; NO-VP-NEXT: [[TMP20]] = load i32, ptr [[ARRAYIDX]], align 493; NO-VP-NEXT: [[ADD:%.*]] = add nsw i32 [[FOR1]], [[TMP20]]94; NO-VP-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[INDVARS]]95; NO-VP-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX2]], align 496; NO-VP-NEXT: [[INDVARS_NEXT]] = add nuw nsw i64 [[INDVARS]], 197; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_NEXT]], [[TC]]98; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]99; NO-VP: [[FOR_END]]:100; NO-VP-NEXT: ret void101;102entry:103 br label %for.body104 105for.body:106 %indvars = phi i64 [ 0, %entry ], [ %indvars.next, %for.body ]107 %for1 = phi i32 [ 33, %entry ], [ %0, %for.body ]108 %arrayidx = getelementptr inbounds nuw i32, ptr %A, i64 %indvars109 %0 = load i32, ptr %arrayidx, align 4110 %add = add nsw i32 %for1, %0111 %arrayidx2 = getelementptr inbounds nuw i32, ptr %B, i64 %indvars112 store i32 %add, ptr %arrayidx2, align 4113 %indvars.next = add nuw nsw i64 %indvars, 1114 %exitcond.not = icmp eq i64 %indvars.next, %TC115 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0116 117for.end:118 ret void119}120 121define void @second_order_recurrence(ptr noalias %A, ptr noalias %B, i64 %TC) {122; IF-EVL-LABEL: define void @second_order_recurrence(123; IF-EVL-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[TC:%.*]]) #[[ATTR0]] {124; IF-EVL-NEXT: [[ENTRY:.*:]]125; IF-EVL-NEXT: br label %[[VECTOR_PH:.*]]126; IF-EVL: [[VECTOR_PH]]:127; IF-EVL-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()128; IF-EVL-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4129; IF-EVL-NEXT: [[TMP32:%.*]] = trunc i64 [[TMP8]] to i32130; IF-EVL-NEXT: [[TMP9:%.*]] = call i32 @llvm.vscale.i32()131; IF-EVL-NEXT: [[TMP10:%.*]] = mul nuw i32 [[TMP9]], 4132; IF-EVL-NEXT: [[TMP11:%.*]] = sub i32 [[TMP10]], 1133; IF-EVL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 33, i32 [[TMP11]]134; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.vscale.i32()135; IF-EVL-NEXT: [[TMP13:%.*]] = mul nuw i32 [[TMP12]], 4136; IF-EVL-NEXT: [[TMP14:%.*]] = sub i32 [[TMP13]], 1137; IF-EVL-NEXT: [[VECTOR_RECUR_INIT1:%.*]] = insertelement <vscale x 4 x i32> poison, i32 22, i32 [[TMP14]]138; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]139; IF-EVL: [[VECTOR_BODY]]:140; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]141; IF-EVL-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[VP_OP_LOAD:%.*]], %[[VECTOR_BODY]] ]142; IF-EVL-NEXT: [[VECTOR_RECUR2:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT1]], %[[VECTOR_PH]] ], [ [[TMP19:%.*]], %[[VECTOR_BODY]] ]143; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[TC]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]144; IF-EVL-NEXT: [[PREV_EVL:%.*]] = phi i32 [ [[TMP32]], %[[VECTOR_PH]] ], [ [[TMP15:%.*]], %[[VECTOR_BODY]] ]145; IF-EVL-NEXT: [[TMP15]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)146; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[EVL_BASED_IV]]147; IF-EVL-NEXT: [[VP_OP_LOAD]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP17]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP15]])148; IF-EVL-NEXT: [[TMP19]] = call <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR]], <vscale x 4 x i32> [[VP_OP_LOAD]], i32 -1, <vscale x 4 x i1> splat (i1 true), i32 [[PREV_EVL]], i32 [[TMP15]])149; IF-EVL-NEXT: [[TMP20:%.*]] = call <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR2]], <vscale x 4 x i32> [[TMP19]], i32 -1, <vscale x 4 x i1> splat (i1 true), i32 [[PREV_EVL]], i32 [[TMP15]])150; IF-EVL-NEXT: [[VP_OP:%.*]] = add nsw <vscale x 4 x i32> [[TMP19]], [[TMP20]]151; IF-EVL-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[EVL_BASED_IV]]152; IF-EVL-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[VP_OP]], ptr align 4 [[TMP21]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP15]])153; IF-EVL-NEXT: [[TMP23:%.*]] = zext i32 [[TMP15]] to i64154; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP23]], [[EVL_BASED_IV]]155; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP23]]156; IF-EVL-NEXT: [[TMP22:%.*]] = icmp eq i64 [[AVL_NEXT]], 0157; IF-EVL-NEXT: br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]158; IF-EVL: [[MIDDLE_BLOCK]]:159; IF-EVL-NEXT: br label %[[FOR_END:.*]]160; IF-EVL: [[FOR_END]]:161; IF-EVL-NEXT: ret void162;163; NO-VP-LABEL: define void @second_order_recurrence(164; NO-VP-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[TC:%.*]]) #[[ATTR0]] {165; NO-VP-NEXT: [[ENTRY:.*]]:166; NO-VP-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()167; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 2168; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TC]], [[TMP1]]169; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]170; NO-VP: [[VECTOR_PH]]:171; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()172; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 4173; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TC]], [[TMP3]]174; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[TC]], [[N_MOD_VF]]175; NO-VP-NEXT: [[TMP6:%.*]] = call i32 @llvm.vscale.i32()176; NO-VP-NEXT: [[TMP7:%.*]] = mul nuw i32 [[TMP6]], 4177; NO-VP-NEXT: [[TMP8:%.*]] = sub i32 [[TMP7]], 1178; NO-VP-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 33, i32 [[TMP8]]179; NO-VP-NEXT: [[TMP9:%.*]] = call i32 @llvm.vscale.i32()180; NO-VP-NEXT: [[TMP10:%.*]] = mul nuw i32 [[TMP9]], 4181; NO-VP-NEXT: [[TMP11:%.*]] = sub i32 [[TMP10]], 1182; NO-VP-NEXT: [[VECTOR_RECUR_INIT1:%.*]] = insertelement <vscale x 4 x i32> poison, i32 22, i32 [[TMP11]]183; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]184; NO-VP: [[VECTOR_BODY]]:185; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]186; NO-VP-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[WIDE_LOAD:%.*]], %[[VECTOR_BODY]] ]187; NO-VP-NEXT: [[VECTOR_RECUR2:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT1]], %[[VECTOR_PH]] ], [ [[TMP15:%.*]], %[[VECTOR_BODY]] ]188; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[INDEX]]189; NO-VP-NEXT: [[WIDE_LOAD]] = load <vscale x 4 x i32>, ptr [[TMP13]], align 4190; NO-VP-NEXT: [[TMP15]] = call <vscale x 4 x i32> @llvm.vector.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR]], <vscale x 4 x i32> [[WIDE_LOAD]], i32 -1)191; NO-VP-NEXT: [[TMP16:%.*]] = call <vscale x 4 x i32> @llvm.vector.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR2]], <vscale x 4 x i32> [[TMP15]], i32 -1)192; NO-VP-NEXT: [[TMP17:%.*]] = add nsw <vscale x 4 x i32> [[TMP15]], [[TMP16]]193; NO-VP-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[INDEX]]194; NO-VP-NEXT: store <vscale x 4 x i32> [[TMP17]], ptr [[TMP18]], align 4195; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]196; NO-VP-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]197; NO-VP-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]198; NO-VP: [[MIDDLE_BLOCK]]:199; NO-VP-NEXT: [[TMP21:%.*]] = call i32 @llvm.vscale.i32()200; NO-VP-NEXT: [[TMP22:%.*]] = mul nuw i32 [[TMP21]], 4201; NO-VP-NEXT: [[TMP23:%.*]] = sub i32 [[TMP22]], 1202; NO-VP-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <vscale x 4 x i32> [[WIDE_LOAD]], i32 [[TMP23]]203; NO-VP-NEXT: [[TMP24:%.*]] = call i32 @llvm.vscale.i32()204; NO-VP-NEXT: [[TMP25:%.*]] = mul nuw i32 [[TMP24]], 4205; NO-VP-NEXT: [[TMP26:%.*]] = sub i32 [[TMP25]], 1206; NO-VP-NEXT: [[VECTOR_RECUR_EXTRACT3:%.*]] = extractelement <vscale x 4 x i32> [[TMP15]], i32 [[TMP26]]207; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TC]], [[N_VEC]]208; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]209; NO-VP: [[SCALAR_PH]]:210; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]211; NO-VP-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], %[[MIDDLE_BLOCK]] ], [ 33, %[[ENTRY]] ]212; NO-VP-NEXT: [[SCALAR_RECUR_INIT4:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT3]], %[[MIDDLE_BLOCK]] ], [ 22, %[[ENTRY]] ]213; NO-VP-NEXT: br label %[[FOR_BODY:.*]]214; NO-VP: [[FOR_BODY]]:215; NO-VP-NEXT: [[INDVARS:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_NEXT:%.*]], %[[FOR_BODY]] ]216; NO-VP-NEXT: [[FOR1:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT]], %[[SCALAR_PH]] ], [ [[TMP27:%.*]], %[[FOR_BODY]] ]217; NO-VP-NEXT: [[FOR2:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT4]], %[[SCALAR_PH]] ], [ [[FOR1]], %[[FOR_BODY]] ]218; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[INDVARS]]219; NO-VP-NEXT: [[TMP27]] = load i32, ptr [[ARRAYIDX]], align 4220; NO-VP-NEXT: [[ADD:%.*]] = add nsw i32 [[FOR1]], [[FOR2]]221; NO-VP-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[INDVARS]]222; NO-VP-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX2]], align 4223; NO-VP-NEXT: [[INDVARS_NEXT]] = add nuw nsw i64 [[INDVARS]], 1224; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_NEXT]], [[TC]]225; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]226; NO-VP: [[FOR_END]]:227; NO-VP-NEXT: ret void228;229entry:230 br label %for.body231 232for.body:233 %indvars = phi i64 [ 0, %entry ], [ %indvars.next, %for.body ]234 %for1 = phi i32 [ 33, %entry ], [ %0, %for.body ]235 %for2 = phi i32 [ 22, %entry ], [ %for1, %for.body ]236 %arrayidx = getelementptr inbounds nuw i32, ptr %A, i64 %indvars237 %0 = load i32, ptr %arrayidx, align 4238 %add = add nsw i32 %for1, %for2239 %arrayidx2 = getelementptr inbounds nuw i32, ptr %B, i64 %indvars240 store i32 %add, ptr %arrayidx2, align 4241 %indvars.next = add nuw nsw i64 %indvars, 1242 %exitcond.not = icmp eq i64 %indvars.next, %TC243 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0244 245for.end:246 ret void247}248 249define void @third_order_recurrence(ptr noalias %A, ptr noalias %B, i64 %TC) {250; IF-EVL-LABEL: define void @third_order_recurrence(251; IF-EVL-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[TC:%.*]]) #[[ATTR0]] {252; IF-EVL-NEXT: [[ENTRY:.*:]]253; IF-EVL-NEXT: br label %[[VECTOR_PH:.*]]254; IF-EVL: [[VECTOR_PH]]:255; IF-EVL-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()256; IF-EVL-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4257; IF-EVL-NEXT: [[TMP39:%.*]] = trunc i64 [[TMP8]] to i32258; IF-EVL-NEXT: [[TMP9:%.*]] = call i32 @llvm.vscale.i32()259; IF-EVL-NEXT: [[TMP10:%.*]] = mul nuw i32 [[TMP9]], 4260; IF-EVL-NEXT: [[TMP11:%.*]] = sub i32 [[TMP10]], 1261; IF-EVL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 33, i32 [[TMP11]]262; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.vscale.i32()263; IF-EVL-NEXT: [[TMP13:%.*]] = mul nuw i32 [[TMP12]], 4264; IF-EVL-NEXT: [[TMP14:%.*]] = sub i32 [[TMP13]], 1265; IF-EVL-NEXT: [[VECTOR_RECUR_INIT1:%.*]] = insertelement <vscale x 4 x i32> poison, i32 22, i32 [[TMP14]]266; IF-EVL-NEXT: [[TMP15:%.*]] = call i32 @llvm.vscale.i32()267; IF-EVL-NEXT: [[TMP16:%.*]] = mul nuw i32 [[TMP15]], 4268; IF-EVL-NEXT: [[TMP17:%.*]] = sub i32 [[TMP16]], 1269; IF-EVL-NEXT: [[VECTOR_RECUR_INIT3:%.*]] = insertelement <vscale x 4 x i32> poison, i32 11, i32 [[TMP17]]270; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]271; IF-EVL: [[VECTOR_BODY]]:272; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]273; IF-EVL-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[VP_OP_LOAD:%.*]], %[[VECTOR_BODY]] ]274; IF-EVL-NEXT: [[VECTOR_RECUR2:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT1]], %[[VECTOR_PH]] ], [ [[TMP22:%.*]], %[[VECTOR_BODY]] ]275; IF-EVL-NEXT: [[VECTOR_RECUR4:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT3]], %[[VECTOR_PH]] ], [ [[TMP23:%.*]], %[[VECTOR_BODY]] ]276; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[TC]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]277; IF-EVL-NEXT: [[PREV_EVL:%.*]] = phi i32 [ [[TMP39]], %[[VECTOR_PH]] ], [ [[TMP18:%.*]], %[[VECTOR_BODY]] ]278; IF-EVL-NEXT: [[TMP18]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)279; IF-EVL-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[EVL_BASED_IV]]280; IF-EVL-NEXT: [[VP_OP_LOAD]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP20]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP18]])281; IF-EVL-NEXT: [[TMP22]] = call <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR]], <vscale x 4 x i32> [[VP_OP_LOAD]], i32 -1, <vscale x 4 x i1> splat (i1 true), i32 [[PREV_EVL]], i32 [[TMP18]])282; IF-EVL-NEXT: [[TMP23]] = call <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR2]], <vscale x 4 x i32> [[TMP22]], i32 -1, <vscale x 4 x i1> splat (i1 true), i32 [[PREV_EVL]], i32 [[TMP18]])283; IF-EVL-NEXT: [[TMP24:%.*]] = call <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR4]], <vscale x 4 x i32> [[TMP23]], i32 -1, <vscale x 4 x i1> splat (i1 true), i32 [[PREV_EVL]], i32 [[TMP18]])284; IF-EVL-NEXT: [[TMP40:%.*]] = add nsw <vscale x 4 x i32> [[TMP23]], [[TMP24]]285; IF-EVL-NEXT: [[VP_OP5:%.*]] = add <vscale x 4 x i32> [[TMP40]], [[TMP22]]286; IF-EVL-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[EVL_BASED_IV]]287; IF-EVL-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[VP_OP5]], ptr align 4 [[TMP25]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP18]])288; IF-EVL-NEXT: [[TMP27:%.*]] = zext i32 [[TMP18]] to i64289; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP27]], [[EVL_BASED_IV]]290; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP27]]291; IF-EVL-NEXT: [[TMP26:%.*]] = icmp eq i64 [[AVL_NEXT]], 0292; IF-EVL-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]293; IF-EVL: [[MIDDLE_BLOCK]]:294; IF-EVL-NEXT: br label %[[FOR_END:.*]]295; IF-EVL: [[FOR_END]]:296; IF-EVL-NEXT: ret void297;298; NO-VP-LABEL: define void @third_order_recurrence(299; NO-VP-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[TC:%.*]]) #[[ATTR0]] {300; NO-VP-NEXT: [[ENTRY:.*]]:301; NO-VP-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()302; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 2303; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TC]], [[TMP1]]304; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]305; NO-VP: [[VECTOR_PH]]:306; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()307; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 4308; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TC]], [[TMP3]]309; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[TC]], [[N_MOD_VF]]310; NO-VP-NEXT: [[TMP6:%.*]] = call i32 @llvm.vscale.i32()311; NO-VP-NEXT: [[TMP7:%.*]] = mul nuw i32 [[TMP6]], 4312; NO-VP-NEXT: [[TMP8:%.*]] = sub i32 [[TMP7]], 1313; NO-VP-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 33, i32 [[TMP8]]314; NO-VP-NEXT: [[TMP9:%.*]] = call i32 @llvm.vscale.i32()315; NO-VP-NEXT: [[TMP10:%.*]] = mul nuw i32 [[TMP9]], 4316; NO-VP-NEXT: [[TMP11:%.*]] = sub i32 [[TMP10]], 1317; NO-VP-NEXT: [[VECTOR_RECUR_INIT1:%.*]] = insertelement <vscale x 4 x i32> poison, i32 22, i32 [[TMP11]]318; NO-VP-NEXT: [[TMP12:%.*]] = call i32 @llvm.vscale.i32()319; NO-VP-NEXT: [[TMP13:%.*]] = mul nuw i32 [[TMP12]], 4320; NO-VP-NEXT: [[TMP14:%.*]] = sub i32 [[TMP13]], 1321; NO-VP-NEXT: [[VECTOR_RECUR_INIT3:%.*]] = insertelement <vscale x 4 x i32> poison, i32 11, i32 [[TMP14]]322; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]323; NO-VP: [[VECTOR_BODY]]:324; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]325; NO-VP-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[WIDE_LOAD:%.*]], %[[VECTOR_BODY]] ]326; NO-VP-NEXT: [[VECTOR_RECUR2:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT1]], %[[VECTOR_PH]] ], [ [[TMP18:%.*]], %[[VECTOR_BODY]] ]327; NO-VP-NEXT: [[VECTOR_RECUR4:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT3]], %[[VECTOR_PH]] ], [ [[TMP19:%.*]], %[[VECTOR_BODY]] ]328; NO-VP-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[INDEX]]329; NO-VP-NEXT: [[WIDE_LOAD]] = load <vscale x 4 x i32>, ptr [[TMP16]], align 4330; NO-VP-NEXT: [[TMP18]] = call <vscale x 4 x i32> @llvm.vector.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR]], <vscale x 4 x i32> [[WIDE_LOAD]], i32 -1)331; NO-VP-NEXT: [[TMP19]] = call <vscale x 4 x i32> @llvm.vector.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR2]], <vscale x 4 x i32> [[TMP18]], i32 -1)332; NO-VP-NEXT: [[TMP20:%.*]] = call <vscale x 4 x i32> @llvm.vector.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR4]], <vscale x 4 x i32> [[TMP19]], i32 -1)333; NO-VP-NEXT: [[TMP21:%.*]] = add nsw <vscale x 4 x i32> [[TMP19]], [[TMP20]]334; NO-VP-NEXT: [[TMP22:%.*]] = add <vscale x 4 x i32> [[TMP21]], [[TMP18]]335; NO-VP-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[INDEX]]336; NO-VP-NEXT: store <vscale x 4 x i32> [[TMP22]], ptr [[TMP23]], align 4337; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]338; NO-VP-NEXT: [[TMP25:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]339; NO-VP-NEXT: br i1 [[TMP25]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]340; NO-VP: [[MIDDLE_BLOCK]]:341; NO-VP-NEXT: [[TMP26:%.*]] = call i32 @llvm.vscale.i32()342; NO-VP-NEXT: [[TMP27:%.*]] = mul nuw i32 [[TMP26]], 4343; NO-VP-NEXT: [[TMP28:%.*]] = sub i32 [[TMP27]], 1344; NO-VP-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <vscale x 4 x i32> [[WIDE_LOAD]], i32 [[TMP28]]345; NO-VP-NEXT: [[TMP29:%.*]] = call i32 @llvm.vscale.i32()346; NO-VP-NEXT: [[TMP30:%.*]] = mul nuw i32 [[TMP29]], 4347; NO-VP-NEXT: [[TMP31:%.*]] = sub i32 [[TMP30]], 1348; NO-VP-NEXT: [[VECTOR_RECUR_EXTRACT5:%.*]] = extractelement <vscale x 4 x i32> [[TMP18]], i32 [[TMP31]]349; NO-VP-NEXT: [[TMP32:%.*]] = call i32 @llvm.vscale.i32()350; NO-VP-NEXT: [[TMP33:%.*]] = mul nuw i32 [[TMP32]], 4351; NO-VP-NEXT: [[TMP34:%.*]] = sub i32 [[TMP33]], 1352; NO-VP-NEXT: [[VECTOR_RECUR_EXTRACT6:%.*]] = extractelement <vscale x 4 x i32> [[TMP19]], i32 [[TMP34]]353; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TC]], [[N_VEC]]354; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]355; NO-VP: [[SCALAR_PH]]:356; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]357; NO-VP-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], %[[MIDDLE_BLOCK]] ], [ 33, %[[ENTRY]] ]358; NO-VP-NEXT: [[SCALAR_RECUR_INIT7:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT5]], %[[MIDDLE_BLOCK]] ], [ 22, %[[ENTRY]] ]359; NO-VP-NEXT: [[SCALAR_RECUR_INIT8:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT6]], %[[MIDDLE_BLOCK]] ], [ 11, %[[ENTRY]] ]360; NO-VP-NEXT: br label %[[FOR_BODY:.*]]361; NO-VP: [[FOR_BODY]]:362; NO-VP-NEXT: [[INDVARS:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_NEXT:%.*]], %[[FOR_BODY]] ]363; NO-VP-NEXT: [[FOR1:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT]], %[[SCALAR_PH]] ], [ [[TMP35:%.*]], %[[FOR_BODY]] ]364; NO-VP-NEXT: [[FOR2:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT7]], %[[SCALAR_PH]] ], [ [[FOR1]], %[[FOR_BODY]] ]365; NO-VP-NEXT: [[FOR3:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT8]], %[[SCALAR_PH]] ], [ [[FOR2]], %[[FOR_BODY]] ]366; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[INDVARS]]367; NO-VP-NEXT: [[TMP35]] = load i32, ptr [[ARRAYIDX]], align 4368; NO-VP-NEXT: [[ADD:%.*]] = add nsw i32 [[FOR2]], [[FOR3]]369; NO-VP-NEXT: [[ADD1:%.*]] = add i32 [[ADD]], [[FOR1]]370; NO-VP-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[INDVARS]]371; NO-VP-NEXT: store i32 [[ADD1]], ptr [[ARRAYIDX2]], align 4372; NO-VP-NEXT: [[INDVARS_NEXT]] = add nuw nsw i64 [[INDVARS]], 1373; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_NEXT]], [[TC]]374; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]375; NO-VP: [[FOR_END]]:376; NO-VP-NEXT: ret void377;378entry:379 br label %for.body380 381for.body:382 %indvars = phi i64 [ 0, %entry ], [ %indvars.next, %for.body ]383 %for1 = phi i32 [ 33, %entry ], [ %0, %for.body ]384 %for2 = phi i32 [ 22, %entry ], [ %for1, %for.body ]385 %for3 = phi i32 [ 11, %entry ], [ %for2, %for.body ]386 %arrayidx = getelementptr inbounds nuw i32, ptr %A, i64 %indvars387 %0 = load i32, ptr %arrayidx, align 4388 %add = add nsw i32 %for2, %for3389 %add1 = add i32 %add, %for1390 %arrayidx2 = getelementptr inbounds nuw i32, ptr %B, i64 %indvars391 store i32 %add1, ptr %arrayidx2, align 4392 %indvars.next = add nuw nsw i64 %indvars, 1393 %exitcond.not = icmp eq i64 %indvars.next, %TC394 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0395 396for.end:397 ret void398}399 400define i32 @FOR_reduction(ptr noalias %A, ptr noalias %B, i64 %TC) {401; IF-EVL-LABEL: define i32 @FOR_reduction(402; IF-EVL-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[TC:%.*]]) #[[ATTR0]] {403; IF-EVL-NEXT: [[ENTRY:.*:]]404; IF-EVL-NEXT: br label %[[VECTOR_PH:.*]]405; IF-EVL: [[VECTOR_PH]]:406; IF-EVL-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()407; IF-EVL-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 4408; IF-EVL-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32409; IF-EVL-NEXT: [[TMP6:%.*]] = call i32 @llvm.vscale.i32()410; IF-EVL-NEXT: [[TMP7:%.*]] = mul nuw i32 [[TMP6]], 4411; IF-EVL-NEXT: [[TMP8:%.*]] = sub i32 [[TMP7]], 1412; IF-EVL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 33, i32 [[TMP8]]413; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]414; IF-EVL: [[VECTOR_BODY]]:415; IF-EVL-NEXT: [[INDVARS:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]416; IF-EVL-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[WIDE_LOAD:%.*]], %[[VECTOR_BODY]] ]417; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[TC]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]418; IF-EVL-NEXT: [[PREV_EVL:%.*]] = phi i32 [ [[TMP4]], %[[VECTOR_PH]] ], [ [[TMP9:%.*]], %[[VECTOR_BODY]] ]419; IF-EVL-NEXT: [[TMP9]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)420; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[INDVARS]]421; IF-EVL-NEXT: [[WIDE_LOAD]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[ARRAYIDX]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP9]])422; IF-EVL-NEXT: [[TMP10:%.*]] = call <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR]], <vscale x 4 x i32> [[WIDE_LOAD]], i32 -1, <vscale x 4 x i1> splat (i1 true), i32 [[PREV_EVL]], i32 [[TMP9]])423; IF-EVL-NEXT: [[TMP11:%.*]] = add nsw <vscale x 4 x i32> [[TMP10]], [[WIDE_LOAD]]424; IF-EVL-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[INDVARS]]425; IF-EVL-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP11]], ptr align 4 [[TMP12]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP9]])426; IF-EVL-NEXT: [[TMP13:%.*]] = zext i32 [[TMP9]] to i64427; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP13]], [[INDVARS]]428; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP13]]429; IF-EVL-NEXT: [[TMP24:%.*]] = icmp eq i64 [[AVL_NEXT]], 0430; IF-EVL-NEXT: br i1 [[TMP24]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]431; IF-EVL: [[MIDDLE_BLOCK]]:432; IF-EVL-NEXT: [[TMP28:%.*]] = sub i64 [[TMP13]], 1433; IF-EVL-NEXT: [[TMP17:%.*]] = sub i64 [[TMP28]], 1434; IF-EVL-NEXT: [[TMP18:%.*]] = call i64 @llvm.vscale.i64()435; IF-EVL-NEXT: [[TMP19:%.*]] = mul nuw i64 [[TMP18]], 4436; IF-EVL-NEXT: [[TMP20:%.*]] = mul i64 [[TMP19]], 0437; IF-EVL-NEXT: [[TMP21:%.*]] = extractelement <vscale x 4 x i32> [[WIDE_LOAD]], i64 [[TMP17]]438; IF-EVL-NEXT: [[TMP14:%.*]] = call i32 @llvm.vscale.i32()439; IF-EVL-NEXT: [[TMP15:%.*]] = mul nuw i32 [[TMP14]], 4440; IF-EVL-NEXT: [[TMP16:%.*]] = sub i32 [[TMP15]], 1441; IF-EVL-NEXT: [[TMP25:%.*]] = extractelement <vscale x 4 x i32> [[VECTOR_RECUR]], i32 [[TMP16]]442; IF-EVL-NEXT: [[TMP26:%.*]] = icmp eq i64 [[TMP28]], 0443; IF-EVL-NEXT: [[FOR1_LCSSA:%.*]] = select i1 [[TMP26]], i32 [[TMP25]], i32 [[TMP21]]444; IF-EVL-NEXT: br label %[[FOR_END:.*]]445; IF-EVL: [[FOR_END]]:446; IF-EVL-NEXT: ret i32 [[FOR1_LCSSA]]447;448; NO-VP-LABEL: define i32 @FOR_reduction(449; NO-VP-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[TC:%.*]]) #[[ATTR0]] {450; NO-VP-NEXT: [[ENTRY:.*]]:451; NO-VP-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()452; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 2453; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TC]], [[TMP1]]454; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]455; NO-VP: [[VECTOR_PH]]:456; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()457; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 4458; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TC]], [[TMP3]]459; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[TC]], [[N_MOD_VF]]460; NO-VP-NEXT: [[TMP6:%.*]] = call i32 @llvm.vscale.i32()461; NO-VP-NEXT: [[TMP7:%.*]] = mul nuw i32 [[TMP6]], 4462; NO-VP-NEXT: [[TMP8:%.*]] = sub i32 [[TMP7]], 1463; NO-VP-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 33, i32 [[TMP8]]464; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]465; NO-VP: [[VECTOR_BODY]]:466; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]467; NO-VP-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 4 x i32> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[WIDE_LOAD:%.*]], %[[VECTOR_BODY]] ]468; NO-VP-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[INDEX]]469; NO-VP-NEXT: [[WIDE_LOAD]] = load <vscale x 4 x i32>, ptr [[TMP10]], align 4470; NO-VP-NEXT: [[TMP12:%.*]] = call <vscale x 4 x i32> @llvm.vector.splice.nxv4i32(<vscale x 4 x i32> [[VECTOR_RECUR]], <vscale x 4 x i32> [[WIDE_LOAD]], i32 -1)471; NO-VP-NEXT: [[TMP13:%.*]] = add nsw <vscale x 4 x i32> [[TMP12]], [[WIDE_LOAD]]472; NO-VP-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[INDEX]]473; NO-VP-NEXT: store <vscale x 4 x i32> [[TMP13]], ptr [[TMP14]], align 4474; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]475; NO-VP-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]476; NO-VP-NEXT: br i1 [[TMP16]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]477; NO-VP: [[MIDDLE_BLOCK]]:478; NO-VP-NEXT: [[TMP17:%.*]] = call i32 @llvm.vscale.i32()479; NO-VP-NEXT: [[TMP18:%.*]] = mul nuw i32 [[TMP17]], 4480; NO-VP-NEXT: [[TMP19:%.*]] = sub i32 [[TMP18]], 1481; NO-VP-NEXT: [[VECTOR_RECUR_EXTRACT_FOR_PHI:%.*]] = extractelement <vscale x 4 x i32> [[WIDE_LOAD]], i32 [[TMP19]]482; NO-VP-NEXT: [[TMP20:%.*]] = call i32 @llvm.vscale.i32()483; NO-VP-NEXT: [[TMP21:%.*]] = mul nuw i32 [[TMP20]], 4484; NO-VP-NEXT: [[TMP22:%.*]] = sub i32 [[TMP21]], 2485; NO-VP-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <vscale x 4 x i32> [[WIDE_LOAD]], i32 [[TMP22]]486; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TC]], [[N_VEC]]487; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]488; NO-VP: [[SCALAR_PH]]:489; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]490; NO-VP-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT_FOR_PHI]], %[[MIDDLE_BLOCK]] ], [ 33, %[[ENTRY]] ]491; NO-VP-NEXT: br label %[[FOR_BODY:.*]]492; NO-VP: [[FOR_BODY]]:493; NO-VP-NEXT: [[INDVARS:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_NEXT:%.*]], %[[FOR_BODY]] ]494; NO-VP-NEXT: [[FOR1:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT]], %[[SCALAR_PH]] ], [ [[TMP23:%.*]], %[[FOR_BODY]] ]495; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[INDVARS]]496; NO-VP-NEXT: [[TMP23]] = load i32, ptr [[ARRAYIDX]], align 4497; NO-VP-NEXT: [[ADD:%.*]] = add nsw i32 [[FOR1]], [[TMP23]]498; NO-VP-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[INDVARS]]499; NO-VP-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX2]], align 4500; NO-VP-NEXT: [[INDVARS_NEXT]] = add nuw nsw i64 [[INDVARS]], 1501; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_NEXT]], [[TC]]502; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]503; NO-VP: [[FOR_END]]:504; NO-VP-NEXT: [[FOR1_LCSSA:%.*]] = phi i32 [ [[FOR1]], %[[FOR_BODY]] ], [ [[VECTOR_RECUR_EXTRACT]], %[[MIDDLE_BLOCK]] ]505; NO-VP-NEXT: ret i32 [[FOR1_LCSSA]]506;507entry:508 br label %for.body509 510for.body:511 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]512 %for1 = phi i32 [ 33, %entry ], [ %0, %for.body ]513 %arrayidx = getelementptr inbounds nuw i32, ptr %A, i64 %iv514 %0 = load i32, ptr %arrayidx, align 4515 %add = add nsw i32 %for1, %0516 %arrayidx2 = getelementptr inbounds nuw i32, ptr %B, i64 %iv517 store i32 %add, ptr %arrayidx2, align 4518 %iv.next = add nuw nsw i64 %iv, 1519 %exitcond.not = icmp eq i64 %iv.next, %TC520 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0521 522for.end:523 ret i32 %for1524}525 526define void @first_order_recurrence_indvar(ptr noalias %A, i64 %TC) {527; IF-EVL-LABEL: define void @first_order_recurrence_indvar(528; IF-EVL-SAME: ptr noalias [[A:%.*]], i64 [[TC:%.*]]) #[[ATTR0]] {529; IF-EVL-NEXT: [[ENTRY:.*:]]530; IF-EVL-NEXT: br label %[[VECTOR_PH:.*]]531; IF-EVL: [[VECTOR_PH]]:532; IF-EVL-NEXT: [[TMP18:%.*]] = call i64 @llvm.vscale.i64()533; IF-EVL-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP18]], 2534; IF-EVL-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i32535; IF-EVL-NEXT: [[TMP6:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()536; IF-EVL-NEXT: [[TMP8:%.*]] = mul <vscale x 2 x i64> [[TMP6]], splat (i64 1)537; IF-EVL-NEXT: [[INDUCTION:%.*]] = add <vscale x 2 x i64> zeroinitializer, [[TMP8]]538; IF-EVL-NEXT: [[TMP13:%.*]] = call i32 @llvm.vscale.i32()539; IF-EVL-NEXT: [[TMP19:%.*]] = mul nuw i32 [[TMP13]], 2540; IF-EVL-NEXT: [[TMP10:%.*]] = sub i32 [[TMP19]], 1541; IF-EVL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 33, i32 [[TMP10]]542; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]]543; IF-EVL: [[VECTOR_BODY]]:544; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]545; IF-EVL-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]546; IF-EVL-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 2 x i64> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[TMP20:%.*]], %[[VECTOR_BODY]] ]547; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ [[TC]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]548; IF-EVL-NEXT: [[PREV_EVL:%.*]] = phi i32 [ [[TMP5]], %[[VECTOR_PH]] ], [ [[TMP11:%.*]], %[[VECTOR_BODY]] ]549; IF-EVL-NEXT: [[TMP11]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)550; IF-EVL-NEXT: [[TMP7:%.*]] = zext i32 [[TMP11]] to i64551; IF-EVL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP7]], i64 0552; IF-EVL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer553; IF-EVL-NEXT: [[TMP20]] = add <vscale x 2 x i64> [[VEC_IND]], splat (i64 42)554; IF-EVL-NEXT: [[TMP15:%.*]] = call <vscale x 2 x i64> @llvm.experimental.vp.splice.nxv2i64(<vscale x 2 x i64> [[VECTOR_RECUR]], <vscale x 2 x i64> [[TMP20]], i32 -1, <vscale x 2 x i1> splat (i1 true), i32 [[PREV_EVL]], i32 [[TMP11]])555; IF-EVL-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw i64, ptr [[A]], i64 [[EVL_BASED_IV]]556; IF-EVL-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> [[TMP15]], ptr align 8 [[TMP9]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP11]])557; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP7]], [[EVL_BASED_IV]]558; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP7]]559; IF-EVL-NEXT: [[VEC_IND_NEXT]] = add <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]560; IF-EVL-NEXT: [[TMP22:%.*]] = icmp eq i64 [[AVL_NEXT]], 0561; IF-EVL-NEXT: br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]562; IF-EVL: [[MIDDLE_BLOCK]]:563; IF-EVL-NEXT: br label %[[FOR_END:.*]]564; IF-EVL: [[FOR_END]]:565; IF-EVL-NEXT: ret void566;567; NO-VP-LABEL: define void @first_order_recurrence_indvar(568; NO-VP-SAME: ptr noalias [[A:%.*]], i64 [[TC:%.*]]) #[[ATTR0]] {569; NO-VP-NEXT: [[ENTRY:.*]]:570; NO-VP-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()571; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 1572; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TC]], [[TMP1]]573; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]574; NO-VP: [[VECTOR_PH]]:575; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()576; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 2577; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TC]], [[TMP3]]578; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 [[TC]], [[N_MOD_VF]]579; NO-VP-NEXT: [[TMP6:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()580; NO-VP-NEXT: [[TMP5:%.*]] = mul nuw nsw <vscale x 2 x i64> [[TMP6]], splat (i64 1)581; NO-VP-NEXT: [[INDUCTION:%.*]] = add nuw nsw <vscale x 2 x i64> zeroinitializer, [[TMP5]]582; NO-VP-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP3]], i64 0583; NO-VP-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer584; NO-VP-NEXT: [[TMP14:%.*]] = call i32 @llvm.vscale.i32()585; NO-VP-NEXT: [[TMP16:%.*]] = mul nuw i32 [[TMP14]], 2586; NO-VP-NEXT: [[TMP20:%.*]] = sub i32 [[TMP16]], 1587; NO-VP-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 33, i32 [[TMP20]]588; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]]589; NO-VP: [[VECTOR_BODY]]:590; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]591; NO-VP-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]592; NO-VP-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 2 x i64> [ [[VECTOR_RECUR_INIT]], %[[VECTOR_PH]] ], [ [[TMP12:%.*]], %[[VECTOR_BODY]] ]593; NO-VP-NEXT: [[TMP12]] = add <vscale x 2 x i64> [[VEC_IND]], splat (i64 42)594; NO-VP-NEXT: [[TMP13:%.*]] = call <vscale x 2 x i64> @llvm.vector.splice.nxv2i64(<vscale x 2 x i64> [[VECTOR_RECUR]], <vscale x 2 x i64> [[TMP12]], i32 -1)595; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw i64, ptr [[A]], i64 [[INDEX]]596; NO-VP-NEXT: store <vscale x 2 x i64> [[TMP13]], ptr [[TMP11]], align 8597; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]598; NO-VP-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]599; NO-VP-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]600; NO-VP-NEXT: br i1 [[TMP23]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]601; NO-VP: [[MIDDLE_BLOCK]]:602; NO-VP-NEXT: [[TMP17:%.*]] = call i32 @llvm.vscale.i32()603; NO-VP-NEXT: [[TMP21:%.*]] = mul nuw i32 [[TMP17]], 2604; NO-VP-NEXT: [[TMP19:%.*]] = sub i32 [[TMP21]], 1605; NO-VP-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <vscale x 2 x i64> [[TMP12]], i32 [[TMP19]]606; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TC]], [[N_VEC]]607; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]608; NO-VP: [[SCALAR_PH]]:609; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]610; NO-VP-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i64 [ [[VECTOR_RECUR_EXTRACT]], %[[MIDDLE_BLOCK]] ], [ 33, %[[ENTRY]] ]611; NO-VP-NEXT: br label %[[FOR_BODY:.*]]612; NO-VP: [[FOR_BODY]]:613; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV1_NEXT:%.*]], %[[FOR_BODY]] ]614; NO-VP-NEXT: [[FOR1:%.*]] = phi i64 [ [[SCALAR_RECUR_INIT]], %[[SCALAR_PH]] ], [ [[TMP18:%.*]], %[[FOR_BODY]] ]615; NO-VP-NEXT: [[TMP18]] = add i64 [[IV1]], 42616; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i64, ptr [[A]], i64 [[IV1]]617; NO-VP-NEXT: store i64 [[FOR1]], ptr [[ARRAYIDX]], align 8618; NO-VP-NEXT: [[IV1_NEXT]] = add nuw nsw i64 [[IV1]], 1619; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV1_NEXT]], [[TC]]620; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]621; NO-VP: [[FOR_END]]:622; NO-VP-NEXT: ret void623;624entry:625 br label %for.body626 627for.body:628 %indvars = phi i64 [ 0, %entry ], [ %indvars.next, %for.body ]629 %for1 = phi i64 [ 33, %entry ], [ %x, %for.body ]630 631 %x = add i64 %indvars, 42632 633 %arrayidx = getelementptr inbounds nuw i64, ptr %A, i64 %indvars634 store i64 %for1, ptr %arrayidx635 636 %indvars.next = add nuw nsw i64 %indvars, 1637 %exitcond.not = icmp eq i64 %indvars.next, %TC638 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0639 640for.end:641 ret void642}643 644!0 = distinct !{!0, !1}645!1 = !{!"llvm.loop.vectorize.enable", i1 true}646;.647; IF-EVL: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}648; IF-EVL: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}649; IF-EVL: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}650; IF-EVL: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}651; IF-EVL: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}652; IF-EVL: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}653; IF-EVL: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}654;.655; NO-VP: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}656; NO-VP: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}657; NO-VP: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}658; NO-VP: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}659; NO-VP: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}660; NO-VP: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]}661; NO-VP: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}662; NO-VP: [[LOOP7]] = distinct !{[[LOOP7]], [[META2]], [[META1]]}663; NO-VP: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}664; NO-VP: [[LOOP9]] = distinct !{[[LOOP9]], [[META2]], [[META1]]}665; NO-VP: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}666; NO-VP: [[LOOP11]] = distinct !{[[LOOP11]], [[META2]], [[META1]]}667;.668