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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize \3; RUN: -force-ordered-reductions=true -hints-allow-reordering=false \4; RUN: -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue \5; RUN: -mtriple=riscv64 -mattr=+v,+f -S < %s| FileCheck %s --check-prefix=IF-EVL6 7; RUN: opt -passes=loop-vectorize \8; RUN: -force-ordered-reductions=true -hints-allow-reordering=false \9; RUN: -prefer-predicate-over-epilogue=scalar-epilogue \10; RUN: -mtriple=riscv64 -mattr=+v,+f -S < %s| FileCheck %s --check-prefix=NO-VP11 12define float @fadd(ptr noalias nocapture readonly %a, i64 %n) {13; IF-EVL-LABEL: @fadd(14; IF-EVL-NEXT: entry:15; IF-EVL-NEXT: br label [[VECTOR_PH:%.*]]16; IF-EVL: vector.ph:17; IF-EVL-NEXT: br label [[VECTOR_BODY:%.*]]18; IF-EVL: vector.body:19; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], [[VECTOR_BODY]] ]20; IF-EVL-NEXT: [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP14:%.*]], [[VECTOR_BODY]] ]21; IF-EVL-NEXT: [[TMP9:%.*]] = phi i64 [ [[N:%.*]], [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]22; IF-EVL-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP9]], i32 4, i1 true)23; IF-EVL-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[EVL_BASED_IV]]24; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP12]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])25; IF-EVL-NEXT: [[TMP14]] = call float @llvm.vp.reduce.fadd.nxv4f32(float [[VEC_PHI]], <vscale x 4 x float> [[VP_OP_LOAD]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])26; IF-EVL-NEXT: [[TMP15:%.*]] = zext i32 [[TMP10]] to i6427; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP15]], [[EVL_BASED_IV]]28; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP9]], [[TMP15]]29; IF-EVL-NEXT: [[TMP11:%.*]] = icmp eq i64 [[AVL_NEXT]], 030; IF-EVL-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]31; IF-EVL: middle.block:32; IF-EVL-NEXT: br label [[FOR_BODY:%.*]]33; IF-EVL: for.end:34; IF-EVL-NEXT: ret float [[TMP14]]35;36; NO-VP-LABEL: @fadd(37; NO-VP-NEXT: entry:38; NO-VP-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()39; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 240; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N1:%.*]], [[TMP1]]41; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[ENTRY:%.*]]42; NO-VP: vector.ph:43; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()44; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 445; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N1]], [[TMP3]]46; NO-VP-NEXT: [[N:%.*]] = sub i64 [[N1]], [[N_MOD_VF]]47; NO-VP-NEXT: br label [[FOR_BODY:%.*]]48; NO-VP: vector.body:49; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]50; NO-VP-NEXT: [[SUM_07:%.*]] = phi float [ 0.000000e+00, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]51; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[IV]]52; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[ARRAYIDX]], align 453; NO-VP-NEXT: [[ADD]] = call float @llvm.vector.reduce.fadd.nxv4f32(float [[SUM_07]], <vscale x 4 x float> [[WIDE_LOAD]])54; NO-VP-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], [[TMP3]]55; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]56; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label [[MIDDLE_BLOCK:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]57; NO-VP: middle.block:58; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N1]], [[N]]59; NO-VP-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]60; NO-VP: scalar.ph:61; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY1:%.*]] ]62; NO-VP-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[ADD]], [[MIDDLE_BLOCK]] ], [ 0.000000e+00, [[ENTRY1]] ]63; NO-VP-NEXT: br label [[FOR_BODY1:%.*]]64; NO-VP: for.body:65; NO-VP-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT1:%.*]], [[FOR_BODY1]] ]66; NO-VP-NEXT: [[SUM_7:%.*]] = phi float [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[ADD1:%.*]], [[FOR_BODY1]] ]67; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV1]]68; NO-VP-NEXT: [[TMP9:%.*]] = load float, ptr [[ARRAYIDX1]], align 469; NO-VP-NEXT: [[ADD1]] = fadd float [[TMP9]], [[SUM_7]]70; NO-VP-NEXT: [[IV_NEXT1]] = add nuw nsw i64 [[IV1]], 171; NO-VP-NEXT: [[EXITCOND_NOT1:%.*]] = icmp eq i64 [[IV_NEXT1]], [[N1]]72; NO-VP-NEXT: br i1 [[EXITCOND_NOT1]], label [[FOR_END]], label [[FOR_BODY1]], !llvm.loop [[LOOP3:![0-9]+]]73; NO-VP: for.end:74; NO-VP-NEXT: [[ADD_LCSSA:%.*]] = phi float [ [[ADD1]], [[FOR_BODY1]] ], [ [[ADD]], [[MIDDLE_BLOCK]] ]75; NO-VP-NEXT: ret float [[ADD_LCSSA]]76;77entry:78 br label %for.body79 80for.body:81 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]82 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %add, %for.body ]83 %arrayidx = getelementptr inbounds float, ptr %a, i64 %iv84 %0 = load float, ptr %arrayidx, align 485 %add = fadd float %0, %sum.0786 %iv.next = add nuw nsw i64 %iv, 187 %exitcond.not = icmp eq i64 %iv.next, %n88 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !089 90for.end:91 ret float %add92}93 94!0 = distinct !{!0, !1}95!1 = !{!"llvm.loop.vectorize.enable", i1 true}96