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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize \3; RUN: -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue \4; RUN: -mtriple=riscv64 -mattr=+v -S < %s | FileCheck %s --check-prefix=IF-EVL5 6; RUN: opt -passes=loop-vectorize \7; RUN: -prefer-predicate-over-epilogue=scalar-epilogue \8; RUN: -mtriple=riscv64 -mattr=+v -S < %s | FileCheck %s --check-prefix=NO-VP9 10define void @reverse_load_store(i64 %startval, ptr noalias %ptr, ptr noalias %ptr2) {11; IF-EVL-LABEL: @reverse_load_store(12; IF-EVL-NEXT: entry:13; IF-EVL-NEXT: br label [[VECTOR_PH:%.*]]14; IF-EVL: vector.ph:15; IF-EVL-NEXT: br label [[VECTOR_BODY:%.*]]16; IF-EVL: vector.body:17; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], [[VECTOR_BODY]] ]18; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]19; IF-EVL-NEXT: [[TMP5:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)20; IF-EVL-NEXT: [[OFFSET_IDX:%.*]] = sub i64 [[STARTVAL:%.*]], [[EVL_BASED_IV]]21; IF-EVL-NEXT: [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], -122; IF-EVL-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 [[TMP7]]23; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP5]] to i6424; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 0, [[TMP18]]25; IF-EVL-NEXT: [[TMP11:%.*]] = sub i64 [[TMP18]], 126; IF-EVL-NEXT: [[TMP10:%.*]] = mul i64 -1, [[TMP11]]27; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr i32, ptr [[TMP8]], i64 [[TMP9]]28; IF-EVL-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP16]], i64 [[TMP10]]29; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP12]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP5]])30; IF-EVL-NEXT: [[VP_REVERSE:%.*]] = call <vscale x 4 x i32> @llvm.experimental.vp.reverse.nxv4i32(<vscale x 4 x i32> [[VP_OP_LOAD]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP5]])31; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[PTR2:%.*]], i64 [[TMP7]]32; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP5]] to i6433; IF-EVL-NEXT: [[TMP14:%.*]] = mul i64 0, [[TMP19]]34; IF-EVL-NEXT: [[TMP23:%.*]] = sub i64 [[TMP19]], 135; IF-EVL-NEXT: [[TMP15:%.*]] = mul i64 -1, [[TMP23]]36; IF-EVL-NEXT: [[TMP22:%.*]] = getelementptr i32, ptr [[TMP13]], i64 [[TMP14]]37; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr i32, ptr [[TMP22]], i64 [[TMP15]]38; IF-EVL-NEXT: [[VP_REVERSE3:%.*]] = call <vscale x 4 x i32> @llvm.experimental.vp.reverse.nxv4i32(<vscale x 4 x i32> [[VP_REVERSE]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP5]])39; IF-EVL-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[VP_REVERSE3]], ptr align 4 [[TMP17]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP5]])40; IF-EVL-NEXT: [[TMP20:%.*]] = zext i32 [[TMP5]] to i6441; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP20]], [[EVL_BASED_IV]]42; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP20]]43; IF-EVL-NEXT: [[TMP24:%.*]] = icmp eq i64 [[AVL_NEXT]], 044; IF-EVL-NEXT: br i1 [[TMP24]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]45; IF-EVL: middle.block:46; IF-EVL-NEXT: br label [[FOR_BODY:%.*]]47; IF-EVL: loopend:48; IF-EVL-NEXT: ret void49;50; NO-VP-LABEL: @reverse_load_store(51; NO-VP-NEXT: entry:52; NO-VP-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()53; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 254; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP1]]55; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]56; NO-VP: vector.ph:57; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()58; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 459; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP3]]60; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]]61; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[STARTVAL:%.*]], [[N_VEC]]62; NO-VP-NEXT: [[TMP7:%.*]] = trunc i64 [[N_VEC]] to i3263; NO-VP-NEXT: br label [[FOR_BODY:%.*]]64; NO-VP: vector.body:65; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[FOR_BODY]] ]66; NO-VP-NEXT: [[OFFSET_IDX:%.*]] = sub i64 [[STARTVAL]], [[INDEX]]67; NO-VP-NEXT: [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], -168; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 [[TMP8]]69; NO-VP-NEXT: [[TMP10:%.*]] = mul i64 0, [[TMP3]]70; NO-VP-NEXT: [[TMP11:%.*]] = sub i64 [[TMP3]], 171; NO-VP-NEXT: [[TMP12:%.*]] = mul i64 -1, [[TMP11]]72; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i64 [[TMP10]]73; NO-VP-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i64 [[TMP12]]74; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP14]], align 475; NO-VP-NEXT: [[REVERSE:%.*]] = call <vscale x 4 x i32> @llvm.vector.reverse.nxv4i32(<vscale x 4 x i32> [[WIDE_LOAD]])76; NO-VP-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[PTR2:%.*]], i64 [[TMP8]]77; NO-VP-NEXT: [[TMP16:%.*]] = mul i64 0, [[TMP3]]78; NO-VP-NEXT: [[TMP17:%.*]] = sub i64 [[TMP3]], 179; NO-VP-NEXT: [[TMP18:%.*]] = mul i64 -1, [[TMP17]]80; NO-VP-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i64 [[TMP16]]81; NO-VP-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP19]], i64 [[TMP18]]82; NO-VP-NEXT: [[REVERSE1:%.*]] = call <vscale x 4 x i32> @llvm.vector.reverse.nxv4i32(<vscale x 4 x i32> [[REVERSE]])83; NO-VP-NEXT: store <vscale x 4 x i32> [[REVERSE1]], ptr [[TMP20]], align 484; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]85; NO-VP-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]86; NO-VP-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]87; NO-VP: middle.block:88; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]89; NO-VP-NEXT: br i1 [[CMP_N]], label [[LOOPEND:%.*]], label [[SCALAR_PH]]90; NO-VP: scalar.ph:91; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP6]], [[MIDDLE_BLOCK]] ], [ [[STARTVAL]], [[ENTRY:%.*]] ]92; NO-VP-NEXT: [[BC_RESUME_VAL2:%.*]] = phi i32 [ [[TMP7]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]93; NO-VP-NEXT: br label [[FOR_BODY1:%.*]]94; NO-VP: for.body:95; NO-VP-NEXT: [[ADD_PHI:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[ADD:%.*]], [[FOR_BODY1]] ]96; NO-VP-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL2]], [[SCALAR_PH]] ], [ [[INC:%.*]], [[FOR_BODY1]] ]97; NO-VP-NEXT: [[ADD]] = add i64 [[ADD_PHI]], -198; NO-VP-NEXT: [[GEPL:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[ADD]]99; NO-VP-NEXT: [[TMP:%.*]] = load i32, ptr [[GEPL]], align 4100; NO-VP-NEXT: [[GEPS:%.*]] = getelementptr inbounds i32, ptr [[PTR2]], i64 [[ADD]]101; NO-VP-NEXT: store i32 [[TMP]], ptr [[GEPS]], align 4102; NO-VP-NEXT: [[INC]] = add i32 [[I]], 1103; NO-VP-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], 1024104; NO-VP-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY1]], label [[LOOPEND]], !llvm.loop [[LOOP3:![0-9]+]]105; NO-VP: loopend:106; NO-VP-NEXT: ret void107;108entry:109 br label %for.body110 111for.body:112 %add.phi = phi i64 [ %startval, %entry ], [ %add, %for.body ]113 %i = phi i32 [ 0, %entry ], [ %inc, %for.body ]114 %add = add i64 %add.phi, -1115 %gepl = getelementptr inbounds i32, ptr %ptr, i64 %add116 %tmp = load i32, ptr %gepl, align 4117 %geps = getelementptr inbounds i32, ptr %ptr2, i64 %add118 store i32 %tmp, ptr %geps, align 4119 %inc = add i32 %i, 1120 %exitcond = icmp ne i32 %inc, 1024121 br i1 %exitcond, label %for.body, label %loopend122 123loopend:124 ret void125}126 127define void @reverse_load_store_masked(i64 %startval, ptr noalias %ptr, ptr noalias %ptr1, ptr noalias %ptr2) {128; IF-EVL-LABEL: @reverse_load_store_masked(129; IF-EVL-NEXT: entry:130; IF-EVL-NEXT: br label [[VECTOR_PH:%.*]]131; IF-EVL: vector.ph:132; IF-EVL-NEXT: br label [[VECTOR_BODY:%.*]]133; IF-EVL: vector.body:134; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], [[VECTOR_BODY]] ]135; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]136; IF-EVL-NEXT: [[TMP5:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)137; IF-EVL-NEXT: [[OFFSET_IDX:%.*]] = sub i64 [[STARTVAL:%.*]], [[EVL_BASED_IV]]138; IF-EVL-NEXT: [[OFFSET_IDX3:%.*]] = trunc i64 [[EVL_BASED_IV]] to i32139; IF-EVL-NEXT: [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], -1140; IF-EVL-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i32 [[OFFSET_IDX3]]141; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP12]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP5]])142; IF-EVL-NEXT: [[TMP14:%.*]] = icmp slt <vscale x 4 x i32> [[VP_OP_LOAD]], splat (i32 100)143; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr i32, ptr [[PTR1:%.*]], i64 [[TMP11]]144; IF-EVL-NEXT: [[TMP26:%.*]] = zext i32 [[TMP5]] to i64145; IF-EVL-NEXT: [[TMP17:%.*]] = mul i64 0, [[TMP26]]146; IF-EVL-NEXT: [[TMP15:%.*]] = sub i64 [[TMP26]], 1147; IF-EVL-NEXT: [[TMP18:%.*]] = mul i64 -1, [[TMP15]]148; IF-EVL-NEXT: [[TMP19:%.*]] = getelementptr i32, ptr [[TMP16]], i64 [[TMP17]]149; IF-EVL-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[TMP19]], i64 [[TMP18]]150; IF-EVL-NEXT: [[VP_REVERSE_MASK:%.*]] = call <vscale x 4 x i1> @llvm.experimental.vp.reverse.nxv4i1(<vscale x 4 x i1> [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP5]])151; IF-EVL-NEXT: [[VP_OP_LOAD4:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP20]], <vscale x 4 x i1> [[VP_REVERSE_MASK]], i32 [[TMP5]])152; IF-EVL-NEXT: [[VP_REVERSE:%.*]] = call <vscale x 4 x i32> @llvm.experimental.vp.reverse.nxv4i32(<vscale x 4 x i32> [[VP_OP_LOAD4]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP5]])153; IF-EVL-NEXT: [[TMP21:%.*]] = getelementptr i32, ptr [[PTR2:%.*]], i64 [[TMP11]]154; IF-EVL-NEXT: [[TMP27:%.*]] = zext i32 [[TMP5]] to i64155; IF-EVL-NEXT: [[TMP22:%.*]] = mul i64 0, [[TMP27]]156; IF-EVL-NEXT: [[TMP30:%.*]] = sub i64 [[TMP27]], 1157; IF-EVL-NEXT: [[TMP23:%.*]] = mul i64 -1, [[TMP30]]158; IF-EVL-NEXT: [[TMP24:%.*]] = getelementptr i32, ptr [[TMP21]], i64 [[TMP22]]159; IF-EVL-NEXT: [[TMP25:%.*]] = getelementptr i32, ptr [[TMP24]], i64 [[TMP23]]160; IF-EVL-NEXT: [[VP_REVERSE5:%.*]] = call <vscale x 4 x i32> @llvm.experimental.vp.reverse.nxv4i32(<vscale x 4 x i32> [[VP_REVERSE]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP5]])161; IF-EVL-NEXT: [[VP_REVERSE_MASK6:%.*]] = call <vscale x 4 x i1> @llvm.experimental.vp.reverse.nxv4i1(<vscale x 4 x i1> [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP5]])162; IF-EVL-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[VP_REVERSE5]], ptr align 4 [[TMP25]], <vscale x 4 x i1> [[VP_REVERSE_MASK6]], i32 [[TMP5]])163; IF-EVL-NEXT: [[TMP28:%.*]] = zext i32 [[TMP5]] to i64164; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP28]], [[EVL_BASED_IV]]165; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP28]]166; IF-EVL-NEXT: [[TMP29:%.*]] = icmp eq i64 [[AVL_NEXT]], 0167; IF-EVL-NEXT: br i1 [[TMP29]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]168; IF-EVL: middle.block:169; IF-EVL-NEXT: br label [[FOR_INC:%.*]]170; IF-EVL: loopend:171; IF-EVL-NEXT: ret void172;173; NO-VP-LABEL: @reverse_load_store_masked(174; NO-VP-NEXT: entry:175; NO-VP-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()176; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 2177; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP1]]178; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[ENTRY:%.*]], label [[VECTOR_PH:%.*]]179; NO-VP: vector.ph:180; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()181; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 4182; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP3]]183; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]]184; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[STARTVAL1:%.*]], [[N_VEC]]185; NO-VP-NEXT: [[TMP7:%.*]] = trunc i64 [[N_VEC]] to i32186; NO-VP-NEXT: br label [[FOR_BODY:%.*]]187; NO-VP: vector.body:188; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[FOR_BODY]] ]189; NO-VP-NEXT: [[OFFSET_IDX:%.*]] = sub i64 [[STARTVAL1]], [[INDEX]]190; NO-VP-NEXT: [[OFFSET_IDX1:%.*]] = trunc i64 [[INDEX]] to i32191; NO-VP-NEXT: [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], -1192; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i32 [[OFFSET_IDX1]]193; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP9]], align 4194; NO-VP-NEXT: [[TMP10:%.*]] = icmp slt <vscale x 4 x i32> [[WIDE_LOAD]], splat (i32 100)195; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr i32, ptr [[PTR1:%.*]], i64 [[TMP8]]196; NO-VP-NEXT: [[TMP12:%.*]] = mul i64 0, [[TMP3]]197; NO-VP-NEXT: [[TMP13:%.*]] = sub i64 [[TMP3]], 1198; NO-VP-NEXT: [[TMP14:%.*]] = mul i64 -1, [[TMP13]]199; NO-VP-NEXT: [[TMP15:%.*]] = getelementptr i32, ptr [[TMP11]], i64 [[TMP12]]200; NO-VP-NEXT: [[TMP16:%.*]] = getelementptr i32, ptr [[TMP15]], i64 [[TMP14]]201; NO-VP-NEXT: [[REVERSE:%.*]] = call <vscale x 4 x i1> @llvm.vector.reverse.nxv4i1(<vscale x 4 x i1> [[TMP10]])202; NO-VP-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr align 4 [[TMP16]], <vscale x 4 x i1> [[REVERSE]], <vscale x 4 x i32> poison)203; NO-VP-NEXT: [[REVERSE2:%.*]] = call <vscale x 4 x i32> @llvm.vector.reverse.nxv4i32(<vscale x 4 x i32> [[WIDE_MASKED_LOAD]])204; NO-VP-NEXT: [[TMP17:%.*]] = getelementptr i32, ptr [[PTR2:%.*]], i64 [[TMP8]]205; NO-VP-NEXT: [[TMP18:%.*]] = mul i64 0, [[TMP3]]206; NO-VP-NEXT: [[TMP19:%.*]] = sub i64 [[TMP3]], 1207; NO-VP-NEXT: [[TMP20:%.*]] = mul i64 -1, [[TMP19]]208; NO-VP-NEXT: [[TMP21:%.*]] = getelementptr i32, ptr [[TMP17]], i64 [[TMP18]]209; NO-VP-NEXT: [[TMP22:%.*]] = getelementptr i32, ptr [[TMP21]], i64 [[TMP20]]210; NO-VP-NEXT: [[REVERSE3:%.*]] = call <vscale x 4 x i1> @llvm.vector.reverse.nxv4i1(<vscale x 4 x i1> [[TMP10]])211; NO-VP-NEXT: [[REVERSE4:%.*]] = call <vscale x 4 x i32> @llvm.vector.reverse.nxv4i32(<vscale x 4 x i32> [[REVERSE2]])212; NO-VP-NEXT: call void @llvm.masked.store.nxv4i32.p0(<vscale x 4 x i32> [[REVERSE4]], ptr align 4 [[TMP22]], <vscale x 4 x i1> [[REVERSE3]])213; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]214; NO-VP-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]215; NO-VP-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]216; NO-VP: middle.block:217; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]218; NO-VP-NEXT: br i1 [[CMP_N]], label [[LOOPEND:%.*]], label [[ENTRY]]219; NO-VP: scalar.ph:220; NO-VP-NEXT: [[STARTVAL:%.*]] = phi i64 [ [[TMP6]], [[MIDDLE_BLOCK]] ], [ [[STARTVAL1]], [[ENTRY1:%.*]] ]221; NO-VP-NEXT: [[BC_RESUME_VAL5:%.*]] = phi i32 [ [[TMP7]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY1]] ]222; NO-VP-NEXT: br label [[FOR_BODY1:%.*]]223; NO-VP: for.body:224; NO-VP-NEXT: [[ADD_PHI:%.*]] = phi i64 [ [[STARTVAL]], [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_INC:%.*]] ]225; NO-VP-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL5]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_INC]] ]226; NO-VP-NEXT: [[ADD]] = add i64 [[ADD_PHI]], -1227; NO-VP-NEXT: [[GEPL:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i32 [[I]]228; NO-VP-NEXT: [[TMP:%.*]] = load i32, ptr [[GEPL]], align 4229; NO-VP-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP]], 100230; NO-VP-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[FOR_INC]]231; NO-VP: if.then:232; NO-VP-NEXT: [[GEPL1:%.*]] = getelementptr inbounds i32, ptr [[PTR1]], i64 [[ADD]]233; NO-VP-NEXT: [[V:%.*]] = load i32, ptr [[GEPL1]], align 4234; NO-VP-NEXT: [[GEPS:%.*]] = getelementptr inbounds i32, ptr [[PTR2]], i64 [[ADD]]235; NO-VP-NEXT: store i32 [[V]], ptr [[GEPS]], align 4236; NO-VP-NEXT: br label [[FOR_INC]]237; NO-VP: for.inc:238; NO-VP-NEXT: [[INC]] = add i32 [[I]], 1239; NO-VP-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], 1024240; NO-VP-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY1]], label [[LOOPEND]], !llvm.loop [[LOOP5:![0-9]+]]241; NO-VP: loopend:242; NO-VP-NEXT: ret void243;244entry:245 br label %for.body246 247for.body:248 %add.phi = phi i64 [ %startval, %entry ], [ %add, %for.inc ]249 %i = phi i32 [ 0, %entry ], [ %inc, %for.inc ]250 %add = add i64 %add.phi, -1251 %gepl = getelementptr inbounds i32, ptr %ptr, i32 %i252 %tmp = load i32, ptr %gepl, align 4253 %cmp1 = icmp slt i32 %tmp, 100254 br i1 %cmp1, label %if.then, label %for.inc255 256if.then:257 %gepl1 = getelementptr inbounds i32, ptr %ptr1, i64 %add258 %v = load i32, ptr %gepl1, align 4259 %geps = getelementptr inbounds i32, ptr %ptr2, i64 %add260 store i32 %v, ptr %geps, align 4261 br label %for.inc262 263for.inc:264 %inc = add i32 %i, 1265 %exitcond = icmp ne i32 %inc, 1024266 br i1 %exitcond, label %for.body, label %loopend267 268loopend:269 ret void270}271 272; From a miscompile originally reported at273; https://github.com/llvm/llvm-project/issues/122681274 275define void @multiple_reverse_vector_pointer(ptr noalias %a, ptr noalias %b, ptr noalias %c, ptr noalias %d) {276; IF-EVL-LABEL: @multiple_reverse_vector_pointer(277; IF-EVL-NEXT: entry:278; IF-EVL-NEXT: br label [[VECTOR_PH:%.*]]279; IF-EVL: vector.ph:280; IF-EVL-NEXT: br label [[VECTOR_BODY:%.*]]281; IF-EVL: vector.body:282; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], [[VECTOR_BODY]] ]283; IF-EVL-NEXT: [[AVL:%.*]] = phi i64 [ 1025, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]284; IF-EVL-NEXT: [[TMP6:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 16, i1 true)285; IF-EVL-NEXT: [[OFFSET_IDX:%.*]] = sub i64 1024, [[EVL_BASED_IV]]286; IF-EVL-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 [[OFFSET_IDX]]287; IF-EVL-NEXT: [[TMP9:%.*]] = zext i32 [[TMP6]] to i64288; IF-EVL-NEXT: [[TMP10:%.*]] = mul i64 0, [[TMP9]]289; IF-EVL-NEXT: [[TMP29:%.*]] = sub i64 [[TMP9]], 1290; IF-EVL-NEXT: [[TMP11:%.*]] = mul i64 -1, [[TMP29]]291; IF-EVL-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP8]], i64 [[TMP10]]292; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i64 [[TMP11]]293; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP6]])294; IF-EVL-NEXT: [[VP_REVERSE:%.*]] = call <vscale x 16 x i8> @llvm.experimental.vp.reverse.nxv16i8(<vscale x 16 x i8> [[VP_OP_LOAD]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP6]])295; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[B:%.*]], <vscale x 16 x i8> [[VP_REVERSE]]296; IF-EVL-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 16 x i8> @llvm.vp.gather.nxv16i8.nxv16p0(<vscale x 16 x ptr> align 1 [[TMP14]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP6]])297; IF-EVL-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[C:%.*]], i64 [[OFFSET_IDX]]298; IF-EVL-NEXT: [[TMP16:%.*]] = zext i32 [[TMP6]] to i64299; IF-EVL-NEXT: [[TMP17:%.*]] = mul i64 0, [[TMP16]]300; IF-EVL-NEXT: [[TMP30:%.*]] = sub i64 [[TMP16]], 1301; IF-EVL-NEXT: [[TMP18:%.*]] = mul i64 -1, [[TMP30]]302; IF-EVL-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP17]]303; IF-EVL-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP19]], i64 [[TMP18]]304; IF-EVL-NEXT: [[VP_REVERSE1:%.*]] = call <vscale x 16 x i8> @llvm.experimental.vp.reverse.nxv16i8(<vscale x 16 x i8> [[WIDE_MASKED_GATHER]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP6]])305; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_REVERSE1]], ptr align 1 [[TMP20]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP6]])306; IF-EVL-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr [[D:%.*]], i64 [[OFFSET_IDX]]307; IF-EVL-NEXT: [[TMP22:%.*]] = zext i32 [[TMP6]] to i64308; IF-EVL-NEXT: [[TMP23:%.*]] = mul i64 0, [[TMP22]]309; IF-EVL-NEXT: [[TMP31:%.*]] = sub i64 [[TMP22]], 1310; IF-EVL-NEXT: [[TMP24:%.*]] = mul i64 -1, [[TMP31]]311; IF-EVL-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP21]], i64 [[TMP23]]312; IF-EVL-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i64 [[TMP24]]313; IF-EVL-NEXT: [[VP_REVERSE2:%.*]] = call <vscale x 16 x i8> @llvm.experimental.vp.reverse.nxv16i8(<vscale x 16 x i8> [[WIDE_MASKED_GATHER]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP6]])314; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_REVERSE2]], ptr align 1 [[TMP26]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP6]])315; IF-EVL-NEXT: [[TMP27:%.*]] = zext i32 [[TMP6]] to i64316; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP27]], [[EVL_BASED_IV]]317; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP27]]318; IF-EVL-NEXT: [[TMP32:%.*]] = icmp eq i64 [[AVL_NEXT]], 0319; IF-EVL-NEXT: br i1 [[TMP32]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]320; IF-EVL: middle.block:321; IF-EVL-NEXT: br label [[LOOP:%.*]]322; IF-EVL: exit:323; IF-EVL-NEXT: ret void324;325; NO-VP-LABEL: @multiple_reverse_vector_pointer(326; NO-VP-NEXT: entry:327; NO-VP-NEXT: br label [[VECTOR_PH:%.*]]328; NO-VP: vector.ph:329; NO-VP-NEXT: br label [[LOOP:%.*]]330; NO-VP: vector.body:331; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[LOOP]] ]332; NO-VP-NEXT: [[OFFSET_IDX:%.*]] = sub i64 1024, [[INDEX]]333; NO-VP-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 [[OFFSET_IDX]]334; NO-VP-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i64 0335; NO-VP-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i64 -15336; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1337; NO-VP-NEXT: [[REVERSE:%.*]] = shufflevector <16 x i8> [[WIDE_LOAD]], <16 x i8> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>338; NO-VP-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[B:%.*]], <16 x i8> [[REVERSE]]339; NO-VP-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <16 x i8> @llvm.masked.gather.v16i8.v16p0(<16 x ptr> align 1 [[TMP3]], <16 x i1> splat (i1 true), <16 x i8> poison)340; NO-VP-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[C:%.*]], i64 [[OFFSET_IDX]]341; NO-VP-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP4]], i64 0342; NO-VP-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP5]], i64 -15343; NO-VP-NEXT: [[REVERSE1:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_GATHER]], <16 x i8> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>344; NO-VP-NEXT: store <16 x i8> [[REVERSE1]], ptr [[TMP6]], align 1345; NO-VP-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[D:%.*]], i64 [[OFFSET_IDX]]346; NO-VP-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP7]], i64 0347; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP8]], i64 -15348; NO-VP-NEXT: store <16 x i8> [[REVERSE1]], ptr [[TMP9]], align 1349; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16350; NO-VP-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024351; NO-VP-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[LOOP]], !llvm.loop [[LOOP6:![0-9]+]]352; NO-VP: middle.block:353; NO-VP-NEXT: br label [[SCALAR_PH:%.*]]354; NO-VP: scalar.ph:355; NO-VP-NEXT: br label [[LOOP1:%.*]]356; NO-VP: loop:357; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP1]] ]358; NO-VP-NEXT: [[GEP_A:%.*]] = getelementptr i8, ptr [[A]], i64 [[IV]]359; NO-VP-NEXT: [[X:%.*]] = load i8, ptr [[GEP_A]], align 1360; NO-VP-NEXT: [[GEP_B:%.*]] = getelementptr i8, ptr [[B]], i8 [[X]]361; NO-VP-NEXT: [[Y:%.*]] = load i8, ptr [[GEP_B]], align 1362; NO-VP-NEXT: [[GEP_C:%.*]] = getelementptr i8, ptr [[C]], i64 [[IV]]363; NO-VP-NEXT: store i8 [[Y]], ptr [[GEP_C]], align 1364; NO-VP-NEXT: [[GEP_D:%.*]] = getelementptr i8, ptr [[D]], i64 [[IV]]365; NO-VP-NEXT: store i8 [[Y]], ptr [[GEP_D]], align 1366; NO-VP-NEXT: [[IV_NEXT]] = add i64 [[IV]], -1367; NO-VP-NEXT: [[CMP_NOT:%.*]] = icmp eq i64 [[IV]], 0368; NO-VP-NEXT: br i1 [[CMP_NOT]], label [[EXIT:%.*]], label [[LOOP1]], !llvm.loop [[LOOP7:![0-9]+]]369; NO-VP: exit:370; NO-VP-NEXT: ret void371;372entry:373 br label %loop374 375loop:376 %iv = phi i64 [ 1024, %entry ], [ %iv.next, %loop ]377 378 %gep.a = getelementptr i8, ptr %a, i64 %iv379 %x = load i8, ptr %gep.a380 381 %gep.b = getelementptr i8, ptr %b, i8 %x382 %y = load i8, ptr %gep.b383 384 %gep.c = getelementptr i8, ptr %c, i64 %iv385 store i8 %y, ptr %gep.c386 387 %gep.d = getelementptr i8, ptr %d, i64 %iv388 store i8 %y, ptr %gep.d389 390 %iv.next = add i64 %iv, -1391 %cmp.not = icmp eq i64 %iv, 0392 br i1 %cmp.not, label %exit, label %loop393 394exit:395 ret void396}397