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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -p loop-vectorize -mattr=+v -S %s | FileCheck %s3 4target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"5target triple = "riscv64-unknown-linux-gnu"6 7define void @test_pr98413_zext_removed(ptr %src, ptr noalias %dst, i64 %x) {8; CHECK-LABEL: define void @test_pr98413_zext_removed(9; CHECK-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]], i64 [[X:%.*]]) #[[ATTR0:[0-9]+]] {10; CHECK-NEXT: [[ENTRY:.*:]]11; CHECK-NEXT: br label %[[VECTOR_PH:.*]]12; CHECK: [[VECTOR_PH]]:13; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 8 x i64> poison, i64 [[X]], i64 014; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 8 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer15; CHECK-NEXT: [[TMP6:%.*]] = trunc <vscale x 8 x i64> [[BROADCAST_SPLAT]] to <vscale x 8 x i8>16; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]17; CHECK: [[VECTOR_BODY]]:18; CHECK-NEXT: [[TMP7:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]19; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 97, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]20; CHECK-NEXT: [[TMP13:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 8, i1 true)21; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i16, ptr [[SRC]], i64 [[TMP7]]22; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 8 x i16> @llvm.vp.load.nxv8i16.p0(ptr align 8 [[TMP8]], <vscale x 8 x i1> splat (i1 true), i32 [[TMP13]])23; CHECK-NEXT: [[TMP10:%.*]] = trunc <vscale x 8 x i16> [[WIDE_LOAD]] to <vscale x 8 x i8>24; CHECK-NEXT: [[TMP11:%.*]] = and <vscale x 8 x i8> [[TMP6]], [[TMP10]]25; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr [[DST]], i64 [[TMP7]]26; CHECK-NEXT: call void @llvm.vp.store.nxv8i8.p0(<vscale x 8 x i8> [[TMP11]], ptr align 1 [[TMP12]], <vscale x 8 x i1> splat (i1 true), i32 [[TMP13]])27; CHECK-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i6428; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP14]], [[TMP7]]29; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP14]]30; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[AVL_NEXT]], 031; CHECK-NEXT: br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]32; CHECK: [[MIDDLE_BLOCK]]:33; CHECK-NEXT: br label %[[EXIT:.*]]34; CHECK: [[EXIT]]:35; CHECK-NEXT: ret void36;37entry:38 br label %loop39 40loop:41 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]42 %gep.src = getelementptr inbounds i16, ptr %src, i64 %iv43 %l = load i16, ptr %gep.src, align 844 %ext.l = zext i16 %l to i6445 %and = and i64 %x, %ext.l46 %trunc.and = trunc i64 %and to i847 %gep.dst = getelementptr inbounds i8, ptr %dst, i64 %iv48 store i8 %trunc.and, ptr %gep.dst, align 149 %iv.next = add i64 %iv, 150 %exitcond.not = icmp eq i64 %iv, 9651 br i1 %exitcond.not, label %exit, label %loop52 53exit:54 ret void55}56 57define void @test_pr98413_sext_removed(ptr %src, ptr noalias %dst, i64 %x) {58; CHECK-LABEL: define void @test_pr98413_sext_removed(59; CHECK-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]], i64 [[X:%.*]]) #[[ATTR0]] {60; CHECK-NEXT: [[ENTRY:.*:]]61; CHECK-NEXT: br label %[[VECTOR_PH:.*]]62; CHECK: [[VECTOR_PH]]:63; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 8 x i64> poison, i64 [[X]], i64 064; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 8 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer65; CHECK-NEXT: [[TMP6:%.*]] = trunc <vscale x 8 x i64> [[BROADCAST_SPLAT]] to <vscale x 8 x i8>66; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]67; CHECK: [[VECTOR_BODY]]:68; CHECK-NEXT: [[TMP7:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]69; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 97, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]70; CHECK-NEXT: [[TMP13:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 8, i1 true)71; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i16, ptr [[SRC]], i64 [[TMP7]]72; CHECK-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 8 x i16> @llvm.vp.load.nxv8i16.p0(ptr align 8 [[TMP8]], <vscale x 8 x i1> splat (i1 true), i32 [[TMP13]])73; CHECK-NEXT: [[TMP10:%.*]] = trunc <vscale x 8 x i16> [[WIDE_LOAD]] to <vscale x 8 x i8>74; CHECK-NEXT: [[TMP11:%.*]] = and <vscale x 8 x i8> [[TMP6]], [[TMP10]]75; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr [[DST]], i64 [[TMP7]]76; CHECK-NEXT: call void @llvm.vp.store.nxv8i8.p0(<vscale x 8 x i8> [[TMP11]], ptr align 1 [[TMP12]], <vscale x 8 x i1> splat (i1 true), i32 [[TMP13]])77; CHECK-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i6478; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP14]], [[TMP7]]79; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP14]]80; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[AVL_NEXT]], 081; CHECK-NEXT: br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]82; CHECK: [[MIDDLE_BLOCK]]:83; CHECK-NEXT: br label %[[EXIT:.*]]84; CHECK: [[EXIT]]:85; CHECK-NEXT: ret void86;87entry:88 br label %loop89 90loop:91 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]92 %gep.src = getelementptr inbounds i16, ptr %src, i64 %iv93 %l = load i16, ptr %gep.src, align 894 %ext.l = sext i16 %l to i6495 %and = and i64 %x, %ext.l96 %trunc.and = trunc i64 %and to i897 %gep.dst = getelementptr inbounds i8, ptr %dst, i64 %iv98 store i8 %trunc.and, ptr %gep.dst, align 199 %iv.next = add i64 %iv, 1100 %exitcond.not = icmp eq i64 %iv, 96101 br i1 %exitcond.not, label %exit, label %loop102 103exit:104 ret void105}106 107; Test case for https://github.com/llvm/llvm-project/issues/106641.108define void @truncate_to_i1_used_by_branch(i8 %x, ptr %dst) #0 {109; CHECK-LABEL: define void @truncate_to_i1_used_by_branch(110; CHECK-SAME: i8 [[X:%.*]], ptr [[DST:%.*]]) #[[ATTR1:[0-9]+]] {111; CHECK-NEXT: [[ENTRY:.*:]]112; CHECK-NEXT: br label %[[VECTOR_PH:.*]]113; CHECK: [[VECTOR_PH]]:114; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 4 x ptr> poison, ptr [[DST]], i64 0115; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 4 x ptr> [[BROADCAST_SPLATINSERT1]], <vscale x 4 x ptr> poison, <vscale x 4 x i32> zeroinitializer116; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]117; CHECK: [[VECTOR_BODY]]:118; CHECK-NEXT: [[AVL:%.*]] = phi i32 [ 9, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]119; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.experimental.get.vector.length.i32(i32 [[AVL]], i32 4, i1 true)120; CHECK-NEXT: call void @llvm.vp.scatter.nxv4i8.nxv4p0(<vscale x 4 x i8> zeroinitializer, <vscale x 4 x ptr> align 1 [[BROADCAST_SPLAT2]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP6]])121; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i32 [[AVL]], [[TMP6]]122; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[AVL_NEXT]], 0123; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]124; CHECK: [[MIDDLE_BLOCK]]:125; CHECK-NEXT: br label %[[EXIT:.*]]126; CHECK: [[EXIT]]:127; CHECK-NEXT: ret void128;129entry:130 br label %loop.header131 132loop.header:133 %f.039 = phi i8 [ 0, %entry ], [ %add, %loop.latch ]134 %0 = or i8 23, %x135 %extract.t = trunc i8 %0 to i1136 br i1 %extract.t, label %then, label %loop.latch137 138then:139 store i8 0, ptr %dst, align 1140 br label %loop.latch141 142loop.latch:143 %add = add i8 %f.039, 1144 %conv = sext i8 %f.039 to i32145 %cmp = icmp slt i32 %conv, 8146 br i1 %cmp, label %loop.header, label %exit147 148exit:149 ret void150}151 152; Test case for https://github.com/llvm/llvm-project/issues/107171.153define i8 @icmp_ops_narrowed_to_i1() #1 {154; CHECK-LABEL: define i8 @icmp_ops_narrowed_to_i1(155; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {156; CHECK-NEXT: [[ENTRY:.*]]:157; CHECK-NEXT: br label %[[LOOP:.*]]158; CHECK: [[LOOP]]:159; CHECK-NEXT: [[IV:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]160; CHECK-NEXT: [[C:%.*]] = icmp eq i8 0, 0161; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[C]] to i64162; CHECK-NEXT: [[SHR:%.*]] = lshr i64 [[EXT]], 1163; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[SHR]] to i8164; CHECK-NEXT: [[IV_NEXT]] = add i16 [[IV]], 1165; CHECK-NEXT: [[EC:%.*]] = icmp eq i16 [[IV_NEXT]], 100166; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]167; CHECK: [[EXIT]]:168; CHECK-NEXT: [[TRUNC_LCSSA:%.*]] = phi i8 [ [[TRUNC]], %[[LOOP]] ]169; CHECK-NEXT: ret i8 [[TRUNC_LCSSA]]170;171entry:172 br label %loop173 174loop:175 %iv = phi i16 [ 0, %entry ], [ %iv.next, %loop ]176 %c = icmp eq i8 0, 0177 %ext = zext i1 %c to i64178 %shr = lshr i64 %ext, 1179 %trunc = trunc i64 %shr to i8180 %iv.next = add i16 %iv, 1181 %ec = icmp eq i16 %iv.next, 100182 br i1 %ec, label %exit, label %loop183 184exit:185 ret i8 %trunc186}187 188define void @icmp_only_first_op_truncated(ptr noalias %dst, i32 %x, i64 %N, i64 %v, ptr noalias %src) #1 {189; CHECK-LABEL: define void @icmp_only_first_op_truncated(190; CHECK-SAME: ptr noalias [[DST:%.*]], i32 [[X:%.*]], i64 [[N:%.*]], i64 [[V:%.*]], ptr noalias [[SRC:%.*]]) #[[ATTR2]] {191; CHECK-NEXT: [[ENTRY:.*:]]192; CHECK-NEXT: [[T:%.*]] = trunc i64 [[N]] to i32193; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[V]], 1194; CHECK-NEXT: br label %[[VECTOR_PH:.*]]195; CHECK: [[VECTOR_PH]]:196; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[N]], i64 0197; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer198; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[T]], i64 0199; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x i32> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer200; CHECK-NEXT: [[TMP7:%.*]] = trunc <vscale x 2 x i64> [[BROADCAST_SPLAT]] to <vscale x 2 x i32>201; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <vscale x 2 x i32> [[TMP7]], [[BROADCAST_SPLAT2]]202; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[X]] to i64203; CHECK-NEXT: [[TMP10:%.*]] = getelementptr double, ptr [[SRC]], i64 [[TMP9]]204; CHECK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[TMP10]], i64 0205; CHECK-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT6]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer206; CHECK-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[DST]], i64 0207; CHECK-NEXT: [[BROADCAST_SPLAT6:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT3]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer208; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]209; CHECK: [[VECTOR_BODY]]:210; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[TMP0]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]211; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)212; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x double> @llvm.vp.gather.nxv2f64.nxv2p0(<vscale x 2 x ptr> align 8 [[BROADCAST_SPLAT4]], <vscale x 2 x i1> [[TMP8]], i32 [[TMP14]])213; CHECK-NEXT: call void @llvm.vp.scatter.nxv2f64.nxv2p0(<vscale x 2 x double> [[WIDE_MASKED_GATHER]], <vscale x 2 x ptr> align 8 [[BROADCAST_SPLAT6]], <vscale x 2 x i1> [[TMP8]], i32 [[TMP14]])214; CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[TMP14]] to i64215; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP11]]216; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[AVL_NEXT]], 0217; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]218; CHECK: [[MIDDLE_BLOCK]]:219; CHECK-NEXT: br label %[[EXIT:.*]]220; CHECK: [[EXIT]]:221; CHECK-NEXT: ret void222;223entry:224 %t = trunc i64 %N to i32225 br label %loop.header226 227loop.header:228 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]229 %t1 = trunc i64 %N to i32230 %c = icmp eq i32 %t1, %t231 br i1 %c, label %then, label %loop.latch232 233then:234 %idxprom = zext i32 %x to i64235 %arrayidx = getelementptr double, ptr %src, i64 %idxprom236 %retval = load double, ptr %arrayidx, align 8237 store double %retval, ptr %dst, align 8238 br label %loop.latch239 240loop.latch:241 %iv.next = add i64 %iv, 1242 %ec = icmp eq i64 %iv, %v243 br i1 %ec, label %exit, label %loop.header244 245exit:246 ret void247}248 249; Test for https://github.com/llvm/llvm-project/issues/162688.250define void @test_minbws_for_trunc(i32 %n, ptr noalias %p1, ptr noalias %p2) {251; CHECK-LABEL: define void @test_minbws_for_trunc(252; CHECK-SAME: i32 [[N:%.*]], ptr noalias [[P1:%.*]], ptr noalias [[P2:%.*]]) #[[ATTR0]] {253; CHECK-NEXT: [[ENTRY:.*]]:254; CHECK-NEXT: br label %[[LOOP:.*]]255; CHECK: [[LOOP]]:256; CHECK-NEXT: [[IV:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]257; CHECK-NEXT: [[IV_EXT:%.*]] = sext i16 [[IV]] to i64258; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, ptr [[P1]], i64 [[IV_EXT]]259; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[GEP1]], align 4260; CHECK-NEXT: [[V1_TRUNC:%.*]] = trunc i32 [[V1]] to i16261; CHECK-NEXT: [[GEP2:%.*]] = getelementptr [1 x [1 x i16]], ptr [[P2]], i64 [[IV_EXT]]262; CHECK-NEXT: store i16 [[V1_TRUNC]], ptr [[GEP2]], align 2263; CHECK-NEXT: [[V1_TRUNC_I8:%.*]] = trunc i32 [[V1]] to i8264; CHECK-NEXT: [[GEP3:%.*]] = getelementptr i8, ptr [[P2]], i64 [[IV_EXT]]265; CHECK-NEXT: store i8 [[V1_TRUNC_I8]], ptr [[GEP3]], align 1266; CHECK-NEXT: [[GEP4:%.*]] = getelementptr [1 x i64], ptr [[P2]], i64 [[IV_EXT]]267; CHECK-NEXT: store i64 0, ptr [[GEP4]], align 8268; CHECK-NEXT: [[IV_NEXT]] = add i16 [[IV]], 4269; CHECK-NEXT: [[IV_NEXT_EXT:%.*]] = sext i16 [[IV_NEXT]] to i32270; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[IV_NEXT_EXT]], 1024271; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[EXIT:.*]]272; CHECK: [[EXIT]]:273; CHECK-NEXT: ret void274;275entry:276 br label %loop277 278loop:279 %iv = phi i16 [ 0, %entry ], [ %iv.next, %loop ]280 %iv.ext = sext i16 %iv to i64281 %gep1 = getelementptr i32, ptr %p1, i64 %iv.ext282 %v1 = load i32, ptr %gep1, align 4283 %v1.trunc = trunc i32 %v1 to i16284 %gep2 = getelementptr [1 x [1 x i16]], ptr %p2, i64 %iv.ext285 store i16 %v1.trunc, ptr %gep2, align 2286 %v1.trunc.i8 = trunc i32 %v1 to i8287 %gep3 = getelementptr i8, ptr %p2, i64 %iv.ext288 store i8 %v1.trunc.i8, ptr %gep3, align 1289 %gep4 = getelementptr [1 x i64], ptr %p2, i64 %iv.ext290 store i64 0, ptr %gep4, align 8291 %iv.next = add i16 %iv, 4292 %iv.next.ext = sext i16 %iv.next to i32293 %cmp = icmp ne i32 %iv.next.ext, 1024294 br i1 %cmp, label %loop, label %exit295 296exit:297 ret void298}299 300attributes #0 = { "target-features"="+64bit,+v,+zvl256b" }301attributes #1 = { "target-features"="+64bit,+v" }302 303;.304; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}305; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}306; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}307; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}308; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}309; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}310;.311