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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -p loop-vectorize -mtriple=s390x-unknown-linux -mcpu=z16 -S %s | FileCheck %s3 4target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"5 6@src = external global [8 x i32], align 47 8; Test case where scalar steps are used by both a VPReplicateRecipe (demands9; all scalar lanes) and a VPInstruction that only demands the first lane.10; Test case for https://github.com/llvm/llvm-project/issues/88849.11define void @test_scalar_iv_steps_used_by_replicate_and_first_lane_only_vpinst(ptr noalias %dst, ptr noalias %src.1) {12; CHECK-LABEL: define void @test_scalar_iv_steps_used_by_replicate_and_first_lane_only_vpinst(13; CHECK-SAME: ptr noalias [[DST:%.*]], ptr noalias [[SRC_1:%.*]]) #[[ATTR0:[0-9]+]] {14; CHECK-NEXT: [[ENTRY:.*:]]15; CHECK-NEXT: br label %[[VECTOR_PH:.*]]16; CHECK: [[VECTOR_PH]]:17; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]18; CHECK: [[VECTOR_BODY]]:19; CHECK-NEXT: [[TMP3:%.*]] = mul nsw i64 0, 420; CHECK-NEXT: [[TMP4:%.*]] = mul nsw i64 1, 421; CHECK-NEXT: [[TMP2:%.*]] = mul nsw i64 2, 422; CHECK-NEXT: [[TMP15:%.*]] = mul nsw i64 3, 423; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr [[SRC_1]], i64 [[TMP3]]24; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[SRC_1]], i64 [[TMP4]]25; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[SRC_1]], i64 [[TMP2]]26; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, ptr [[SRC_1]], i64 [[TMP15]]27; CHECK-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP8]], align 128; CHECK-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 129; CHECK-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP6]], align 130; CHECK-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP7]], align 131; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i8> poison, i8 [[TMP12]], i32 032; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i8> [[TMP16]], i8 [[TMP9]], i32 133; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i8> [[TMP13]], i8 [[TMP10]], i32 234; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i8> [[TMP14]], i8 [[TMP11]], i32 335; CHECK-NEXT: [[TMP20:%.*]] = icmp eq <4 x i8> [[TMP19]], zeroinitializer36; CHECK-NEXT: [[TMP22:%.*]] = getelementptr [8 x i32], ptr @src, i64 0, i64 437; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP22]], align 438; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i1> [[TMP20]], i32 039; CHECK-NEXT: br i1 [[TMP24]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]40; CHECK: [[PRED_STORE_IF]]:41; CHECK-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 042; CHECK-NEXT: store i32 [[TMP25]], ptr [[DST]], align 443; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]44; CHECK: [[PRED_STORE_CONTINUE]]:45; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x i1> [[TMP20]], i32 146; CHECK-NEXT: br i1 [[TMP26]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]47; CHECK: [[PRED_STORE_IF1]]:48; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 149; CHECK-NEXT: store i32 [[TMP27]], ptr [[DST]], align 450; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE2]]51; CHECK: [[PRED_STORE_CONTINUE2]]:52; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i1> [[TMP20]], i32 253; CHECK-NEXT: br i1 [[TMP28]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]54; CHECK: [[PRED_STORE_IF3]]:55; CHECK-NEXT: [[TMP29:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 256; CHECK-NEXT: store i32 [[TMP29]], ptr [[DST]], align 457; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE4]]58; CHECK: [[PRED_STORE_CONTINUE4]]:59; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP20]], i32 360; CHECK-NEXT: br i1 [[TMP30]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]]61; CHECK: [[PRED_STORE_IF5]]:62; CHECK-NEXT: [[TMP31:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 363; CHECK-NEXT: store i32 [[TMP31]], ptr [[DST]], align 464; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE6]]65; CHECK: [[PRED_STORE_CONTINUE6]]:66; CHECK-NEXT: br label %[[MIDDLE_BLOCK:.*]]67; CHECK: [[MIDDLE_BLOCK]]:68; CHECK-NEXT: br label %[[EXIT:.*]]69; CHECK: [[EXIT]]:70; CHECK-NEXT: ret void71;72entry:73 br label %loop.header74 75loop.header:76 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]77 %mul.iv = mul nsw i64 %iv, 478 %gep.src.1 = getelementptr inbounds i8, ptr %src.1, i64 %mul.iv79 %l.1 = load i8, ptr %gep.src.1, align 180 %c = icmp eq i8 %l.1, 081 br i1 %c, label %then, label %loop.latch82 83then:84 %iv.or = or disjoint i64 %iv, 485 %gep.src = getelementptr inbounds [8 x i32], ptr @src, i64 0, i64 %iv.or86 %l.2 = load i32, ptr %gep.src, align 487 store i32 %l.2, ptr %dst, align 488 br label %loop.latch89 90loop.latch:91 %iv.next = add nuw nsw i64 %iv, 192 %ec = icmp eq i64 %iv.next, 493 br i1 %ec, label %exit, label %loop.header94 95exit:96 ret void97}98