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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S -passes=loop-vectorize -mtriple=s390x-linux-gnu -vectorizer-min-trip-count=8 < %s | FileCheck %s3 4define i32 @main(i32 %arg, ptr nocapture readnone %arg1) #0 {5; CHECK-LABEL: define i32 @main(6; CHECK-SAME: i32 [[ARG:%.*]], ptr readnone captures(none) [[ARG1:%.*]]) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[ENTRY:.*]]:8; CHECK-NEXT: [[TMP0:%.*]] = alloca i8, align 19; CHECK-NEXT: br label %[[LOOP:.*]]10; CHECK: [[LOOP]]:11; CHECK-NEXT: [[STOREMERGE_I_I:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[TMP12_I_I:%.*]], %[[LOOP]] ]12; CHECK-NEXT: store i8 [[STOREMERGE_I_I]], ptr [[TMP0]], align 213; CHECK-NEXT: [[TMP8_I_I:%.*]] = icmp ult i8 [[STOREMERGE_I_I]], 814; CHECK-NEXT: [[TMP12_I_I]] = add nuw nsw i8 [[STOREMERGE_I_I]], 115; CHECK-NEXT: br i1 [[TMP8_I_I]], label %[[LOOP]], label %[[RET:.*]]16; CHECK: [[RET]]:17; CHECK-NEXT: ret i32 018;19entry:20 %0 = alloca i8, align 121 br label %loop22 23loop:24 %storemerge.i.i = phi i8 [ 0, %entry ], [ %tmp12.i.i, %loop ]25 store i8 %storemerge.i.i, ptr %0, align 226 %tmp8.i.i = icmp ult i8 %storemerge.i.i, 827 %tmp12.i.i = add nuw nsw i8 %storemerge.i.i, 128 br i1 %tmp8.i.i, label %loop, label %ret29 30ret:31 ret i32 032}33 34attributes #0 = { "target-cpu"="z13" }35 36