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1; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -mattr=avx -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF42; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -mattr=avx -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF23; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -mattr=+avx512f -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF84; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize -force-vector-width=16 -force-vector-interleave=1 -mattr=+avx512f -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF165 6target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"7target triple = "x86_64-unknown-linux-gnu"8 9declare double @sin(double) #010declare float @sinf(float) #011declare double @llvm.sin.f64(double) #012declare float @llvm.sin.f32(float) #013 14declare double @cos(double) #015declare float @cosf(float) #016declare double @llvm.cos.f64(double) #017declare float @llvm.cos.f32(float) #018 19declare double @tan(double) #020declare float @tanf(float) #021declare double @llvm.tan.f64(double) #022declare float @llvm.tan.f32(float) #023 24declare double @acos(double) #025declare float @acosf(float) #026declare double @llvm.acos.f64(double) #027declare float @llvm.acos.f32(float) #028 29declare double @asin(double) #030declare float @asinf(float) #031declare double @llvm.asin.f64(double) #032declare float @llvm.asin.f32(float) #033 34declare double @atan(double) #035declare float @atanf(float) #036declare double @llvm.atan.f64(double) #037declare float @llvm.atan.f32(float) #038 39declare double @sinh(double) #040declare float @sinhf(float) #041declare double @llvm.sinh.f64(double) #042declare float @llvm.sinh.f32(float) #043 44declare double @cosh(double) #045declare float @coshf(float) #046declare double @llvm.cosh.f64(double) #047declare float @llvm.cosh.f32(float) #048 49declare double @tanh(double) #050declare float @tanhf(float) #051declare double @llvm.tanh.f64(double) #052declare float @llvm.tanh.f32(float) #053 54declare double @pow(double, double) #055declare float @powf(float, float) #056declare double @llvm.pow.f64(double, double) #057declare float @llvm.pow.f32(float, float) #058 59declare double @exp(double) #060declare float @expf(float) #061declare double @llvm.exp.f64(double) #062declare float @llvm.exp.f32(float) #063 64declare double @log(double) #065declare float @logf(float) #066declare double @llvm.log.f64(double) #067declare float @llvm.log.f32(float) #068 69declare double @log2(double) #070declare float @log2f(float) #071declare double @llvm.log2.f64(double) #072declare float @llvm.log2.f32(float) #073 74declare double @log10(double) #075declare float @log10f(float) #076declare double @llvm.log10.f64(double) #077declare float @llvm.log10.f32(float) #078 79declare double @sqrt(double) #080declare float @sqrtf(float) #081 82declare double @exp2(double) #083declare float @exp2f(float) #084declare double @llvm.exp2.f64(double) #085declare float @llvm.exp2.f32(float) #086 87define void @sin_f64(ptr nocapture %varray) {88; CHECK-LABEL: @sin_f64(89; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_sin(<2 x double> [[TMP4:%.*]])90; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_sin(<4 x double> [[TMP4:%.*]])91; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_sin(<8 x double> [[TMP4:%.*]])92; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.sin.v16f64(<16 x double> [[TMP4:%.*]])93; CHECK: ret void94;95entry:96 br label %for.body97 98for.body:99 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]100 %tmp = trunc i64 %iv to i32101 %conv = sitofp i32 %tmp to double102 %call = tail call double @sin(double %conv)103 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv104 store double %call, ptr %arrayidx, align 4105 %iv.next = add nuw nsw i64 %iv, 1106 %exitcond = icmp eq i64 %iv.next, 1000107 br i1 %exitcond, label %for.end, label %for.body108 109for.end:110 ret void111}112 113define void @sin_f32(ptr nocapture %varray) {114; CHECK-LABEL: @sin_f32(115; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP4:%.*]])116; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_sinf(<4 x float> [[TMP4:%.*]])117; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_sinf(<8 x float> [[TMP4:%.*]])118; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_sinf(<16 x float> [[TMP4:%.*]])119; CHECK: ret void120;121entry:122 br label %for.body123 124for.body:125 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]126 %tmp = trunc i64 %iv to i32127 %conv = sitofp i32 %tmp to float128 %call = tail call float @sinf(float %conv)129 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv130 store float %call, ptr %arrayidx, align 4131 %iv.next = add nuw nsw i64 %iv, 1132 %exitcond = icmp eq i64 %iv.next, 1000133 br i1 %exitcond, label %for.end, label %for.body134 135for.end:136 ret void137}138 139define void @sin_f64_intrinsic(ptr nocapture %varray) {140; CHECK-LABEL: @sin_f64_intrinsic(141; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_sin(<2 x double> [[TMP4:%.*]])142; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_sin(<4 x double> [[TMP4:%.*]])143; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_sin(<8 x double> [[TMP4:%.*]])144; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.sin.v16f64(<16 x double> [[TMP4:%.*]])145; CHECK: ret void146;147entry:148 br label %for.body149 150for.body:151 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]152 %tmp = trunc i64 %iv to i32153 %conv = sitofp i32 %tmp to double154 %call = tail call double @llvm.sin.f64(double %conv)155 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv156 store double %call, ptr %arrayidx, align 4157 %iv.next = add nuw nsw i64 %iv, 1158 %exitcond = icmp eq i64 %iv.next, 1000159 br i1 %exitcond, label %for.end, label %for.body160 161for.end:162 ret void163}164 165define void @sin_f32_intrinsic(ptr nocapture %varray) {166; CHECK-LABEL: @sin_f32_intrinsic(167; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP4:%.*]])168; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_sinf(<4 x float> [[TMP4:%.*]])169; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_sinf(<8 x float> [[TMP4:%.*]])170; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_sinf(<16 x float> [[TMP4:%.*]])171; CHECK: ret void172;173entry:174 br label %for.body175 176for.body:177 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]178 %tmp = trunc i64 %iv to i32179 %conv = sitofp i32 %tmp to float180 %call = tail call float @llvm.sin.f32(float %conv)181 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv182 store float %call, ptr %arrayidx, align 4183 %iv.next = add nuw nsw i64 %iv, 1184 %exitcond = icmp eq i64 %iv.next, 1000185 br i1 %exitcond, label %for.end, label %for.body186 187for.end:188 ret void189}190 191define void @cos_f64(ptr nocapture %varray) {192; CHECK-LABEL: @cos_f64(193; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_cos(<2 x double> [[TMP4:%.*]])194; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_cos(<4 x double> [[TMP4:%.*]])195; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_cos(<8 x double> [[TMP4:%.*]])196; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.cos.v16f64(<16 x double> [[TMP4:%.*]])197; CHECK: ret void198;199entry:200 br label %for.body201 202for.body:203 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]204 %tmp = trunc i64 %iv to i32205 %conv = sitofp i32 %tmp to double206 %call = tail call double @cos(double %conv)207 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv208 store double %call, ptr %arrayidx, align 4209 %iv.next = add nuw nsw i64 %iv, 1210 %exitcond = icmp eq i64 %iv.next, 1000211 br i1 %exitcond, label %for.end, label %for.body212 213for.end:214 ret void215}216 217define void @cos_f32(ptr nocapture %varray) {218; CHECK-LABEL: @cos_f32(219; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP4:%.*]])220; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_cosf(<4 x float> [[TMP4:%.*]])221; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_cosf(<8 x float> [[TMP4:%.*]])222; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_cosf(<16 x float> [[TMP4:%.*]])223; CHECK: ret void224;225entry:226 br label %for.body227 228for.body:229 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]230 %tmp = trunc i64 %iv to i32231 %conv = sitofp i32 %tmp to float232 %call = tail call float @cosf(float %conv)233 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv234 store float %call, ptr %arrayidx, align 4235 %iv.next = add nuw nsw i64 %iv, 1236 %exitcond = icmp eq i64 %iv.next, 1000237 br i1 %exitcond, label %for.end, label %for.body238 239for.end:240 ret void241}242 243define void @cos_f64_intrinsic(ptr nocapture %varray) {244; CHECK-LABEL: @cos_f64_intrinsic(245; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_cos(<2 x double> [[TMP4:%.*]])246; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_cos(<4 x double> [[TMP4:%.*]])247; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_cos(<8 x double> [[TMP4:%.*]])248; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.cos.v16f64(<16 x double> [[TMP4:%.*]])249; CHECK: ret void250;251entry:252 br label %for.body253 254for.body:255 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]256 %tmp = trunc i64 %iv to i32257 %conv = sitofp i32 %tmp to double258 %call = tail call double @llvm.cos.f64(double %conv)259 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv260 store double %call, ptr %arrayidx, align 4261 %iv.next = add nuw nsw i64 %iv, 1262 %exitcond = icmp eq i64 %iv.next, 1000263 br i1 %exitcond, label %for.end, label %for.body264 265for.end:266 ret void267}268 269define void @cos_f32_intrinsic(ptr nocapture %varray) {270; CHECK-LABEL: @cos_f32_intrinsic(271; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP4:%.*]])272; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_cosf(<4 x float> [[TMP4:%.*]])273; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_cosf(<8 x float> [[TMP4:%.*]])274; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_cosf(<16 x float> [[TMP4:%.*]])275; CHECK: ret void276;277entry:278 br label %for.body279 280for.body:281 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]282 %tmp = trunc i64 %iv to i32283 %conv = sitofp i32 %tmp to float284 %call = tail call float @llvm.cos.f32(float %conv)285 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv286 store float %call, ptr %arrayidx, align 4287 %iv.next = add nuw nsw i64 %iv, 1288 %exitcond = icmp eq i64 %iv.next, 1000289 br i1 %exitcond, label %for.end, label %for.body290 291for.end:292 ret void293}294 295define void @tan_f64(ptr nocapture %varray) {296; CHECK-LABEL: @tan_f64(297; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_tan(<2 x double> [[TMP4:%.*]])298; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_tan(<4 x double> [[TMP4:%.*]])299; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_tan(<8 x double> [[TMP4:%.*]])300; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.tan.v16f64(<16 x double> [[TMP4:%.*]])301; CHECK: ret void302;303entry:304 br label %for.body305 306for.body:307 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]308 %tmp = trunc i64 %iv to i32309 %conv = sitofp i32 %tmp to double310 %call = tail call double @tan(double %conv)311 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv312 store double %call, ptr %arrayidx, align 4313 %iv.next = add nuw nsw i64 %iv, 1314 %exitcond = icmp eq i64 %iv.next, 1000315 br i1 %exitcond, label %for.end, label %for.body316 317for.end:318 ret void319}320 321define void @tan_f32(ptr nocapture %varray) {322; CHECK-LABEL: @tan_f32(323; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP4:%.*]])324; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_tanf(<4 x float> [[TMP4:%.*]])325; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_tanf(<8 x float> [[TMP4:%.*]])326; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_tanf(<16 x float> [[TMP4:%.*]])327; CHECK: ret void328;329entry:330 br label %for.body331 332for.body:333 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]334 %tmp = trunc i64 %iv to i32335 %conv = sitofp i32 %tmp to float336 %call = tail call float @tanf(float %conv)337 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv338 store float %call, ptr %arrayidx, align 4339 %iv.next = add nuw nsw i64 %iv, 1340 %exitcond = icmp eq i64 %iv.next, 1000341 br i1 %exitcond, label %for.end, label %for.body342 343for.end:344 ret void345}346 347define void @tan_f64_intrinsic(ptr nocapture %varray) {348; CHECK-LABEL: @tan_f64_intrinsic(349; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_tan(<2 x double> [[TMP4:%.*]])350; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_tan(<4 x double> [[TMP4:%.*]])351; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_tan(<8 x double> [[TMP4:%.*]])352; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.tan.v16f64(<16 x double> [[TMP4:%.*]])353; CHECK: ret void354;355entry:356 br label %for.body357 358for.body:359 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]360 %tmp = trunc i64 %iv to i32361 %conv = sitofp i32 %tmp to double362 %call = tail call double @llvm.tan.f64(double %conv)363 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv364 store double %call, ptr %arrayidx, align 4365 %iv.next = add nuw nsw i64 %iv, 1366 %exitcond = icmp eq i64 %iv.next, 1000367 br i1 %exitcond, label %for.end, label %for.body368 369for.end:370 ret void371}372 373define void @tan_f32_intrinsic(ptr nocapture %varray) {374; CHECK-LABEL: @tan_f32_intrinsic(375; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP4:%.*]])376; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_tanf(<4 x float> [[TMP4:%.*]])377; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_tanf(<8 x float> [[TMP4:%.*]])378; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_tanf(<16 x float> [[TMP4:%.*]])379; CHECK: ret void380;381entry:382 br label %for.body383 384for.body:385 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]386 %tmp = trunc i64 %iv to i32387 %conv = sitofp i32 %tmp to float388 %call = tail call float @llvm.tan.f32(float %conv)389 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv390 store float %call, ptr %arrayidx, align 4391 %iv.next = add nuw nsw i64 %iv, 1392 %exitcond = icmp eq i64 %iv.next, 1000393 br i1 %exitcond, label %for.end, label %for.body394 395for.end:396 ret void397}398 399define void @acos_f64(ptr nocapture %varray) {400; CHECK-LABEL: @acos_f64(401; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @llvm.acos.v2f64(<2 x double> [[TMP4:%.*]])402; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.acos.v4f64(<4 x double> [[TMP4:%.*]])403; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.acos.v8f64(<8 x double> [[TMP4:%.*]])404; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.acos.v16f64(<16 x double> [[TMP4:%.*]])405; CHECK: ret void406;407entry:408 br label %for.body409 410for.body:411 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]412 %tmp = trunc i64 %iv to i32413 %conv = sitofp i32 %tmp to double414 %call = tail call double @acos(double %conv)415 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv416 store double %call, ptr %arrayidx, align 4417 %iv.next = add nuw nsw i64 %iv, 1418 %exitcond = icmp eq i64 %iv.next, 1000419 br i1 %exitcond, label %for.end, label %for.body420 421for.end:422 ret void423}424 425define void @acos_f32(ptr nocapture %varray) {426; CHECK-LABEL: @acos_f32(427; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.acos.v2f32(<2 x float> [[TMP4:%.*]])428; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_acosf(<4 x float> [[TMP4:%.*]])429; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_acosf(<8 x float> [[TMP4:%.*]])430; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_acosf(<16 x float> [[TMP4:%.*]])431; CHECK: ret void432;433entry:434 br label %for.body435 436for.body:437 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]438 %tmp = trunc i64 %iv to i32439 %conv = sitofp i32 %tmp to float440 %call = tail call float @acosf(float %conv)441 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv442 store float %call, ptr %arrayidx, align 4443 %iv.next = add nuw nsw i64 %iv, 1444 %exitcond = icmp eq i64 %iv.next, 1000445 br i1 %exitcond, label %for.end, label %for.body446 447for.end:448 ret void449}450 451define void @acos_f64_intrinsic(ptr nocapture %varray) {452; CHECK-LABEL: @acos_f64_intrinsic(453; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @llvm.acos.v2f64(<2 x double> [[TMP4:%.*]])454; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.acos.v4f64(<4 x double> [[TMP4:%.*]])455; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.acos.v8f64(<8 x double> [[TMP4:%.*]])456; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.acos.v16f64(<16 x double> [[TMP4:%.*]])457; CHECK: ret void458;459entry:460 br label %for.body461 462for.body:463 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]464 %tmp = trunc i64 %iv to i32465 %conv = sitofp i32 %tmp to double466 %call = tail call double @llvm.acos.f64(double %conv)467 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv468 store double %call, ptr %arrayidx, align 4469 %iv.next = add nuw nsw i64 %iv, 1470 %exitcond = icmp eq i64 %iv.next, 1000471 br i1 %exitcond, label %for.end, label %for.body472 473for.end:474 ret void475}476 477define void @acos_f32_intrinsic(ptr nocapture %varray) {478; CHECK-LABEL: @acos_f32_intrinsic(479; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.acos.v2f32(<2 x float> [[TMP4:%.*]])480; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_acosf(<4 x float> [[TMP4:%.*]])481; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_acosf(<8 x float> [[TMP4:%.*]])482; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_acosf(<16 x float> [[TMP4:%.*]])483; CHECK: ret void484;485entry:486 br label %for.body487 488for.body:489 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]490 %tmp = trunc i64 %iv to i32491 %conv = sitofp i32 %tmp to float492 %call = tail call float @llvm.acos.f32(float %conv)493 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv494 store float %call, ptr %arrayidx, align 4495 %iv.next = add nuw nsw i64 %iv, 1496 %exitcond = icmp eq i64 %iv.next, 1000497 br i1 %exitcond, label %for.end, label %for.body498 499for.end:500 ret void501}502 503define void @asin_f64(ptr nocapture %varray) {504; CHECK-LABEL: @asin_f64(505; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @llvm.asin.v2f64(<2 x double> [[TMP4:%.*]])506; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.asin.v4f64(<4 x double> [[TMP4:%.*]])507; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_asin(<8 x double> [[TMP4:%.*]])508; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.asin.v16f64(<16 x double> [[TMP4:%.*]])509; CHECK: ret void510;511entry:512 br label %for.body513 514for.body:515 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]516 %tmp = trunc i64 %iv to i32517 %conv = sitofp i32 %tmp to double518 %call = tail call double @asin(double %conv)519 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv520 store double %call, ptr %arrayidx, align 4521 %iv.next = add nuw nsw i64 %iv, 1522 %exitcond = icmp eq i64 %iv.next, 1000523 br i1 %exitcond, label %for.end, label %for.body524 525for.end:526 ret void527}528 529define void @asin_f32(ptr nocapture %varray) {530; CHECK-LABEL: @asin_f32(531; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.asin.v2f32(<2 x float> [[TMP4:%.*]])532; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_asinf(<4 x float> [[TMP4:%.*]])533; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_asinf(<8 x float> [[TMP4:%.*]])534; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_asinf(<16 x float> [[TMP4:%.*]])535; CHECK: ret void536;537entry:538 br label %for.body539 540for.body:541 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]542 %tmp = trunc i64 %iv to i32543 %conv = sitofp i32 %tmp to float544 %call = tail call float @asinf(float %conv)545 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv546 store float %call, ptr %arrayidx, align 4547 %iv.next = add nuw nsw i64 %iv, 1548 %exitcond = icmp eq i64 %iv.next, 1000549 br i1 %exitcond, label %for.end, label %for.body550 551for.end:552 ret void553}554 555define void @asin_f64_intrinsic(ptr nocapture %varray) {556; CHECK-LABEL: @asin_f64_intrinsic(557; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @llvm.asin.v2f64(<2 x double> [[TMP4:%.*]])558; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.asin.v4f64(<4 x double> [[TMP4:%.*]])559; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_asin(<8 x double> [[TMP4:%.*]])560; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.asin.v16f64(<16 x double> [[TMP4:%.*]])561; CHECK: ret void562;563entry:564 br label %for.body565 566for.body:567 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]568 %tmp = trunc i64 %iv to i32569 %conv = sitofp i32 %tmp to double570 %call = tail call double @llvm.asin.f64(double %conv)571 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv572 store double %call, ptr %arrayidx, align 4573 %iv.next = add nuw nsw i64 %iv, 1574 %exitcond = icmp eq i64 %iv.next, 1000575 br i1 %exitcond, label %for.end, label %for.body576 577for.end:578 ret void579}580 581define void @asin_f32_intrinsic(ptr nocapture %varray) {582; CHECK-LABEL: @asin_f32_intrinsic(583; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.asin.v2f32(<2 x float> [[TMP4:%.*]])584; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_asinf(<4 x float> [[TMP4:%.*]])585; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_asinf(<8 x float> [[TMP4:%.*]])586; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_asinf(<16 x float> [[TMP4:%.*]])587; CHECK: ret void588;589entry:590 br label %for.body591 592for.body:593 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]594 %tmp = trunc i64 %iv to i32595 %conv = sitofp i32 %tmp to float596 %call = tail call float @llvm.asin.f32(float %conv)597 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv598 store float %call, ptr %arrayidx, align 4599 %iv.next = add nuw nsw i64 %iv, 1600 %exitcond = icmp eq i64 %iv.next, 1000601 br i1 %exitcond, label %for.end, label %for.body602 603for.end:604 ret void605}606 607define void @atan_f64(ptr nocapture %varray) {608; CHECK-LABEL: @atan_f64(609; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_atan(<2 x double> [[TMP4:%.*]])610; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_atan(<4 x double> [[TMP4:%.*]])611; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_atan(<8 x double> [[TMP4:%.*]])612; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.atan.v16f64(<16 x double> [[TMP4:%.*]])613; CHECK: ret void614;615entry:616 br label %for.body617 618for.body:619 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]620 %tmp = trunc i64 %iv to i32621 %conv = sitofp i32 %tmp to double622 %call = tail call double @atan(double %conv)623 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv624 store double %call, ptr %arrayidx, align 4625 %iv.next = add nuw nsw i64 %iv, 1626 %exitcond = icmp eq i64 %iv.next, 1000627 br i1 %exitcond, label %for.end, label %for.body628 629for.end:630 ret void631}632 633define void @atan_f32(ptr nocapture %varray) {634; CHECK-LABEL: @atan_f32(635; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.atan.v2f32(<2 x float> [[TMP4:%.*]])636; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_atanf(<4 x float> [[TMP4:%.*]])637; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_atanf(<8 x float> [[TMP4:%.*]])638; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_atanf(<16 x float> [[TMP4:%.*]])639; CHECK: ret void640;641entry:642 br label %for.body643 644for.body:645 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]646 %tmp = trunc i64 %iv to i32647 %conv = sitofp i32 %tmp to float648 %call = tail call float @atanf(float %conv)649 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv650 store float %call, ptr %arrayidx, align 4651 %iv.next = add nuw nsw i64 %iv, 1652 %exitcond = icmp eq i64 %iv.next, 1000653 br i1 %exitcond, label %for.end, label %for.body654 655for.end:656 ret void657}658 659define void @atan_f64_intrinsic(ptr nocapture %varray) {660; CHECK-LABEL: @atan_f64_intrinsic(661; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_atan(<2 x double> [[TMP4:%.*]])662; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_atan(<4 x double> [[TMP4:%.*]])663; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_atan(<8 x double> [[TMP4:%.*]])664; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.atan.v16f64(<16 x double> [[TMP4:%.*]])665; CHECK: ret void666;667entry:668 br label %for.body669 670for.body:671 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]672 %tmp = trunc i64 %iv to i32673 %conv = sitofp i32 %tmp to double674 %call = tail call double @llvm.atan.f64(double %conv)675 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv676 store double %call, ptr %arrayidx, align 4677 %iv.next = add nuw nsw i64 %iv, 1678 %exitcond = icmp eq i64 %iv.next, 1000679 br i1 %exitcond, label %for.end, label %for.body680 681for.end:682 ret void683}684 685define void @atan_f32_intrinsic(ptr nocapture %varray) {686; CHECK-LABEL: @atan_f32_intrinsic(687; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.atan.v2f32(<2 x float> [[TMP4:%.*]])688; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_atanf(<4 x float> [[TMP4:%.*]])689; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_atanf(<8 x float> [[TMP4:%.*]])690; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_atanf(<16 x float> [[TMP4:%.*]])691; CHECK: ret void692;693entry:694 br label %for.body695 696for.body:697 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]698 %tmp = trunc i64 %iv to i32699 %conv = sitofp i32 %tmp to float700 %call = tail call float @llvm.atan.f32(float %conv)701 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv702 store float %call, ptr %arrayidx, align 4703 %iv.next = add nuw nsw i64 %iv, 1704 %exitcond = icmp eq i64 %iv.next, 1000705 br i1 %exitcond, label %for.end, label %for.body706 707for.end:708 ret void709}710 711define void @sinh_f64(ptr nocapture %varray) {712; CHECK-LABEL: @sinh_f64(713; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @llvm.sinh.v2f64(<2 x double> [[TMP4:%.*]])714; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.sinh.v4f64(<4 x double> [[TMP4:%.*]])715; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.sinh.v8f64(<8 x double> [[TMP4:%.*]])716; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.sinh.v16f64(<16 x double> [[TMP4:%.*]])717; CHECK: ret void718;719entry:720 br label %for.body721 722for.body:723 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]724 %tmp = trunc i64 %iv to i32725 %conv = sitofp i32 %tmp to double726 %call = tail call double @sinh(double %conv)727 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv728 store double %call, ptr %arrayidx, align 4729 %iv.next = add nuw nsw i64 %iv, 1730 %exitcond = icmp eq i64 %iv.next, 1000731 br i1 %exitcond, label %for.end, label %for.body732 733for.end:734 ret void735}736 737define void @sinh_f32(ptr nocapture %varray) {738; CHECK-LABEL: @sinh_f32(739; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.sinh.v2f32(<2 x float> [[TMP4:%.*]])740; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @llvm.sinh.v4f32(<4 x float> [[TMP4:%.*]])741; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @llvm.sinh.v8f32(<8 x float> [[TMP4:%.*]])742; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @llvm.sinh.v16f32(<16 x float> [[TMP4:%.*]])743; CHECK: ret void744;745entry:746 br label %for.body747 748for.body:749 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]750 %tmp = trunc i64 %iv to i32751 %conv = sitofp i32 %tmp to float752 %call = tail call float @sinhf(float %conv)753 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv754 store float %call, ptr %arrayidx, align 4755 %iv.next = add nuw nsw i64 %iv, 1756 %exitcond = icmp eq i64 %iv.next, 1000757 br i1 %exitcond, label %for.end, label %for.body758 759for.end:760 ret void761}762 763define void @sinh_f64_intrinsic(ptr nocapture %varray) {764; CHECK-LABEL: @sinh_f64_intrinsic(765; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @llvm.sinh.v2f64(<2 x double> [[TMP4:%.*]])766; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.sinh.v4f64(<4 x double> [[TMP4:%.*]])767; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.sinh.v8f64(<8 x double> [[TMP4:%.*]])768; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.sinh.v16f64(<16 x double> [[TMP4:%.*]])769; CHECK: ret void770;771entry:772 br label %for.body773 774for.body:775 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]776 %tmp = trunc i64 %iv to i32777 %conv = sitofp i32 %tmp to double778 %call = tail call double @llvm.sinh.f64(double %conv)779 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv780 store double %call, ptr %arrayidx, align 4781 %iv.next = add nuw nsw i64 %iv, 1782 %exitcond = icmp eq i64 %iv.next, 1000783 br i1 %exitcond, label %for.end, label %for.body784 785for.end:786 ret void787}788 789define void @sinh_f32_intrinsic(ptr nocapture %varray) {790; CHECK-LABEL: @sinh_f32_intrinsic(791; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.sinh.v2f32(<2 x float> [[TMP4:%.*]])792; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @llvm.sinh.v4f32(<4 x float> [[TMP4:%.*]])793; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @llvm.sinh.v8f32(<8 x float> [[TMP4:%.*]])794; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @llvm.sinh.v16f32(<16 x float> [[TMP4:%.*]])795; CHECK: ret void796;797entry:798 br label %for.body799 800for.body:801 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]802 %tmp = trunc i64 %iv to i32803 %conv = sitofp i32 %tmp to float804 %call = tail call float @llvm.sinh.f32(float %conv)805 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv806 store float %call, ptr %arrayidx, align 4807 %iv.next = add nuw nsw i64 %iv, 1808 %exitcond = icmp eq i64 %iv.next, 1000809 br i1 %exitcond, label %for.end, label %for.body810 811for.end:812 ret void813}814 815define void @cosh_f64(ptr nocapture %varray) {816; CHECK-LABEL: @cosh_f64(817; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_cosh(<2 x double> [[TMP4:%.*]])818; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.cosh.v4f64(<4 x double> [[TMP4:%.*]])819; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.cosh.v8f64(<8 x double> [[TMP4:%.*]])820; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.cosh.v16f64(<16 x double> [[TMP4:%.*]])821; CHECK: ret void822;823entry:824 br label %for.body825 826for.body:827 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]828 %tmp = trunc i64 %iv to i32829 %conv = sitofp i32 %tmp to double830 %call = tail call double @cosh(double %conv)831 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv832 store double %call, ptr %arrayidx, align 4833 %iv.next = add nuw nsw i64 %iv, 1834 %exitcond = icmp eq i64 %iv.next, 1000835 br i1 %exitcond, label %for.end, label %for.body836 837for.end:838 ret void839}840 841define void @cosh_f32(ptr nocapture %varray) {842; CHECK-LABEL: @cosh_f32(843; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.cosh.v2f32(<2 x float> [[TMP4:%.*]])844; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_coshf(<4 x float> [[TMP4:%.*]])845; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_coshf(<8 x float> [[TMP4:%.*]])846; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @llvm.cosh.v16f32(<16 x float> [[TMP4:%.*]])847; CHECK: ret void848;849entry:850 br label %for.body851 852for.body:853 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]854 %tmp = trunc i64 %iv to i32855 %conv = sitofp i32 %tmp to float856 %call = tail call float @coshf(float %conv)857 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv858 store float %call, ptr %arrayidx, align 4859 %iv.next = add nuw nsw i64 %iv, 1860 %exitcond = icmp eq i64 %iv.next, 1000861 br i1 %exitcond, label %for.end, label %for.body862 863for.end:864 ret void865}866 867define void @cosh_f64_intrinsic(ptr nocapture %varray) {868; CHECK-LABEL: @cosh_f64_intrinsic(869; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_cosh(<2 x double> [[TMP4:%.*]])870; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.cosh.v4f64(<4 x double> [[TMP4:%.*]])871; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.cosh.v8f64(<8 x double> [[TMP4:%.*]])872; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.cosh.v16f64(<16 x double> [[TMP4:%.*]])873; CHECK: ret void874;875entry:876 br label %for.body877 878for.body:879 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]880 %tmp = trunc i64 %iv to i32881 %conv = sitofp i32 %tmp to double882 %call = tail call double @llvm.cosh.f64(double %conv)883 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv884 store double %call, ptr %arrayidx, align 4885 %iv.next = add nuw nsw i64 %iv, 1886 %exitcond = icmp eq i64 %iv.next, 1000887 br i1 %exitcond, label %for.end, label %for.body888 889for.end:890 ret void891}892 893define void @cosh_f32_intrinsic(ptr nocapture %varray) {894; CHECK-LABEL: @cosh_f32_intrinsic(895; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.cosh.v2f32(<2 x float> [[TMP4:%.*]])896; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_coshf(<4 x float> [[TMP4:%.*]])897; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_coshf(<8 x float> [[TMP4:%.*]])898; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @llvm.cosh.v16f32(<16 x float> [[TMP4:%.*]])899; CHECK: ret void900;901entry:902 br label %for.body903 904for.body:905 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]906 %tmp = trunc i64 %iv to i32907 %conv = sitofp i32 %tmp to float908 %call = tail call float @llvm.cosh.f32(float %conv)909 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv910 store float %call, ptr %arrayidx, align 4911 %iv.next = add nuw nsw i64 %iv, 1912 %exitcond = icmp eq i64 %iv.next, 1000913 br i1 %exitcond, label %for.end, label %for.body914 915for.end:916 ret void917}918 919define void @tanh_f64(ptr nocapture %varray) {920; CHECK-LABEL: @tanh_f64(921; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @llvm.tanh.v2f64(<2 x double> [[TMP4:%.*]])922; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.tanh.v4f64(<4 x double> [[TMP4:%.*]])923; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.tanh.v8f64(<8 x double> [[TMP4:%.*]])924; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.tanh.v16f64(<16 x double> [[TMP4:%.*]])925; CHECK: ret void926;927entry:928 br label %for.body929 930for.body:931 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]932 %tmp = trunc i64 %iv to i32933 %conv = sitofp i32 %tmp to double934 %call = tail call double @tanh(double %conv)935 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv936 store double %call, ptr %arrayidx, align 4937 %iv.next = add nuw nsw i64 %iv, 1938 %exitcond = icmp eq i64 %iv.next, 1000939 br i1 %exitcond, label %for.end, label %for.body940 941for.end:942 ret void943}944 945define void @tanh_f32(ptr nocapture %varray) {946; CHECK-LABEL: @tanh_f32(947; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.tanh.v2f32(<2 x float> [[TMP4:%.*]])948; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_tanhf(<4 x float> [[TMP4:%.*]])949; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_tanhf(<8 x float> [[TMP4:%.*]])950; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_tanhf(<16 x float> [[TMP4:%.*]])951; CHECK: ret void952;953entry:954 br label %for.body955 956for.body:957 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]958 %tmp = trunc i64 %iv to i32959 %conv = sitofp i32 %tmp to float960 %call = tail call float @tanhf(float %conv)961 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv962 store float %call, ptr %arrayidx, align 4963 %iv.next = add nuw nsw i64 %iv, 1964 %exitcond = icmp eq i64 %iv.next, 1000965 br i1 %exitcond, label %for.end, label %for.body966 967for.end:968 ret void969}970 971define void @tanh_f64_intrinsic(ptr nocapture %varray) {972; CHECK-LABEL: @tanh_f64_intrinsic(973; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @llvm.tanh.v2f64(<2 x double> [[TMP4:%.*]])974; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.tanh.v4f64(<4 x double> [[TMP4:%.*]])975; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.tanh.v8f64(<8 x double> [[TMP4:%.*]])976; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.tanh.v16f64(<16 x double> [[TMP4:%.*]])977; CHECK: ret void978;979entry:980 br label %for.body981 982for.body:983 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]984 %tmp = trunc i64 %iv to i32985 %conv = sitofp i32 %tmp to double986 %call = tail call double @llvm.tanh.f64(double %conv)987 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv988 store double %call, ptr %arrayidx, align 4989 %iv.next = add nuw nsw i64 %iv, 1990 %exitcond = icmp eq i64 %iv.next, 1000991 br i1 %exitcond, label %for.end, label %for.body992 993for.end:994 ret void995}996 997define void @tanh_f32_intrinsic(ptr nocapture %varray) {998; CHECK-LABEL: @tanh_f32_intrinsic(999; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.tanh.v2f32(<2 x float> [[TMP4:%.*]])1000; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_tanhf(<4 x float> [[TMP4:%.*]])1001; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_tanhf(<8 x float> [[TMP4:%.*]])1002; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_tanhf(<16 x float> [[TMP4:%.*]])1003; CHECK: ret void1004;1005entry:1006 br label %for.body1007 1008for.body:1009 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1010 %tmp = trunc i64 %iv to i321011 %conv = sitofp i32 %tmp to float1012 %call = tail call float @llvm.tanh.f32(float %conv)1013 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1014 store float %call, ptr %arrayidx, align 41015 %iv.next = add nuw nsw i64 %iv, 11016 %exitcond = icmp eq i64 %iv.next, 10001017 br i1 %exitcond, label %for.end, label %for.body1018 1019for.end:1020 ret void1021}1022 1023define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {1024; CHECK-LABEL: @pow_f64(1025; CHECK-VF2: [[TMP8:%.*]] = call <2 x double> @amd_vrd2_pow(<2 x double> [[TMP4:%.*]], <2 x double> [[WIDE_LOAD:%.*]])1026; CHECK-VF4: [[TMP8:%.*]] = call <4 x double> @amd_vrd4_pow(<4 x double> [[TMP4:%.*]], <4 x double> [[WIDE_LOAD:%.*]])1027; CHECK-VF8: [[TMP8:%.*]] = call <8 x double> @amd_vrd8_pow(<8 x double> [[TMP4:%.*]], <8 x double> [[WIDE_LOAD:%.*]])1028; CHECK-VF16: [[TMP8:%.*]] = call <16 x double> @llvm.pow.v16f64(<16 x double> [[TMP4:%.*]], <16 x double> [[WIDE_LOAD:%.*]])1029; CHECK: ret void1030;1031entry:1032 br label %for.body1033 1034for.body:1035 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1036 %tmp = trunc i64 %iv to i321037 %conv = sitofp i32 %tmp to double1038 %arrayidx = getelementptr inbounds double, ptr %exp, i64 %iv1039 %tmp1 = load double, ptr %arrayidx, align 41040 %tmp2 = tail call double @pow(double %conv, double %tmp1)1041 %arrayidx2 = getelementptr inbounds double, ptr %varray, i64 %iv1042 store double %tmp2, ptr %arrayidx2, align 41043 %iv.next = add nuw nsw i64 %iv, 11044 %exitcond = icmp eq i64 %iv.next, 10001045 br i1 %exitcond, label %for.end, label %for.body1046 1047for.end:1048 ret void1049}1050 1051define void @pow_f64_intrinsic(ptr nocapture %varray, ptr nocapture readonly %exp) {1052; CHECK-LABEL: @pow_f64_intrinsic(1053; CHECK-VF2: [[TMP8:%.*]] = call <2 x double> @amd_vrd2_pow(<2 x double> [[TMP4:%.*]], <2 x double> [[WIDE_LOAD:%.*]])1054; CHECK-VF4: [[TMP8:%.*]] = call <4 x double> @amd_vrd4_pow(<4 x double> [[TMP4:%.*]], <4 x double> [[WIDE_LOAD:%.*]])1055; CHECK-VF8: [[TMP8:%.*]] = call <8 x double> @amd_vrd8_pow(<8 x double> [[TMP4:%.*]], <8 x double> [[WIDE_LOAD:%.*]])1056; CHECK-VF16: [[TMP8:%.*]] = call <16 x double> @llvm.pow.v16f64(<16 x double> [[TMP4:%.*]], <16 x double> [[WIDE_LOAD:%.*]])1057; CHECK: ret void1058;1059entry:1060 br label %for.body1061 1062for.body:1063 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1064 %tmp = trunc i64 %iv to i321065 %conv = sitofp i32 %tmp to double1066 %arrayidx = getelementptr inbounds double, ptr %exp, i64 %iv1067 %tmp1 = load double, ptr %arrayidx, align 41068 %tmp2 = tail call double @llvm.pow.f64(double %conv, double %tmp1)1069 %arrayidx2 = getelementptr inbounds double, ptr %varray, i64 %iv1070 store double %tmp2, ptr %arrayidx2, align 41071 %iv.next = add nuw nsw i64 %iv, 11072 %exitcond = icmp eq i64 %iv.next, 10001073 br i1 %exitcond, label %for.end, label %for.body1074 1075for.end:1076 ret void1077}1078 1079define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {1080; CHECK-LABEL: @pow_f32(1081; CHECK-VF2: [[TMP8:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP4:%.*]], <2 x float> [[WIDE_LOAD:%.*]])1082; CHECK-VF4: [[TMP8:%.*]] = call <4 x float> @amd_vrs4_powf(<4 x float> [[TMP4:%.*]], <4 x float> [[WIDE_LOAD:%.*]])1083; CHECK-VF8: [[TMP8:%.*]] = call <8 x float> @amd_vrs8_powf(<8 x float> [[TMP4:%.*]], <8 x float> [[WIDE_LOAD:%.*]])1084; CHECK-VF16: [[TMP8:%.*]] = call <16 x float> @amd_vrs16_powf(<16 x float> [[TMP4:%.*]], <16 x float> [[WIDE_LOAD:%.*]])1085; CHECK: ret void1086;1087entry:1088 br label %for.body1089 1090for.body:1091 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1092 %tmp = trunc i64 %iv to i321093 %conv = sitofp i32 %tmp to float1094 %arrayidx = getelementptr inbounds float, ptr %exp, i64 %iv1095 %tmp1 = load float, ptr %arrayidx, align 41096 %tmp2 = tail call float @powf(float %conv, float %tmp1)1097 %arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %iv1098 store float %tmp2, ptr %arrayidx2, align 41099 %iv.next = add nuw nsw i64 %iv, 11100 %exitcond = icmp eq i64 %iv.next, 10001101 br i1 %exitcond, label %for.end, label %for.body1102 1103for.end:1104 ret void1105}1106 1107define void @pow_f32_intrinsic(ptr nocapture %varray, ptr nocapture readonly %exp) {1108; CHECK-LABEL: @pow_f32_intrinsic(1109; CHECK-VF2: [[TMP8:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP4:%.*]], <2 x float> [[WIDE_LOAD:%.*]])1110; CHECK-VF4: [[TMP8:%.*]] = call <4 x float> @amd_vrs4_powf(<4 x float> [[TMP4:%.*]], <4 x float> [[WIDE_LOAD:%.*]])1111; CHECK-VF8: [[TMP8:%.*]] = call <8 x float> @amd_vrs8_powf(<8 x float> [[TMP4:%.*]], <8 x float> [[WIDE_LOAD:%.*]])1112; CHECK-VF16: [[TMP8:%.*]] = call <16 x float> @amd_vrs16_powf(<16 x float> [[TMP4:%.*]], <16 x float> [[WIDE_LOAD:%.*]])1113; CHECK: ret void1114;1115entry:1116 br label %for.body1117 1118for.body:1119 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1120 %tmp = trunc i64 %iv to i321121 %conv = sitofp i32 %tmp to float1122 %arrayidx = getelementptr inbounds float, ptr %exp, i64 %iv1123 %tmp1 = load float, ptr %arrayidx, align 41124 %tmp2 = tail call float @llvm.pow.f32(float %conv, float %tmp1)1125 %arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %iv1126 store float %tmp2, ptr %arrayidx2, align 41127 %iv.next = add nuw nsw i64 %iv, 11128 %exitcond = icmp eq i64 %iv.next, 10001129 br i1 %exitcond, label %for.end, label %for.body1130 1131for.end:1132 ret void1133}1134 1135define void @exp_f64(ptr nocapture %varray) {1136; CHECK-LABEL: @exp_f64(1137; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_exp(<2 x double> [[TMP4:%.*]])1138; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_exp(<4 x double> [[TMP4:%.*]])1139; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_exp(<8 x double> [[TMP4:%.*]])1140; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.exp.v16f64(<16 x double> [[TMP4:%.*]])1141; CHECK: ret void1142;1143entry:1144 br label %for.body1145 1146for.body:1147 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1148 %tmp = trunc i64 %iv to i321149 %conv = sitofp i32 %tmp to double1150 %call = tail call double @exp(double %conv)1151 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1152 store double %call, ptr %arrayidx, align 41153 %iv.next = add nuw nsw i64 %iv, 11154 %exitcond = icmp eq i64 %iv.next, 10001155 br i1 %exitcond, label %for.end, label %for.body1156 1157for.end:1158 ret void1159}1160 1161define void @exp_f32(ptr nocapture %varray) {1162; CHECK-LABEL: @exp_f32(1163; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP4:%.*]])1164; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_expf(<4 x float> [[TMP4:%.*]])1165; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_expf(<8 x float> [[TMP4:%.*]])1166; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_expf(<16 x float> [[TMP4:%.*]])1167; CHECK: ret void1168;1169entry:1170 br label %for.body1171 1172for.body:1173 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1174 %tmp = trunc i64 %iv to i321175 %conv = sitofp i32 %tmp to float1176 %call = tail call float @expf(float %conv)1177 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1178 store float %call, ptr %arrayidx, align 41179 %iv.next = add nuw nsw i64 %iv, 11180 %exitcond = icmp eq i64 %iv.next, 10001181 br i1 %exitcond, label %for.end, label %for.body1182 1183for.end:1184 ret void1185}1186 1187define void @exp_f64_intrinsic(ptr nocapture %varray) {1188; CHECK-LABEL: @exp_f64_intrinsic(1189; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_exp(<2 x double> [[TMP4:%.*]])1190; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_exp(<4 x double> [[TMP4:%.*]])1191; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_exp(<8 x double> [[TMP4:%.*]])1192; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.exp.v16f64(<16 x double> [[TMP4:%.*]])1193; CHECK: ret void1194;1195entry:1196 br label %for.body1197 1198for.body:1199 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1200 %tmp = trunc i64 %iv to i321201 %conv = sitofp i32 %tmp to double1202 %call = tail call double @llvm.exp.f64(double %conv)1203 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1204 store double %call, ptr %arrayidx, align 41205 %iv.next = add nuw nsw i64 %iv, 11206 %exitcond = icmp eq i64 %iv.next, 10001207 br i1 %exitcond, label %for.end, label %for.body1208 1209for.end:1210 ret void1211}1212 1213define void @exp_f32_intrinsic(ptr nocapture %varray) {1214; CHECK-LABEL: @exp_f32_intrinsic(1215; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP4:%.*]])1216; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_expf(<4 x float> [[TMP4:%.*]])1217; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_expf(<8 x float> [[TMP4:%.*]])1218; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_expf(<16 x float> [[TMP4:%.*]])1219; CHECK: ret void1220;1221entry:1222 br label %for.body1223 1224for.body:1225 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1226 %tmp = trunc i64 %iv to i321227 %conv = sitofp i32 %tmp to float1228 %call = tail call float @llvm.exp.f32(float %conv)1229 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1230 store float %call, ptr %arrayidx, align 41231 %iv.next = add nuw nsw i64 %iv, 11232 %exitcond = icmp eq i64 %iv.next, 10001233 br i1 %exitcond, label %for.end, label %for.body1234 1235for.end:1236 ret void1237}1238 1239define void @log_f64(ptr nocapture %varray) {1240; CHECK-LABEL: @log_f64(1241; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_log(<2 x double> [[TMP4:%.*]])1242; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_log(<4 x double> [[TMP4:%.*]])1243; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_log(<8 x double> [[TMP4:%.*]])1244; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.log.v16f64(<16 x double> [[TMP4:%.*]])1245; CHECK: ret void1246;1247entry:1248 br label %for.body1249 1250for.body:1251 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1252 %tmp = trunc i64 %iv to i321253 %conv = sitofp i32 %tmp to double1254 %call = tail call double @log(double %conv)1255 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1256 store double %call, ptr %arrayidx, align 41257 %iv.next = add nuw nsw i64 %iv, 11258 %exitcond = icmp eq i64 %iv.next, 10001259 br i1 %exitcond, label %for.end, label %for.body1260 1261for.end:1262 ret void1263}1264 1265define void @log_f32(ptr nocapture %varray) {1266; CHECK-LABEL: @log_f32(1267; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.log.v2f32(<2 x float> [[TMP4:%.*]])1268; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_logf(<4 x float> [[TMP4:%.*]])1269; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_logf(<8 x float> [[TMP4:%.*]])1270; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_logf(<16 x float> [[TMP4:%.*]])1271; CHECK: ret void1272;1273entry:1274 br label %for.body1275 1276for.body:1277 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1278 %tmp = trunc i64 %iv to i321279 %conv = sitofp i32 %tmp to float1280 %call = tail call float @logf(float %conv)1281 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1282 store float %call, ptr %arrayidx, align 41283 %iv.next = add nuw nsw i64 %iv, 11284 %exitcond = icmp eq i64 %iv.next, 10001285 br i1 %exitcond, label %for.end, label %for.body1286 1287for.end:1288 ret void1289}1290 1291define void @log_f64_intrinsic(ptr nocapture %varray) {1292; CHECK-LABEL: @log_f64_intrinsic(1293; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_log(<2 x double> [[TMP4:%.*]])1294; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_log(<4 x double> [[TMP4:%.*]])1295; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_log(<8 x double> [[TMP4:%.*]])1296; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.log.v16f64(<16 x double> [[TMP4:%.*]])1297; CHECK: ret void1298;1299entry:1300 br label %for.body1301 1302for.body:1303 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1304 %tmp = trunc i64 %iv to i321305 %conv = sitofp i32 %tmp to double1306 %call = tail call double @llvm.log.f64(double %conv)1307 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1308 store double %call, ptr %arrayidx, align 41309 %iv.next = add nuw nsw i64 %iv, 11310 %exitcond = icmp eq i64 %iv.next, 10001311 br i1 %exitcond, label %for.end, label %for.body1312 1313for.end:1314 ret void1315}1316 1317define void @log_f32_intrinsic(ptr nocapture %varray) {1318; CHECK-LABEL: @log_f32_intrinsic(1319; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.log.v2f32(<2 x float> [[TMP4:%.*]])1320; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_logf(<4 x float> [[TMP4:%.*]])1321; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_logf(<8 x float> [[TMP4:%.*]])1322; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_logf(<16 x float> [[TMP4:%.*]])1323; CHECK: ret void1324;1325entry:1326 br label %for.body1327 1328for.body:1329 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1330 %tmp = trunc i64 %iv to i321331 %conv = sitofp i32 %tmp to float1332 %call = tail call float @llvm.log.f32(float %conv)1333 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1334 store float %call, ptr %arrayidx, align 41335 %iv.next = add nuw nsw i64 %iv, 11336 %exitcond = icmp eq i64 %iv.next, 10001337 br i1 %exitcond, label %for.end, label %for.body1338 1339for.end:1340 ret void1341}1342 1343define void @log2_f64(ptr nocapture %varray) {1344; CHECK-LABEL: @log2_f64(1345; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_log2(<2 x double> [[TMP4:%.*]])1346; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_log2(<4 x double> [[TMP4:%.*]])1347; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_log2(<8 x double> [[TMP4:%.*]])1348; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.log2.v16f64(<16 x double> [[TMP4:%.*]])1349; CHECK: ret void1350;1351entry:1352 br label %for.body1353 1354for.body:1355 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1356 %tmp = trunc i64 %iv to i321357 %conv = sitofp i32 %tmp to double1358 %call = tail call double @log2(double %conv)1359 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1360 store double %call, ptr %arrayidx, align 41361 %iv.next = add nuw nsw i64 %iv, 11362 %exitcond = icmp eq i64 %iv.next, 10001363 br i1 %exitcond, label %for.end, label %for.body1364 1365for.end:1366 ret void1367}1368 1369define void @log2_f32(ptr nocapture %varray) {1370; CHECK-LABEL: @log2_f32(1371; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP4:%.*]])1372; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_log2f(<4 x float> [[TMP4:%.*]])1373; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_log2f(<8 x float> [[TMP4:%.*]])1374; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_log2f(<16 x float> [[TMP4:%.*]])1375; CHECK: ret void1376;1377entry:1378 br label %for.body1379 1380for.body:1381 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1382 %tmp = trunc i64 %iv to i321383 %conv = sitofp i32 %tmp to float1384 %call = tail call float @log2f(float %conv)1385 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1386 store float %call, ptr %arrayidx, align 41387 %iv.next = add nuw nsw i64 %iv, 11388 %exitcond = icmp eq i64 %iv.next, 10001389 br i1 %exitcond, label %for.end, label %for.body1390 1391for.end:1392 ret void1393}1394 1395define void @log2_f64_intrinsic(ptr nocapture %varray) {1396; CHECK-LABEL: @log2_f64_intrinsic(1397; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_log2(<2 x double> [[TMP4:%.*]])1398; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_log2(<4 x double> [[TMP4:%.*]])1399; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_log2(<8 x double> [[TMP4:%.*]])1400; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.log2.v16f64(<16 x double> [[TMP4:%.*]])1401; CHECK: ret void1402;1403entry:1404 br label %for.body1405 1406for.body:1407 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1408 %tmp = trunc i64 %iv to i321409 %conv = sitofp i32 %tmp to double1410 %call = tail call double @llvm.log2.f64(double %conv)1411 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1412 store double %call, ptr %arrayidx, align 41413 %iv.next = add nuw nsw i64 %iv, 11414 %exitcond = icmp eq i64 %iv.next, 10001415 br i1 %exitcond, label %for.end, label %for.body1416 1417for.end:1418 ret void1419}1420 1421define void @log2_f32_intrinsic(ptr nocapture %varray) {1422; CHECK-LABEL: @log2_f32_intrinsic(1423; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP4:%.*]])1424; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_log2f(<4 x float> [[TMP4:%.*]])1425; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_log2f(<8 x float> [[TMP4:%.*]])1426; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_log2f(<16 x float> [[TMP4:%.*]])1427; CHECK: ret void1428;1429entry:1430 br label %for.body1431 1432for.body:1433 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1434 %tmp = trunc i64 %iv to i321435 %conv = sitofp i32 %tmp to float1436 %call = tail call float @llvm.log2.f32(float %conv)1437 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1438 store float %call, ptr %arrayidx, align 41439 %iv.next = add nuw nsw i64 %iv, 11440 %exitcond = icmp eq i64 %iv.next, 10001441 br i1 %exitcond, label %for.end, label %for.body1442 1443for.end:1444 ret void1445}1446 1447define void @log10_f64(ptr nocapture %varray) {1448; CHECK-LABEL: @log10_f64(1449; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_log10(<2 x double> [[TMP4:%.*]])1450; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.log10.v4f64(<4 x double> [[TMP4:%.*]])1451; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.log10.v8f64(<8 x double> [[TMP4:%.*]])1452; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.log10.v16f64(<16 x double> [[TMP4:%.*]])1453; CHECK: ret void1454;1455entry:1456 br label %for.body1457 1458for.body:1459 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1460 %tmp = trunc i64 %iv to i321461 %conv = sitofp i32 %tmp to double1462 %call = tail call double @log10(double %conv)1463 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1464 store double %call, ptr %arrayidx, align 41465 %iv.next = add nuw nsw i64 %iv, 11466 %exitcond = icmp eq i64 %iv.next, 10001467 br i1 %exitcond, label %for.end, label %for.body1468 1469for.end:1470 ret void1471}1472 1473define void @log10_f32(ptr nocapture %varray) {1474; CHECK-LABEL: @log10_f32(1475; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.log10.v2f32(<2 x float> [[TMP4:%.*]])1476; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_log10f(<4 x float> [[TMP4:%.*]])1477; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_log10f(<8 x float> [[TMP4:%.*]])1478; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_log10f(<16 x float> [[TMP4:%.*]])1479; CHECK: ret void1480;1481entry:1482 br label %for.body1483 1484for.body:1485 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1486 %tmp = trunc i64 %iv to i321487 %conv = sitofp i32 %tmp to float1488 %call = tail call float @log10f(float %conv)1489 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1490 store float %call, ptr %arrayidx, align 41491 %iv.next = add nuw nsw i64 %iv, 11492 %exitcond = icmp eq i64 %iv.next, 10001493 br i1 %exitcond, label %for.end, label %for.body1494 1495for.end:1496 ret void1497}1498 1499define void @log10_f64_intrinsic(ptr nocapture %varray) {1500; CHECK-LABEL: @log10_f64_intrinsic(1501; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_log10(<2 x double> [[TMP4:%.*]])1502; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.log10.v4f64(<4 x double> [[TMP4:%.*]])1503; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.log10.v8f64(<8 x double> [[TMP4:%.*]])1504; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.log10.v16f64(<16 x double> [[TMP4:%.*]])1505; CHECK: ret void1506;1507entry:1508 br label %for.body1509 1510for.body:1511 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1512 %tmp = trunc i64 %iv to i321513 %conv = sitofp i32 %tmp to double1514 %call = tail call double @llvm.log10.f64(double %conv)1515 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1516 store double %call, ptr %arrayidx, align 41517 %iv.next = add nuw nsw i64 %iv, 11518 %exitcond = icmp eq i64 %iv.next, 10001519 br i1 %exitcond, label %for.end, label %for.body1520 1521for.end:1522 ret void1523}1524 1525define void @log10_f32_intrinsic(ptr nocapture %varray) {1526; CHECK-LABEL: @log10_f32_intrinsic(1527; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.log10.v2f32(<2 x float> [[TMP4:%.*]])1528; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_log10f(<4 x float> [[TMP4:%.*]])1529; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_log10f(<8 x float> [[TMP4:%.*]])1530; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_log10f(<16 x float> [[TMP4:%.*]])1531; CHECK: ret void1532;1533entry:1534 br label %for.body1535 1536for.body:1537 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1538 %tmp = trunc i64 %iv to i321539 %conv = sitofp i32 %tmp to float1540 %call = tail call float @llvm.log10.f32(float %conv)1541 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1542 store float %call, ptr %arrayidx, align 41543 %iv.next = add nuw nsw i64 %iv, 11544 %exitcond = icmp eq i64 %iv.next, 10001545 br i1 %exitcond, label %for.end, label %for.body1546 1547for.end:1548 ret void1549}1550 1551define void @exp2_f64(ptr nocapture %varray) {1552; CHECK-LABEL: @exp2_f64(1553; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_exp2(<2 x double> [[TMP4:%.*]])1554; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_exp2(<4 x double> [[TMP4:%.*]])1555; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_exp2(<8 x double> [[TMP4:%.*]])1556; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.exp2.v16f64(<16 x double> [[TMP4:%.*]])1557; CHECK: ret void1558;1559entry:1560 br label %for.body1561 1562for.body:1563 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1564 %tmp = trunc i64 %iv to i321565 %conv = sitofp i32 %tmp to double1566 %call = tail call double @exp2(double %conv)1567 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1568 store double %call, ptr %arrayidx, align 41569 %iv.next = add nuw nsw i64 %iv, 11570 %exitcond = icmp eq i64 %iv.next, 10001571 br i1 %exitcond, label %for.end, label %for.body1572 1573for.end:1574 ret void1575}1576 1577define void @exp2_f32(ptr nocapture %varray) {1578; CHECK-LABEL: @exp2_f32(1579; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP4:%.*]])1580; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_exp2f(<4 x float> [[TMP4:%.*]])1581; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_exp2f(<8 x float> [[TMP4:%.*]])1582; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_exp2f(<16 x float> [[TMP4:%.*]])1583; CHECK: ret void1584;1585entry:1586 br label %for.body1587 1588for.body:1589 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1590 %tmp = trunc i64 %iv to i321591 %conv = sitofp i32 %tmp to float1592 %call = tail call float @exp2f(float %conv)1593 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1594 store float %call, ptr %arrayidx, align 41595 %iv.next = add nuw nsw i64 %iv, 11596 %exitcond = icmp eq i64 %iv.next, 10001597 br i1 %exitcond, label %for.end, label %for.body1598 1599for.end:1600 ret void1601}1602 1603define void @exp2_f64_intrinsic(ptr nocapture %varray) {1604; CHECK-LABEL: @exp2_f64_intrinsic(1605; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_exp2(<2 x double> [[TMP4:%.*]])1606; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_exp2(<4 x double> [[TMP4:%.*]])1607; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_exp2(<8 x double> [[TMP4:%.*]])1608; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.exp2.v16f64(<16 x double> [[TMP4:%.*]])1609; CHECK: ret void1610;1611entry:1612 br label %for.body1613 1614for.body:1615 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1616 %tmp = trunc i64 %iv to i321617 %conv = sitofp i32 %tmp to double1618 %call = tail call double @llvm.exp2.f64(double %conv)1619 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1620 store double %call, ptr %arrayidx, align 41621 %iv.next = add nuw nsw i64 %iv, 11622 %exitcond = icmp eq i64 %iv.next, 10001623 br i1 %exitcond, label %for.end, label %for.body1624 1625for.end:1626 ret void1627}1628 1629define void @exp2_f32_intrinsic(ptr nocapture %varray) {1630; CHECK-LABEL: @exp2_f32_intrinsic(1631; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP4:%.*]])1632; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_exp2f(<4 x float> [[TMP4:%.*]])1633; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_exp2f(<8 x float> [[TMP4:%.*]])1634; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_exp2f(<16 x float> [[TMP4:%.*]])1635; CHECK: ret void1636;1637entry:1638 br label %for.body1639 1640for.body:1641 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1642 %tmp = trunc i64 %iv to i321643 %conv = sitofp i32 %tmp to float1644 %call = tail call float @llvm.exp2.f32(float %conv)1645 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1646 store float %call, ptr %arrayidx, align 41647 %iv.next = add nuw nsw i64 %iv, 11648 %exitcond = icmp eq i64 %iv.next, 10001649 br i1 %exitcond, label %for.end, label %for.body1650 1651for.end:1652 ret void1653}1654 1655define void @exp10_f64(ptr nocapture %varray) {1656; CHECK-LABEL: @exp10_f64(1657; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_exp10(<2 x double> [[TMP4:%.*]])1658; CHECK-VF4: call <4 x double> @llvm.exp10.v4f64(<4 x double> [[TMP4:%.*]])1659; CHECK-VF8: call <8 x double> @llvm.exp10.v8f64(<8 x double> [[TMP4:%.*]])1660; CHECK-VF16: call <16 x double> @llvm.exp10.v16f64(<16 x double> [[TMP4:%.*]])1661; CHECK: ret void1662;1663entry:1664 br label %for.body1665 1666for.body:1667 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1668 %tmp = trunc i64 %iv to i321669 %conv = sitofp i32 %tmp to double1670 %call = tail call double @exp10(double %conv)1671 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1672 store double %call, ptr %arrayidx, align 41673 %iv.next = add nuw nsw i64 %iv, 11674 %exitcond = icmp eq i64 %iv.next, 10001675 br i1 %exitcond, label %for.end, label %for.body1676 1677for.end:1678 ret void1679}1680 1681define void @exp10_f32(ptr nocapture %varray) {1682; CHECK-LABEL: @exp10_f32(1683; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.exp10.v2f32(<2 x float> [[TMP4:%.*]])1684; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_exp10f(<4 x float> [[TMP4:%.*]])1685; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @llvm.exp10.v8f32(<8 x float> [[TMP4:%.*]])1686; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @llvm.exp10.v16f32(<16 x float> [[TMP4:%.*]])1687; CHECK: ret void1688;1689entry:1690 br label %for.body1691 1692for.body:1693 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1694 %tmp = trunc i64 %iv to i321695 %conv = sitofp i32 %tmp to float1696 %call = tail call float @exp10f(float %conv)1697 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1698 store float %call, ptr %arrayidx, align 41699 %iv.next = add nuw nsw i64 %iv, 11700 %exitcond = icmp eq i64 %iv.next, 10001701 br i1 %exitcond, label %for.end, label %for.body1702 1703for.end:1704 ret void1705}1706 1707define void @exp10_f64_intrinsic(ptr nocapture %varray) {1708; CHECK-LABEL: @exp10_f64_intrinsic(1709; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_exp10(<2 x double> [[TMP4:%.*]])1710; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @llvm.exp10.v4f64(<4 x double> [[TMP4:%.*]])1711; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @llvm.exp10.v8f64(<8 x double> [[TMP4:%.*]])1712; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.exp10.v16f64(<16 x double> [[TMP4:%.*]])1713; CHECK: ret void1714;1715entry:1716 br label %for.body1717 1718for.body:1719 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1720 %tmp = trunc i64 %iv to i321721 %conv = sitofp i32 %tmp to double1722 %call = tail call double @llvm.exp10.f64(double %conv)1723 %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv1724 store double %call, ptr %arrayidx, align 41725 %iv.next = add nuw nsw i64 %iv, 11726 %exitcond = icmp eq i64 %iv.next, 10001727 br i1 %exitcond, label %for.end, label %for.body1728 1729for.end:1730 ret void1731}1732 1733define void @exp10_f32_intrinsic(ptr nocapture %varray) {1734; CHECK-LABEL: @exp10_f32_intrinsic(1735; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.exp10.v2f32(<2 x float> [[TMP4:%.*]])1736; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_exp10f(<4 x float> [[TMP4:%.*]])1737; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @llvm.exp10.v8f32(<8 x float> [[TMP4:%.*]])1738; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @llvm.exp10.v16f32(<16 x float> [[TMP4:%.*]])1739; CHECK: ret void1740;1741entry:1742 br label %for.body1743 1744for.body:1745 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]1746 %tmp = trunc i64 %iv to i321747 %conv = sitofp i32 %tmp to float1748 %call = tail call float @llvm.exp10.f32(float %conv)1749 %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv1750 store float %call, ptr %arrayidx, align 41751 %iv.next = add nuw nsw i64 %iv, 11752 %exitcond = icmp eq i64 %iv.next, 10001753 br i1 %exitcond, label %for.end, label %for.body1754 1755for.end:1756 ret void1757}1758 1759 1760define void @sincos_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) {1761; CHECK-LABEL: define void @sincos_f641762; CHECK-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]])1763; CHECK-VF2-NOT: call void @amd_vrd2_sincos(<2 x double> [[WIDE_LOAD:%.*]], ptr [[TMP5:%.*]], ptr [[TMP6:%.*]])1764; CHECK-VF4-NOT: call void @amd_vrd4_sincos(<4 x double> [[WIDE_LOAD:%.*]], ptr [[TMP5:%.*]], ptr [[TMP6:%.*]])1765; CHECK-VF8-NOT: call void @amd_vrd8_sincos(<8 x double> [[WIDE_LOAD:%.*]], ptr [[TMP5:%.*]], ptr [[TMP6:%.*]])1766; CHECK: ret void1767; 1768entry:1769 br label %for.body1770 1771for.body:1772 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]1773 %gepa = getelementptr double, ptr %a, i64 %indvars.iv1774 %num = load double, ptr %gepa, align 81775 %gepb = getelementptr double, ptr %b, i64 %indvars.iv1776 %gepc = getelementptr double, ptr %c, i64 %indvars.iv1777 call void @sincos(double %num, ptr %gepb, ptr %gepc)1778 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 11779 %exitcond = icmp eq i64 %indvars.iv.next, 10001780 br i1 %exitcond, label %for.cond.cleanup, label %for.body1781 1782for.cond.cleanup:1783 ret void1784}1785 1786define void @sincos_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) {1787; CHECK-LABEL: define void @sincos_f321788; CHECK-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]])1789; CHECK-VF4-NOT: call void @amd_vrs4_sincosf(<4 x float> [[WIDE_LOAD:%.*]], ptr [[TMP5:%.*]], ptr [[TMP6:%.*]])1790; CHECK-VF8-NOT: call void @amd_vrs8_sincosf(<8 x float> [[WIDE_LOAD:%.*]], ptr [[TMP5:%.*]], ptr [[TMP6:%.*]])1791; CHECK-VF16-NOT: call void @amd_vrs16_sincosf(<16 x float> [[WIDE_LOAD:%.*]], ptr [[TMP5:%.*]], ptr [[TMP6:%.*]])1792; CHECK: ret void1793;1794entry:1795 br label %for.body1796 1797for.body:1798 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]1799 %gepa = getelementptr float, ptr %a, i64 %indvars.iv1800 %num = load float, ptr %gepa, align 81801 %gepb = getelementptr float, ptr %b, i64 %indvars.iv1802 %gepc = getelementptr float, ptr %c, i64 %indvars.iv1803 call void @sincosf(float %num, ptr %gepb, ptr %gepc)1804 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 11805 %exitcond = icmp eq i64 %indvars.iv.next, 10001806 br i1 %exitcond, label %for.cond.cleanup, label %for.body1807 1808for.cond.cleanup:1809 ret void1810}1811 1812attributes #0 = { nounwind readnone }1813 1814declare double @exp10(double) #01815declare float @exp10f(float) #01816declare double @llvm.exp10.f64(double) #01817declare float @llvm.exp10.f32(float) #01818declare void @sincos(double, ptr, ptr)1819declare void @sincosf(float, ptr, ptr)1820