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1; RUN: opt -passes=loop-vectorize -S < %s | FileCheck %s2 3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"4target triple = "x86_64-unknown-linux-gnu"5 6; PR34965/D393467 8; LV retains the original scalar loop intact as remainder loop. However,9; after this transformation, analysis information concerning the remainder10; loop may differ from the original scalar loop. This test is an example of11; that behaviour, where values inside the remainder loop which SCEV could12; originally analyze now require flow-sensitive analysis currently not13; supported in SCEV. In particular, during LV code generation, after turning14; the original scalar loop into the remainder loop, LV expected15; Legal->isConsecutivePtr() to be consistent and return the same output as16; during legal/cost model phases (original scalar loop). Unfortunately, that17; condition was not satisfied because of the aforementioned SCEV limitation.18; After D39346, LV code generation doesn't rely on Legal->isConsecutivePtr(),19; i.e., SCEV. This test verifies that LV is able to handle the described cases.20;21; TODO: The SCEV limitation described before may affect plans to further22; optimize the remainder loop of this particular test case. One tentative23; solution is to detect the problematic IVs in LV (%7 and %8) and perform an24; in-place IV optimization by replacing:25; %8 = phi i32 [ %.ph2, %.outer ], [ %7, %6 ] with26; with27; %8 = sub i32 %7, 1.28 29 30; Verify that store is vectorized as stride-1 memory access.31 32; CHECK-LABEL: @test_01(33; CHECK-NOT: vector.body:34 35; This test was originally vectorized, but now SCEV is smart enough to prove36; that its trip count is 1, so it gets ignored by vectorizer.37; Function Attrs: uwtable38define void @test_01(ptr addrspace(1) %p, i1 %arg) {39 br label %.outer40 41; <label>:1: ; preds = %242 ret void43 44; <label>:2: ; preds = %._crit_edge.loopexit45 %3 = add nsw i32 %.ph, -246 br i1 %arg, label %1, label %.outer47 48.outer: ; preds = %2, %049 %.ph = phi i32 [ %3, %2 ], [ 336, %0 ]50 %.ph2 = phi i32 [ 62, %2 ], [ 110, %0 ]51 %4 = and i32 %.ph, 3052 %5 = add i32 %.ph2, 153 br label %654 55; <label>:6: ; preds = %6, %.outer56 %7 = phi i32 [ %5, %.outer ], [ %13, %6 ]57 %8 = phi i32 [ %.ph2, %.outer ], [ %7, %6 ]58 %9 = add i32 %8, 259 %10 = zext i32 %9 to i6460 %11 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %1061 %12 = ashr i32 12, %462 store i32 %12, ptr addrspace(1) %11, align 463 %13 = add i32 %7, 164 %14 = icmp sgt i32 %13, 6165 br i1 %14, label %._crit_edge.loopexit, label %666 67._crit_edge.loopexit: ; preds = %._crit_edge.loopexit, %668 br i1 %arg, label %2, label %._crit_edge.loopexit69}70 71; After trip count is increased, the test gets vectorized.72; CHECK-LABEL: @test_02(73; CHECK: vector.body:74; CHECK: store <4 x i32>75 76; Function Attrs: uwtable77define void @test_02(ptr addrspace(1) %p, i1 %arg) {78 br label %.outer79 80; <label>:1: ; preds = %281 ret void82 83; <label>:2: ; preds = %._crit_edge.loopexit84 %3 = add nsw i32 %.ph, -285 br i1 %arg, label %1, label %.outer86 87.outer: ; preds = %2, %088 %.ph = phi i32 [ %3, %2 ], [ 336, %0 ]89 %.ph2 = phi i32 [ 62, %2 ], [ 110, %0 ]90 %4 = and i32 %.ph, 3091 %5 = add i32 %.ph2, 192 br label %693 94; <label>:6: ; preds = %6, %.outer95 %7 = phi i32 [ %5, %.outer ], [ %13, %6 ]96 %8 = phi i32 [ %.ph2, %.outer ], [ %7, %6 ]97 %9 = add i32 %8, 298 %10 = zext i32 %9 to i6499 %11 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %10100 %12 = ashr i32 12, %4101 store i32 %12, ptr addrspace(1) %11, align 4102 %13 = add i32 %7, 1103 %14 = icmp sgt i32 %13, 610104 br i1 %14, label %._crit_edge.loopexit, label %6105 106._crit_edge.loopexit: ; preds = %._crit_edge.loopexit, %6107 br i1 %arg, label %2, label %._crit_edge.loopexit108}109