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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 62; RUN: opt < %s -passes=loop-vectorize -S | FileCheck %s3 4; This is a bugpoint reduction of a test from PR43582:5; https://bugs.llvm.org/show_bug.cgi?id=435826 7; ...but it's over-simplifying the underlying question:8; TODO: Should this be vectorized rather than allowing the backend to load combine?9; The original code is a bswap pattern.10 11target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"12target triple = "x86_64-w64-windows-gnu"13 14define void @cff_index_load_offsets(i1 %cond, i8 %x, ptr %p, ptr %pend) #0 {15; CHECK-LABEL: define void @cff_index_load_offsets(16; CHECK-SAME: i1 [[COND:%.*]], i8 [[X:%.*]], ptr [[P:%.*]], ptr [[PEND:%.*]]) #[[ATTR0:[0-9]+]] {17; CHECK-NEXT: [[ENTRY:.*:]]18; CHECK-NEXT: br i1 [[COND]], label %[[IF_THEN:.*]], label %[[EXIT:.*]]19; CHECK: [[IF_THEN]]:20; CHECK-NEXT: br label %[[FOR_BODY68:.*]]21; CHECK: [[FOR_BODY68]]:22; CHECK-NEXT: [[P_359:%.*]] = phi ptr [ [[ADD_PTR86:%.*]], %[[FOR_BODY68]] ], [ null, %[[IF_THEN]] ]23; CHECK-NEXT: [[CONV70:%.*]] = zext i8 [[X]] to i3224; CHECK-NEXT: [[SHL71:%.*]] = shl nuw i32 [[CONV70]], 2425; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[P]], align 1, !tbaa [[CHAR_TBAA1:![0-9]+]]26; CHECK-NEXT: [[CONV73:%.*]] = zext i8 [[TMP0]] to i3227; CHECK-NEXT: [[SHL74:%.*]] = shl nuw nsw i32 [[CONV73]], 1628; CHECK-NEXT: [[OR75:%.*]] = or i32 [[SHL74]], [[SHL71]]29; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[P]], align 1, !tbaa [[CHAR_TBAA1]]30; CHECK-NEXT: [[SHL78:%.*]] = shl nuw nsw i32 12, 831; CHECK-NEXT: [[OR79:%.*]] = or i32 [[OR75]], [[SHL78]]32; CHECK-NEXT: [[CONV81:%.*]] = zext i8 [[TMP1]] to i3233; CHECK-NEXT: [[OR83:%.*]] = or i32 [[OR79]], [[CONV81]]34; CHECK-NEXT: store i32 [[OR83]], ptr [[P]], align 4, !tbaa [[LONG_TBAA4:![0-9]+]]35; CHECK-NEXT: [[ADD_PTR86]] = getelementptr inbounds i8, ptr [[P_359]], i64 436; CHECK-NEXT: [[CMP66:%.*]] = icmp ult ptr [[ADD_PTR86]], [[PEND]]37; CHECK-NEXT: br i1 [[CMP66]], label %[[FOR_BODY68]], label %[[SW_EPILOG:.*]]38; CHECK: [[SW_EPILOG]]:39; CHECK-NEXT: unreachable40; CHECK: [[EXIT]]:41; CHECK-NEXT: ret void42;43entry:44 br i1 %cond, label %if.then, label %Exit45 46if.then: ; preds = %entry47 br label %for.body6848 49for.body68: ; preds = %for.body68, %if.then50 %p.359 = phi ptr [ %add.ptr86, %for.body68 ], [ null, %if.then ]51 %conv70 = zext i8 %x to i3252 %shl71 = shl nuw i32 %conv70, 2453 %0 = load i8, ptr %p, align 1, !tbaa !154 %conv73 = zext i8 %0 to i3255 %shl74 = shl nuw nsw i32 %conv73, 1656 %or75 = or i32 %shl74, %shl7157 %1 = load i8, ptr %p, align 1, !tbaa !158 %shl78 = shl nuw nsw i32 12, 859 %or79 = or i32 %or75, %shl7860 %conv81 = zext i8 %1 to i3261 %or83 = or i32 %or79, %conv8162 store i32 %or83, ptr %p, align 4, !tbaa !463 %add.ptr86 = getelementptr inbounds i8, ptr %p.359, i64 464 %cmp66 = icmp ult ptr %add.ptr86, %pend65 br i1 %cmp66, label %for.body68, label %sw.epilog66 67sw.epilog: ; preds = %for.body6868 unreachable69 70Exit: ; preds = %entry71 ret void72}73 74attributes #0 = { "use-soft-float"="false" }75 76!llvm.ident = !{!0}77 78!0 = !{!"clang version 10.0.0 (https://github.com/llvm/llvm-project.git 0fedc26a0dc0066f3968b9fea6a4e1f746c8d5a4)"}79!1 = !{!2, !2, i64 0}80!2 = !{!"omnipotent char", !3, i64 0}81!3 = !{!"Simple C/C++ TBAA"}82!4 = !{!5, !5, i64 0}83!5 = !{!"long", !2, i64 0}84;.85; CHECK: [[CHAR_TBAA1]] = !{[[META2:![0-9]+]], [[META2]], i64 0}86; CHECK: [[META2]] = !{!"omnipotent char", [[META3:![0-9]+]], i64 0}87; CHECK: [[META3]] = !{!"Simple C/C++ TBAA"}88; CHECK: [[LONG_TBAA4]] = !{[[META5:![0-9]+]], [[META5]], i64 0}89; CHECK: [[META5]] = !{!"long", [[META2]], i64 0}90;.91