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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -p loop-vectorize -mtriple x86_64 -prefer-predicate-over-epilogue=predicate-dont-vectorize -mcpu=skylake-avx512 -S %s | FileCheck %s3 4define void @sdiv_feeding_gep(ptr %dst, i32 %x, i64 %M, i64 %conv6, i64 %N) {5; CHECK-LABEL: define void @sdiv_feeding_gep(6; CHECK-SAME: ptr [[DST:%.*]], i32 [[X:%.*]], i64 [[M:%.*]], i64 [[CONV6:%.*]], i64 [[N:%.*]]) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: [[CONV61:%.*]] = zext i32 [[X]] to i649; CHECK-NEXT: br label %[[VECTOR_SCEVCHECK:.*]]10; CHECK: [[VECTOR_SCEVCHECK]]:11; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], -112; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i3213; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 014; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i64 [[TMP0]], 429496729515; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP2]], [[TMP3]]16; CHECK-NEXT: br i1 [[TMP4]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]17; CHECK: [[VECTOR_PH]]:18; CHECK-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], 319; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], 420; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]21; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[N]], 122; CHECK-NEXT: [[TMP17:%.*]] = sdiv i64 [[M]], [[CONV6]]23; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[TMP17]] to i3224; CHECK-NEXT: [[TMP20:%.*]] = mul i64 [[TMP17]], [[CONV61]]25; CHECK-NEXT: [[TMP23:%.*]] = mul i32 [[X]], [[TMP19]]26; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 027; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT1]], <4 x i64> poison, <4 x i32> zeroinitializer28; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]29; CHECK: [[VECTOR_BODY]]:30; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]31; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i64 032; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer33; CHECK-NEXT: [[VEC_IV:%.*]] = add <4 x i64> [[BROADCAST_SPLAT]], <i64 0, i64 1, i64 2, i64 3>34; CHECK-NEXT: [[TMP6:%.*]] = icmp ule <4 x i64> [[VEC_IV]], [[BROADCAST_SPLAT2]]35; CHECK-NEXT: [[TMP21:%.*]] = sub i64 [[INDEX]], [[TMP20]]36; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i3237; CHECK-NEXT: [[TMP24:%.*]] = add i32 [[TMP23]], [[TMP22]]38; CHECK-NEXT: [[TMP25:%.*]] = sext i32 [[TMP24]] to i6439; CHECK-NEXT: [[TMP26:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP25]]40; CHECK-NEXT: call void @llvm.masked.store.v4f64.p0(<4 x double> zeroinitializer, ptr align 8 [[TMP26]], <4 x i1> [[TMP6]])41; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 442; CHECK-NEXT: [[TMP28:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]43; CHECK-NEXT: br i1 [[TMP28]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]44; CHECK: [[MIDDLE_BLOCK]]:45; CHECK-NEXT: br label %[[EXIT:.*]]46; CHECK: [[SCALAR_PH]]:47; CHECK-NEXT: br label %[[LOOP:.*]]48; CHECK: [[LOOP]]:49; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]50; CHECK-NEXT: [[DIV18:%.*]] = sdiv i64 [[M]], [[CONV6]]51; CHECK-NEXT: [[CONV20:%.*]] = trunc i64 [[DIV18]] to i3252; CHECK-NEXT: [[MUL30:%.*]] = mul i64 [[DIV18]], [[CONV61]]53; CHECK-NEXT: [[SUB31:%.*]] = sub i64 [[IV]], [[MUL30]]54; CHECK-NEXT: [[CONV34:%.*]] = trunc i64 [[SUB31]] to i3255; CHECK-NEXT: [[MUL35:%.*]] = mul i32 [[X]], [[CONV20]]56; CHECK-NEXT: [[ADD36:%.*]] = add i32 [[MUL35]], [[CONV34]]57; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[ADD36]] to i6458; CHECK-NEXT: [[GEP:%.*]] = getelementptr double, ptr [[DST]], i64 [[IDXPROM]]59; CHECK-NEXT: store double 0.000000e+00, ptr [[GEP]], align 860; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 161; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]62; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]63; CHECK: [[EXIT]]:64; CHECK-NEXT: ret void65;66entry:67 %conv61 = zext i32 %x to i6468 br label %loop69 70loop:71 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]72 %div18 = sdiv i64 %M, %conv673 %conv20 = trunc i64 %div18 to i3274 %mul30 = mul i64 %div18, %conv6175 %sub31 = sub i64 %iv, %mul3076 %conv34 = trunc i64 %sub31 to i3277 %mul35 = mul i32 %x, %conv2078 %add36 = add i32 %mul35, %conv3479 %idxprom = sext i32 %add36 to i6480 %gep = getelementptr double, ptr %dst, i64 %idxprom81 store double 0.000000e+00, ptr %gep, align 882 %iv.next = add i64 %iv, 183 %ec = icmp eq i64 %iv.next, %N84 br i1 %ec, label %exit, label %loop85 86exit:87 ret void88}89 90define void @sdiv_feeding_gep_predicated(ptr %dst, i32 %x, i64 %M, i64 %conv6, i64 %N) {91; CHECK-LABEL: define void @sdiv_feeding_gep_predicated(92; CHECK-SAME: ptr [[DST:%.*]], i32 [[X:%.*]], i64 [[M:%.*]], i64 [[CONV6:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {93; CHECK-NEXT: [[ENTRY:.*:]]94; CHECK-NEXT: [[CONV61:%.*]] = zext i32 [[X]] to i6495; CHECK-NEXT: br label %[[VECTOR_SCEVCHECK:.*]]96; CHECK: [[VECTOR_SCEVCHECK]]:97; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], -198; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i3299; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0100; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i64 [[TMP0]], 4294967295101; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP2]], [[TMP3]]102; CHECK-NEXT: br i1 [[TMP4]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]103; CHECK: [[VECTOR_PH]]:104; CHECK-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], 3105; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], 4106; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]107; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[N]], 1108; CHECK-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0109; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT2]], <4 x i64> poison, <4 x i32> zeroinitializer110; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i64> poison, i64 [[M]], i64 0111; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT1]], <4 x i64> poison, <4 x i32> zeroinitializer112; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]113; CHECK: [[VECTOR_BODY]]:114; CHECK-NEXT: [[TMP5:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_SDIV_CONTINUE8:.*]] ]115; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_SDIV_CONTINUE8]] ]116; CHECK-NEXT: [[TMP6:%.*]] = icmp ule <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]117; CHECK-NEXT: [[TMP7:%.*]] = icmp ule <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT2]]118; CHECK-NEXT: [[TMP8:%.*]] = select <4 x i1> [[TMP6]], <4 x i1> [[TMP7]], <4 x i1> zeroinitializer119; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP8]], i32 0120; CHECK-NEXT: br i1 [[TMP9]], label %[[PRED_SDIV_IF:.*]], label %[[PRED_SDIV_CONTINUE:.*]]121; CHECK: [[PRED_SDIV_IF]]:122; CHECK-NEXT: [[TMP10:%.*]] = sdiv i64 [[M]], [[CONV6]]123; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE]]124; CHECK: [[PRED_SDIV_CONTINUE]]:125; CHECK-NEXT: [[TMP11:%.*]] = phi i64 [ poison, %[[VECTOR_BODY]] ], [ [[TMP10]], %[[PRED_SDIV_IF]] ]126; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP8]], i32 1127; CHECK-NEXT: br i1 [[TMP12]], label %[[PRED_SDIV_IF3:.*]], label %[[PRED_SDIV_CONTINUE4:.*]]128; CHECK: [[PRED_SDIV_IF3]]:129; CHECK-NEXT: [[TMP13:%.*]] = sdiv i64 [[M]], [[CONV6]]130; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE4]]131; CHECK: [[PRED_SDIV_CONTINUE4]]:132; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP8]], i32 2133; CHECK-NEXT: br i1 [[TMP15]], label %[[PRED_SDIV_IF5:.*]], label %[[PRED_SDIV_CONTINUE6:.*]]134; CHECK: [[PRED_SDIV_IF5]]:135; CHECK-NEXT: [[TMP16:%.*]] = sdiv i64 [[M]], [[CONV6]]136; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE6]]137; CHECK: [[PRED_SDIV_CONTINUE6]]:138; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP8]], i32 3139; CHECK-NEXT: br i1 [[TMP18]], label %[[PRED_SDIV_IF7:.*]], label %[[PRED_SDIV_CONTINUE8]]140; CHECK: [[PRED_SDIV_IF7]]:141; CHECK-NEXT: [[TMP19:%.*]] = sdiv i64 [[M]], [[CONV6]]142; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE8]]143; CHECK: [[PRED_SDIV_CONTINUE8]]:144; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP11]] to i32145; CHECK-NEXT: [[TMP22:%.*]] = mul i64 [[TMP11]], [[CONV61]]146; CHECK-NEXT: [[TMP23:%.*]] = sub i64 [[TMP5]], [[TMP22]]147; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32148; CHECK-NEXT: [[TMP25:%.*]] = mul i32 [[X]], [[TMP21]]149; CHECK-NEXT: [[TMP26:%.*]] = add i32 [[TMP25]], [[TMP24]]150; CHECK-NEXT: [[TMP27:%.*]] = sext i32 [[TMP26]] to i64151; CHECK-NEXT: [[TMP28:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP27]]152; CHECK-NEXT: call void @llvm.masked.store.v4f64.p0(<4 x double> zeroinitializer, ptr align 8 [[TMP28]], <4 x i1> [[TMP8]])153; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[TMP5]], 4154; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4)155; CHECK-NEXT: [[TMP30:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]156; CHECK-NEXT: br i1 [[TMP30]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]157; CHECK: [[MIDDLE_BLOCK]]:158; CHECK-NEXT: br label %[[EXIT:.*]]159; CHECK: [[SCALAR_PH]]:160; CHECK-NEXT: br label %[[LOOP:.*]]161; CHECK: [[LOOP]]:162; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]163; CHECK-NEXT: [[C:%.*]] = icmp ule i64 [[IV]], [[M]]164; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LOOP_LATCH]]165; CHECK: [[THEN]]:166; CHECK-NEXT: [[DIV18:%.*]] = sdiv i64 [[M]], [[CONV6]]167; CHECK-NEXT: [[CONV20:%.*]] = trunc i64 [[DIV18]] to i32168; CHECK-NEXT: [[MUL30:%.*]] = mul i64 [[DIV18]], [[CONV61]]169; CHECK-NEXT: [[SUB31:%.*]] = sub i64 [[IV]], [[MUL30]]170; CHECK-NEXT: [[CONV34:%.*]] = trunc i64 [[SUB31]] to i32171; CHECK-NEXT: [[MUL35:%.*]] = mul i32 [[X]], [[CONV20]]172; CHECK-NEXT: [[ADD36:%.*]] = add i32 [[MUL35]], [[CONV34]]173; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[ADD36]] to i64174; CHECK-NEXT: [[GEP:%.*]] = getelementptr double, ptr [[DST]], i64 [[IDXPROM]]175; CHECK-NEXT: store double 0.000000e+00, ptr [[GEP]], align 8176; CHECK-NEXT: br label %[[LOOP_LATCH]]177; CHECK: [[LOOP_LATCH]]:178; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1179; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]180; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]181; CHECK: [[EXIT]]:182; CHECK-NEXT: ret void183;184entry:185 %conv61 = zext i32 %x to i64186 br label %loop187 188loop:189 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]190 %c = icmp ule i64 %iv, %M191 br i1 %c, label %then, label %loop.latch192 193then:194 %div18 = sdiv i64 %M, %conv6195 %conv20 = trunc i64 %div18 to i32196 %mul30 = mul i64 %div18, %conv61197 %sub31 = sub i64 %iv, %mul30198 %conv34 = trunc i64 %sub31 to i32199 %mul35 = mul i32 %x, %conv20200 %add36 = add i32 %mul35, %conv34201 %idxprom = sext i32 %add36 to i64202 %gep = getelementptr double, ptr %dst, i64 %idxprom203 store double 0.000000e+00, ptr %gep, align 8204 br label %loop.latch205 206loop.latch:207 %iv.next = add i64 %iv, 1208 %ec = icmp eq i64 %iv.next, %N209 br i1 %ec, label %exit, label %loop210 211exit:212 ret void213}214 215define void @udiv_urem_feeding_gep(i64 %x, ptr %dst, i64 %N) {216; CHECK-LABEL: define void @udiv_urem_feeding_gep(217; CHECK-SAME: i64 [[X:%.*]], ptr [[DST:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {218; CHECK-NEXT: [[ENTRY:.*]]:219; CHECK-NEXT: [[MUL_1_I:%.*]] = mul i64 [[X]], [[X]]220; CHECK-NEXT: [[MUL_2_I:%.*]] = mul i64 [[MUL_1_I]], [[X]]221; CHECK-NEXT: br label %[[LOOP:.*]]222; CHECK: [[LOOP]]:223; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]224; CHECK-NEXT: [[DIV_I:%.*]] = udiv i64 [[IV]], [[MUL_2_I]]225; CHECK-NEXT: [[REM_I:%.*]] = urem i64 [[IV]], [[MUL_2_I]]226; CHECK-NEXT: [[DIV_1_I:%.*]] = udiv i64 [[REM_I]], [[MUL_1_I]]227; CHECK-NEXT: [[REM_1_I:%.*]] = urem i64 [[REM_I]], [[MUL_1_I]]228; CHECK-NEXT: [[DIV_2_I:%.*]] = udiv i64 [[REM_1_I]], [[X]]229; CHECK-NEXT: [[REM_2_I:%.*]] = urem i64 [[REM_1_I]], [[X]]230; CHECK-NEXT: [[MUL_I:%.*]] = mul i64 [[X]], [[DIV_I]]231; CHECK-NEXT: [[ADD_I:%.*]] = add i64 [[MUL_I]], [[DIV_1_I]]232; CHECK-NEXT: [[MUL_1_I9:%.*]] = mul i64 [[ADD_I]], [[X]]233; CHECK-NEXT: [[ADD_1_I:%.*]] = add i64 [[MUL_1_I9]], [[DIV_2_I]]234; CHECK-NEXT: [[MUL_2_I11:%.*]] = mul i64 [[ADD_1_I]], [[X]]235; CHECK-NEXT: [[ADD_2_I:%.*]] = add i64 [[MUL_2_I11]], [[REM_2_I]]236; CHECK-NEXT: [[SEXT_I:%.*]] = shl i64 [[ADD_2_I]], 32237; CHECK-NEXT: [[CONV6_I:%.*]] = ashr i64 [[SEXT_I]], 32238; CHECK-NEXT: [[GEP:%.*]] = getelementptr i64, ptr [[DST]], i64 [[CONV6_I]]239; CHECK-NEXT: store i64 [[DIV_I]], ptr [[GEP]], align 4240; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1241; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV]], [[N]]242; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[LOOP]]243; CHECK: [[EXIT]]:244; CHECK-NEXT: ret void245;246entry:247 %mul.1.i = mul i64 %x, %x248 %mul.2.i = mul i64 %mul.1.i, %x249 br label %loop250 251loop:252 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]253 %div.i = udiv i64 %iv, %mul.2.i254 %rem.i = urem i64 %iv, %mul.2.i255 %div.1.i = udiv i64 %rem.i, %mul.1.i256 %rem.1.i = urem i64 %rem.i, %mul.1.i257 %div.2.i = udiv i64 %rem.1.i, %x258 %rem.2.i = urem i64 %rem.1.i, %x259 %mul.i = mul i64 %x, %div.i260 %add.i = add i64 %mul.i, %div.1.i261 %mul.1.i9 = mul i64 %add.i, %x262 %add.1.i = add i64 %mul.1.i9, %div.2.i263 %mul.2.i11 = mul i64 %add.1.i, %x264 %add.2.i = add i64 %mul.2.i11, %rem.2.i265 %sext.i = shl i64 %add.2.i, 32266 %conv6.i = ashr i64 %sext.i, 32267 %gep = getelementptr i64, ptr %dst, i64 %conv6.i268 store i64 %div.i, ptr %gep, align 4269 %iv.next = add i64 %iv, 1270 %exitcond.not = icmp eq i64 %iv, %N271 br i1 %exitcond.not, label %exit, label %loop272 273exit:274 ret void275}276;.277; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}278; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}279; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}280; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]]}281; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}282; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]]}283;.284