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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize -S -o - %s | FileCheck %s3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"5target triple = "x86_64-pc_linux"6 7define void @firstorderrec(ptr nocapture noundef readonly %x, ptr noalias nocapture noundef writeonly %y, i32 noundef %n) {8; CHECK-LABEL: @firstorderrec(9; CHECK-NEXT: entry:10; CHECK-NEXT: [[CMP18:%.*]] = icmp sgt i32 [[N:%.*]], 111; CHECK-NEXT: br i1 [[CMP18]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]12; CHECK: for.body.preheader:13; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i6414; CHECK-NEXT: [[DOTPRE:%.*]] = load i8, ptr [[X:%.*]], align 115; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -116; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 3217; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]18; CHECK: vector.ph:19; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 3220; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]21; CHECK-NEXT: [[IND_END:%.*]] = add i64 1, [[N_VEC]]22; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <16 x i8> poison, i8 [[DOTPRE]], i32 1523; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]24; CHECK: vector.body:25; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]26; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <16 x i8> [ [[VECTOR_RECUR_INIT]], [[VECTOR_PH]] ], [ [[WIDE_LOAD1:%.*]], [[VECTOR_BODY]] ]27; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]28; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 [[OFFSET_IDX]]29; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[TMP3]], i64 1630; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP3]], align 131; CHECK-NEXT: [[WIDE_LOAD1]] = load <16 x i8>, ptr [[TMP6]], align 132; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <16 x i8> [[VECTOR_RECUR]], <16 x i8> [[WIDE_LOAD]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>33; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <16 x i8> [[WIDE_LOAD]], <16 x i8> [[WIDE_LOAD1]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>34; CHECK-NEXT: [[TMP9:%.*]] = add <16 x i8> [[WIDE_LOAD]], [[TMP7]]35; CHECK-NEXT: [[TMP10:%.*]] = add <16 x i8> [[WIDE_LOAD1]], [[TMP8]]36; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[Y:%.*]], i64 [[OFFSET_IDX]]37; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr [[TMP11]], i64 1638; CHECK-NEXT: store <16 x i8> [[TMP9]], ptr [[TMP11]], align 139; CHECK-NEXT: store <16 x i8> [[TMP10]], ptr [[TMP14]], align 140; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 3241; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]42; CHECK-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]43; CHECK: middle.block:44; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <16 x i8> [[WIDE_LOAD1]], i32 1545; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]46; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]]47; CHECK: scalar.ph:48; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i8 [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ], [ [[DOTPRE]], [[FOR_BODY_PREHEADER]] ]49; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 1, [[FOR_BODY_PREHEADER]] ]50; CHECK-NEXT: br label [[FOR_BODY:%.*]]51; CHECK: for.cond.cleanup.loopexit:52; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]53; CHECK: for.cond.cleanup:54; CHECK-NEXT: ret void55; CHECK: for.body:56; CHECK-NEXT: [[TMP16:%.*]] = phi i8 [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[TMP17:%.*]], [[FOR_BODY]] ]57; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]58; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 [[INDVARS_IV]]59; CHECK-NEXT: [[TMP17]] = load i8, ptr [[ARRAYIDX4]], align 160; CHECK-NEXT: [[ADD7:%.*]] = add i8 [[TMP17]], [[TMP16]]61; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i8, ptr [[Y]], i64 [[INDVARS_IV]]62; CHECK-NEXT: store i8 [[ADD7]], ptr [[ARRAYIDX10]], align 163; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 164; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]65; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]66;67entry:68 %cmp18 = icmp sgt i32 %n, 169 br i1 %cmp18, label %for.body.preheader, label %for.cond.cleanup70 71for.body.preheader: ; preds = %entry72 %wide.trip.count = zext i32 %n to i6473 %.pre = load i8, ptr %x, align 174 br label %for.body75 76for.cond.cleanup: ; preds = %for.body, %entry77 ret void78 79for.body: ; preds = %for.body.preheader, %for.body80 %0 = phi i8 [ %.pre, %for.body.preheader ], [ %1, %for.body ]81 %indvars.iv = phi i64 [ 1, %for.body.preheader ], [ %indvars.iv.next, %for.body ]82 %arrayidx4 = getelementptr inbounds i8, ptr %x, i64 %indvars.iv83 %1 = load i8, ptr %arrayidx4, align 184 %add7 = add i8 %1, %085 %arrayidx10 = getelementptr inbounds i8, ptr %y, i64 %indvars.iv86 store i8 %add7, ptr %arrayidx10, align 187 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 188 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count89 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body90}91 92define void @thirdorderrec(ptr nocapture noundef readonly %x, ptr noalias nocapture noundef writeonly %y, i32 noundef %n) {93; CHECK-LABEL: @thirdorderrec(94; CHECK-NEXT: entry:95; CHECK-NEXT: [[CMP38:%.*]] = icmp sgt i32 [[N:%.*]], 396; CHECK-NEXT: br i1 [[CMP38]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]97; CHECK: for.body.preheader:98; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i6499; CHECK-NEXT: [[DOTPRE:%.*]] = load i8, ptr [[X:%.*]], align 1100; CHECK-NEXT: [[ARRAYIDX5_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 1101; CHECK-NEXT: [[DOTPRE44:%.*]] = load i8, ptr [[ARRAYIDX5_PHI_TRANS_INSERT]], align 1102; CHECK-NEXT: [[ARRAYIDX12_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 2103; CHECK-NEXT: [[DOTPRE45:%.*]] = load i8, ptr [[ARRAYIDX12_PHI_TRANS_INSERT]], align 1104; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -3105; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32106; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]107; CHECK: vector.ph:108; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 32109; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]110; CHECK-NEXT: [[IND_END:%.*]] = add i64 3, [[N_VEC]]111; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <16 x i8> poison, i8 [[DOTPRE45]], i32 15112; CHECK-NEXT: [[VECTOR_RECUR_INIT1:%.*]] = insertelement <16 x i8> poison, i8 [[DOTPRE44]], i32 15113; CHECK-NEXT: [[VECTOR_RECUR_INIT3:%.*]] = insertelement <16 x i8> poison, i8 [[DOTPRE]], i32 15114; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]115; CHECK: vector.body:116; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]117; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <16 x i8> [ [[VECTOR_RECUR_INIT]], [[VECTOR_PH]] ], [ [[WIDE_LOAD5:%.*]], [[VECTOR_BODY]] ]118; CHECK-NEXT: [[VECTOR_RECUR2:%.*]] = phi <16 x i8> [ [[VECTOR_RECUR_INIT1]], [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ]119; CHECK-NEXT: [[VECTOR_RECUR4:%.*]] = phi <16 x i8> [ [[VECTOR_RECUR_INIT3]], [[VECTOR_PH]] ], [ [[TMP10:%.*]], [[VECTOR_BODY]] ]120; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 3, [[INDEX]]121; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 [[OFFSET_IDX]]122; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[TMP3]], i64 16123; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP3]], align 1124; CHECK-NEXT: [[WIDE_LOAD5]] = load <16 x i8>, ptr [[TMP6]], align 1125; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <16 x i8> [[VECTOR_RECUR]], <16 x i8> [[WIDE_LOAD]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>126; CHECK-NEXT: [[TMP8]] = shufflevector <16 x i8> [[WIDE_LOAD]], <16 x i8> [[WIDE_LOAD5]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>127; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <16 x i8> [[VECTOR_RECUR2]], <16 x i8> [[TMP7]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>128; CHECK-NEXT: [[TMP10]] = shufflevector <16 x i8> [[TMP7]], <16 x i8> [[TMP8]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>129; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <16 x i8> [[VECTOR_RECUR4]], <16 x i8> [[TMP9]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>130; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <16 x i8> [[TMP9]], <16 x i8> [[TMP10]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>131; CHECK-NEXT: [[TMP13:%.*]] = add <16 x i8> [[TMP9]], [[TMP11]]132; CHECK-NEXT: [[TMP14:%.*]] = add <16 x i8> [[TMP10]], [[TMP12]]133; CHECK-NEXT: [[TMP15:%.*]] = add <16 x i8> [[TMP13]], [[TMP7]]134; CHECK-NEXT: [[TMP16:%.*]] = add <16 x i8> [[TMP14]], [[TMP8]]135; CHECK-NEXT: [[TMP17:%.*]] = add <16 x i8> [[TMP15]], [[WIDE_LOAD]]136; CHECK-NEXT: [[TMP18:%.*]] = add <16 x i8> [[TMP16]], [[WIDE_LOAD5]]137; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i8, ptr [[Y:%.*]], i64 [[OFFSET_IDX]]138; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, ptr [[TMP19]], i64 16139; CHECK-NEXT: store <16 x i8> [[TMP17]], ptr [[TMP19]], align 1140; CHECK-NEXT: store <16 x i8> [[TMP18]], ptr [[TMP22]], align 1141; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 32142; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]143; CHECK-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]144; CHECK: middle.block:145; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <16 x i8> [[WIDE_LOAD5]], i32 15146; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT6:%.*]] = extractelement <16 x i8> [[TMP8]], i32 15147; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT7:%.*]] = extractelement <16 x i8> [[TMP10]], i32 15148; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]149; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]]150; CHECK: scalar.ph:151; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i8 [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ], [ [[DOTPRE45]], [[FOR_BODY_PREHEADER]] ]152; CHECK-NEXT: [[SCALAR_RECUR_INIT8:%.*]] = phi i8 [ [[VECTOR_RECUR_EXTRACT6]], [[MIDDLE_BLOCK]] ], [ [[DOTPRE44]], [[FOR_BODY_PREHEADER]] ]153; CHECK-NEXT: [[SCALAR_RECUR_INIT9:%.*]] = phi i8 [ [[VECTOR_RECUR_EXTRACT7]], [[MIDDLE_BLOCK]] ], [ [[DOTPRE]], [[FOR_BODY_PREHEADER]] ]154; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 3, [[FOR_BODY_PREHEADER]] ]155; CHECK-NEXT: br label [[FOR_BODY:%.*]]156; CHECK: for.cond.cleanup.loopexit:157; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]158; CHECK: for.cond.cleanup:159; CHECK-NEXT: ret void160; CHECK: for.body:161; CHECK-NEXT: [[TMP24:%.*]] = phi i8 [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[TMP27:%.*]], [[FOR_BODY]] ]162; CHECK-NEXT: [[TMP25:%.*]] = phi i8 [ [[SCALAR_RECUR_INIT8]], [[SCALAR_PH]] ], [ [[TMP24]], [[FOR_BODY]] ]163; CHECK-NEXT: [[TMP26:%.*]] = phi i8 [ [[SCALAR_RECUR_INIT9]], [[SCALAR_PH]] ], [ [[TMP25]], [[FOR_BODY]] ]164; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]165; CHECK-NEXT: [[ADD8:%.*]] = add i8 [[TMP25]], [[TMP26]]166; CHECK-NEXT: [[ADD15:%.*]] = add i8 [[ADD8]], [[TMP24]]167; CHECK-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 [[INDVARS_IV]]168; CHECK-NEXT: [[TMP27]] = load i8, ptr [[ARRAYIDX18]], align 1169; CHECK-NEXT: [[ADD21:%.*]] = add i8 [[ADD15]], [[TMP27]]170; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, ptr [[Y]], i64 [[INDVARS_IV]]171; CHECK-NEXT: store i8 [[ADD21]], ptr [[ARRAYIDX24]], align 1172; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1173; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]174; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]175;176entry:177 %cmp38 = icmp sgt i32 %n, 3178 br i1 %cmp38, label %for.body.preheader, label %for.cond.cleanup179 180for.body.preheader: ; preds = %entry181 %wide.trip.count = zext i32 %n to i64182 %.pre = load i8, ptr %x, align 1183 %arrayidx5.phi.trans.insert = getelementptr inbounds i8, ptr %x, i64 1184 %.pre44 = load i8, ptr %arrayidx5.phi.trans.insert, align 1185 %arrayidx12.phi.trans.insert = getelementptr inbounds i8, ptr %x, i64 2186 %.pre45 = load i8, ptr %arrayidx12.phi.trans.insert, align 1187 br label %for.body188 189for.cond.cleanup: ; preds = %for.body, %entry190 ret void191 192for.body: ; preds = %for.body.preheader, %for.body193 %0 = phi i8 [ %.pre45, %for.body.preheader ], [ %3, %for.body ]194 %1 = phi i8 [ %.pre44, %for.body.preheader ], [ %0, %for.body ]195 %2 = phi i8 [ %.pre, %for.body.preheader ], [ %1, %for.body ]196 %indvars.iv = phi i64 [ 3, %for.body.preheader ], [ %indvars.iv.next, %for.body ]197 %add8 = add i8 %1, %2198 %add15 = add i8 %add8, %0199 %arrayidx18 = getelementptr inbounds i8, ptr %x, i64 %indvars.iv200 %3 = load i8, ptr %arrayidx18, align 1201 %add21 = add i8 %add15, %3202 %arrayidx24 = getelementptr inbounds i8, ptr %y, i64 %indvars.iv203 store i8 %add21, ptr %arrayidx24, align 1204 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1205 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count206 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body207}208 209define i64 @test_pr62954_scalar_epilogue_required(ptr %A, ptr noalias %B, ptr %C) {210; CHECK-LABEL: @test_pr62954_scalar_epilogue_required(211; CHECK-NEXT: entry:212; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 872213; CHECK-NEXT: [[REC_START:%.*]] = load i64, ptr [[GEP]], align 8214; CHECK-NEXT: br label [[VECTOR_PH:%.*]]215; CHECK: vector.ph:216; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]217; CHECK: vector.body:218; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]219; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 1, i64 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]220; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i64> [[VEC_IND]], splat (i64 4)221; CHECK-NEXT: [[TMP1:%.*]] = sub nsw <2 x i64> zeroinitializer, [[STEP_ADD]]222; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i64> [[TMP1]], i32 1223; CHECK-NEXT: store i64 [[TMP2]], ptr [[GEP]], align 8224; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4225; CHECK-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <2 x i64> [[STEP_ADD]], splat (i64 4)226; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 36227; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]228; CHECK: middle.block:229; CHECK-NEXT: br label [[SCALAR_PH:%.*]]230; CHECK: scalar.ph:231; CHECK-NEXT: br label [[LOOP:%.*]]232; CHECK: loop:233; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 73, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]234; CHECK-NEXT: [[FOR:%.*]] = phi i64 [ [[TMP2]], [[SCALAR_PH]] ], [ [[NEG_IV:%.*]], [[LOOP]] ]235; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr double, ptr [[B:%.*]], i64 [[IV]]236; CHECK-NEXT: [[L_B:%.*]] = load double, ptr [[GEP_B]], align 8237; CHECK-NEXT: [[NEG_IV]] = sub nsw i64 0, [[IV]]238; CHECK-NEXT: store i64 [[NEG_IV]], ptr [[GEP]], align 8239; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 2240; CHECK-NEXT: [[EC:%.*]] = icmp ugt i64 [[IV]], 74241; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP7:![0-9]+]]242; CHECK: exit:243; CHECK-NEXT: [[DOTIN_LCSSA:%.*]] = phi i64 [ [[FOR]], [[LOOP]] ]244; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi double [ [[L_B]], [[LOOP]] ]245; CHECK-NEXT: store double [[DOTLCSSA]], ptr [[C:%.*]], align 8246; CHECK-NEXT: ret i64 [[DOTIN_LCSSA]]247;248entry:249 %gep = getelementptr i8, ptr %A, i64 872250 %rec.start = load i64, ptr %gep, align 8251 br label %loop252 253loop:254 %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop ]255 %for = phi i64 [ %rec.start, %entry ], [ %neg.iv, %loop ]256 %gep.B = getelementptr double, ptr %B, i64 %iv257 %l.B = load double, ptr %gep.B, align 8258 %neg.iv = sub nsw i64 0, %iv259 store i64 %neg.iv, ptr %gep, align 8260 %iv.next = add nuw nsw i64 %iv, 2261 %ec = icmp ugt i64 %iv, 74262 br i1 %ec, label %exit, label %loop263 264exit:265 %.in.lcssa = phi i64 [ %for, %loop ]266 %.lcssa = phi double [ %l.B, %loop ]267 store double %.lcssa, ptr %C268 ret i64 %.in.lcssa269}270 271; Test for https://github.com/llvm/llvm-project/issues/106523.272; %for.2 requires no code motion, as its previous (%or) precedes its (first)273; user (store). Furthermore, its user cannot sink, being a store.274;275; %for.1 requires code motion, as its previous (%trunc) follows its (first)276; user (%or). Sinking %or past %trunc seems possible, as %or has no uses277; (except for feeding %for.2; worth strengthening VPlan's dce?). However, %or278; is both the user of %for.1 and the previous of %for.2, and we refrain from279; sinking instructions that act as previous because they (may) serve points to280; sink after.281 282; Instead, %for.1 can be reconciled by hoisting its previous above its user283; %or, as this user %trunc depends only on %iv.284define void @for_iv_trunc_optimized(ptr %dst) {285; CHECK-LABEL: @for_iv_trunc_optimized(286; CHECK-NEXT: bb:287; CHECK-NEXT: br label [[VECTOR_PH:%.*]]288; CHECK: vector.ph:289; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]290; CHECK: vector.body:291; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]292; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 1>, [[VECTOR_PH]] ], [ [[STEP_ADD:%.*]], [[VECTOR_BODY]] ]293; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 1, i32 2, i32 3, i32 4>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]294; CHECK-NEXT: [[STEP_ADD]] = add <4 x i32> [[VEC_IND]], splat (i32 4)295; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[VEC_IND]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>296; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[VEC_IND]], <4 x i32> [[STEP_ADD]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>297; CHECK-NEXT: [[TMP2:%.*]] = or <4 x i32> [[TMP0]], splat (i32 3)298; CHECK-NEXT: [[TMP3:%.*]] = or <4 x i32> [[TMP1]], splat (i32 3)299; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> [[TMP3]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>300; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP5]], i32 3301; CHECK-NEXT: store i32 [[TMP6]], ptr [[DST:%.*]], align 4302; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8303; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[STEP_ADD]], splat (i32 4)304; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 336305; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]306; CHECK: middle.block:307; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[STEP_ADD]], i32 3308; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT3:%.*]] = extractelement <4 x i32> [[TMP3]], i32 3309; CHECK-NEXT: br label [[SCALAR_PH:%.*]]310; CHECK: scalar.ph:311; CHECK-NEXT: br label [[LOOP:%.*]]312; CHECK: loop:313; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 337, [[SCALAR_PH]] ], [ [[ADD:%.*]], [[LOOP]] ]314; CHECK-NEXT: [[FOR_1:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], [[SCALAR_PH]] ], [ [[TRUNC:%.*]], [[LOOP]] ]315; CHECK-NEXT: [[FOR_2:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT3]], [[SCALAR_PH]] ], [ [[OR:%.*]], [[LOOP]] ]316; CHECK-NEXT: [[OR]] = or i32 [[FOR_1]], 3317; CHECK-NEXT: [[ADD]] = add i64 [[IV]], 1318; CHECK-NEXT: store i32 [[FOR_2]], ptr [[DST]], align 4319; CHECK-NEXT: [[ICMP:%.*]] = icmp ult i64 [[IV]], 337320; CHECK-NEXT: [[TRUNC]] = trunc i64 [[IV]] to i32321; CHECK-NEXT: br i1 [[ICMP]], label [[LOOP]], label [[EXIT:%.*]], !llvm.loop [[LOOP9:![0-9]+]]322; CHECK: exit:323; CHECK-NEXT: ret void324;325bb:326 br label %loop327 328loop:329 %iv = phi i64 [ 1, %bb ], [ %add, %loop ]330 %for.1 = phi i32 [ 1, %bb ], [ %trunc, %loop ]331 %for.2 = phi i32 [ 0, %bb ], [ %or, %loop ]332 %or = or i32 %for.1, 3333 %add = add i64 %iv, 1334 store i32 %for.2, ptr %dst, align 4335 %icmp = icmp ult i64 %iv, 337336 %trunc = trunc i64 %iv to i32337 br i1 %icmp, label %loop, label %exit338 339exit:340 ret void341}342 343define void @test_for_tried_to_force_scalar(ptr noalias %A, ptr noalias %B, ptr noalias %C, i64 %n) #0 {344; CHECK-LABEL: @test_for_tried_to_force_scalar(345; CHECK-NEXT: entry:346; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], 1347; CHECK-NEXT: [[CONFLICT_RDX20:%.*]] = icmp ule i64 [[TMP0]], 8348; CHECK-NEXT: br i1 [[CONFLICT_RDX20]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]349; CHECK: vector.ph:350; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 8351; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[N_MOD_VF]], 0352; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i64 8, i64 [[N_MOD_VF]]353; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[TMP4]]354; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]355; CHECK: vector.body:356; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]357; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 0358; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 1359; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 2360; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], 3361; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 4362; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 5363; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 6364; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], 7365; CHECK-NEXT: [[TMP13:%.*]] = getelementptr nusw [3 x float], ptr [[A:%.*]], i64 [[TMP5]]366; CHECK-NEXT: [[TMP14:%.*]] = getelementptr nusw [3 x float], ptr [[A]], i64 [[TMP6]]367; CHECK-NEXT: [[TMP15:%.*]] = getelementptr nusw [3 x float], ptr [[A]], i64 [[TMP7]]368; CHECK-NEXT: [[TMP16:%.*]] = getelementptr nusw [3 x float], ptr [[A]], i64 [[TMP8]]369; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP13]], i32 0370; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x ptr> [[TMP17]], ptr [[TMP14]], i32 1371; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x ptr> [[TMP18]], ptr [[TMP15]], i32 2372; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x ptr> [[TMP19]], ptr [[TMP16]], i32 3373; CHECK-NEXT: [[TMP21:%.*]] = getelementptr nusw [3 x float], ptr [[A]], i64 [[TMP9]]374; CHECK-NEXT: [[TMP22:%.*]] = getelementptr nusw [3 x float], ptr [[A]], i64 [[TMP10]]375; CHECK-NEXT: [[TMP23:%.*]] = getelementptr nusw [3 x float], ptr [[A]], i64 [[TMP11]]376; CHECK-NEXT: [[TMP24:%.*]] = getelementptr nusw [3 x float], ptr [[A]], i64 [[TMP12]]377; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP21]], i32 0378; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x ptr> [[TMP25]], ptr [[TMP22]], i32 1379; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x ptr> [[TMP26]], ptr [[TMP23]], i32 2380; CHECK-NEXT: [[TMP28:%.*]] = insertelement <4 x ptr> [[TMP27]], ptr [[TMP24]], i32 3381; CHECK-NEXT: [[TMP29:%.*]] = shufflevector <4 x ptr> [[TMP20]], <4 x ptr> [[TMP28]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>382; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <12 x float>, ptr [[TMP21]], align 4383; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <12 x float> [[WIDE_VEC]], <12 x float> poison, <4 x i32> <i32 0, i32 3, i32 6, i32 9>384; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x float> [[STRIDED_VEC]], i32 3385; CHECK-NEXT: store float [[TMP30]], ptr [[C:%.*]], align 4386; CHECK-NEXT: [[TMP37:%.*]] = extractelement <4 x ptr> [[TMP29]], i32 3387; CHECK-NEXT: [[TMP36:%.*]] = load float, ptr [[TMP37]], align 4388; CHECK-NEXT: store float [[TMP36]], ptr [[B:%.*]], align 4389; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8390; CHECK-NEXT: [[TMP39:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]391; CHECK-NEXT: br i1 [[TMP39]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]392; CHECK: middle.block:393; CHECK-NEXT: br label [[SCALAR_PH]]394; CHECK: scalar.ph:395; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]396; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi ptr [ [[TMP24]], [[MIDDLE_BLOCK]] ], [ [[A]], [[ENTRY]] ]397; CHECK-NEXT: br label [[LOOP:%.*]]398; CHECK: loop:399; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]400; CHECK-NEXT: [[PREV:%.*]] = phi ptr [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[NEXT:%.*]], [[LOOP]] ]401; CHECK-NEXT: [[NEXT]] = getelementptr nusw [3 x float], ptr [[A]], i64 [[IV]]402; CHECK-NEXT: [[TMP40:%.*]] = load float, ptr [[NEXT]], align 4403; CHECK-NEXT: store float [[TMP40]], ptr [[C]], align 4404; CHECK-NEXT: [[TMP41:%.*]] = load float, ptr [[PREV]], align 4405; CHECK-NEXT: store float [[TMP41]], ptr [[B]], align 4406; CHECK-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 1407; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV]], [[N]]408; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP11:![0-9]+]]409; CHECK: exit:410; CHECK-NEXT: ret void411;412entry:413 br label %loop414 415loop:416 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]417 %prev = phi ptr [ %A, %entry ], [ %next, %loop ]418 %next = getelementptr nusw [3 x float], ptr %A, i64 %iv419 %0 = load float, ptr %next, align 4420 store float %0, ptr %C, align 4421 %1 = load float, ptr %prev, align 4422 store float %1, ptr %B, align 4423 %iv.next = add nsw i64 %iv, 1424 %exitcond.not = icmp eq i64 %iv, %n425 br i1 %exitcond.not, label %exit, label %loop426 427exit:428 ret void429}430 431; Make sure we don't consider first order recurrence phis as profitable to scalarize.432; Test case for https://github.com/llvm/llvm-project/issues/139060 and433; https://github.com/llvm/llvm-project/issues/139065.434define void @test_first_order_recurrence_tried_to_scalarized(ptr %dst, i1 %c, i32 %x) {435; CHECK-LABEL: @test_first_order_recurrence_tried_to_scalarized(436; CHECK-NEXT: entry:437; CHECK-NEXT: [[N:%.*]] = select i1 [[C:%.*]], i32 8, i32 9438; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]439; CHECK: loop:440; CHECK-NEXT: [[TMP18:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[VECTOR_BODY]] ]441; CHECK-NEXT: [[TMP15:%.*]] = phi i32 [ 4, [[ENTRY]] ], [ [[TMP18]], [[VECTOR_BODY]] ]442; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[TMP18]], 1443; CHECK-NEXT: [[TMP16:%.*]] = sub nsw i32 10, [[TMP15]]444; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw i32, ptr [[DST:%.*]], i32 [[TMP18]]445; CHECK-NEXT: store i32 [[TMP16]], ptr [[TMP19]], align 4446; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]447; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[VECTOR_BODY]]448; CHECK: exit:449; CHECK-NEXT: ret void450;451entry:452 %N = select i1 %c, i32 8, i32 9453 br label %loop454 455loop:456 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]457 %for = phi i32 [ 4, %entry ], [ %iv, %loop ]458 %iv.next = add nuw nsw i32 %iv, 1459 %sub = sub nsw i32 10, %for460 %gep.dst = getelementptr inbounds nuw i32, ptr %dst, i32 %iv461 store i32 %sub, ptr %gep.dst, align 4462 %ec = icmp eq i32 %iv.next, %N463 br i1 %ec, label %exit, label %loop464 465exit:466 ret void467}468 469 470attributes #0 = { "target-cpu"="znver3" }471