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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -p loop-vectorize -mtriple=x86_64-apple-macosx -mcpu=skylake-avx512 -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s3 4; Test case for https://github.com/llvm/llvm-project/issues/102934.5define void @gep_use_in_dead_block(ptr noalias %dst, ptr %src) {6; CHECK-LABEL: define void @gep_use_in_dead_block(7; CHECK-SAME: ptr noalias [[DST:%.*]], ptr [[SRC:%.*]]) #[[ATTR0:[0-9]+]] {8; CHECK-NEXT: [[ENTRY:.*:]]9; CHECK-NEXT: br label %[[VECTOR_PH:.*]]10; CHECK: [[VECTOR_PH]]:11; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]12; CHECK: [[VECTOR_BODY]]:13; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]14; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i16, ptr [[SRC]], i64 [[TMP0]]15; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i16>, ptr [[TMP4]], align 216; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <4 x i16> [[WIDE_LOAD]], splat (i16 10)17; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i16, ptr [[DST]], i64 [[TMP0]]18; CHECK-NEXT: call void @llvm.masked.store.v4i16.p0(<4 x i16> zeroinitializer, ptr align 2 [[TMP8]], <4 x i1> [[TMP7]])19; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP0]], 420; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], 9621; CHECK-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]22; CHECK: [[MIDDLE_BLOCK]]:23; CHECK-NEXT: br label %[[SCALAR_PH:.*]]24; CHECK: [[SCALAR_PH]]:25; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]26; CHECK: [[LOOP_HEADER]]:27; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 96, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]28; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr i16, ptr [[SRC]], i64 [[IV]]29; CHECK-NEXT: [[L:%.*]] = load i16, ptr [[GEP_SRC]], align 230; CHECK-NEXT: [[C:%.*]] = icmp eq i16 [[L]], 1031; CHECK-NEXT: br i1 [[C]], label %[[LOOP_LATCH]], label %[[THEN:.*]]32; CHECK: [[THEN]]:33; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr i16, ptr [[DST]], i64 [[IV]]34; CHECK-NEXT: store i16 0, ptr [[GEP_DST]], align 235; CHECK-NEXT: br label %[[LOOP_LATCH]]36; CHECK: [[DEAD:.*]]:37; CHECK-NEXT: store i16 0, ptr [[GEP_DST]], align 238; CHECK-NEXT: br label %[[DEAD]]39; CHECK: [[LOOP_LATCH]]:40; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 141; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 9942; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]43; CHECK: [[EXIT]]:44; CHECK-NEXT: ret void45;46entry:47 br label %loop.header48 49loop.header:50 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]51 %gep.src = getelementptr i16, ptr %src, i64 %iv52 %l = load i16, ptr %gep.src53 %c = icmp eq i16 %l, 1054 br i1 %c, label %loop.latch, label %then55 56then:57 %gep.dst = getelementptr i16, ptr %dst, i64 %iv58 store i16 0, ptr %gep.dst, align 259 br label %loop.latch60 61dead:62 store i16 0, ptr %gep.dst, align 263 br label %dead64 65loop.latch:66 %iv.next = add i64 %iv, 167 %ec = icmp eq i64 %iv.next, 9968 br i1 %ec, label %exit, label %loop.header69 70exit:71 ret void72}73 74define void @gep_use_outside_loop(ptr noalias %dst, ptr %src) {75; CHECK-LABEL: define void @gep_use_outside_loop(76; CHECK-SAME: ptr noalias [[DST:%.*]], ptr [[SRC:%.*]]) #[[ATTR0]] {77; CHECK-NEXT: [[ENTRY:.*:]]78; CHECK-NEXT: br label %[[VECTOR_PH:.*]]79; CHECK: [[VECTOR_PH]]:80; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]81; CHECK: [[VECTOR_BODY]]:82; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]83; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]84; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i16, ptr [[DST]], <4 x i64> [[VEC_IND]]85; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x ptr> [[TMP1]], i32 086; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i16, ptr [[SRC]], i64 [[TMP0]]87; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i16>, ptr [[TMP2]], align 288; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <4 x i16> [[WIDE_LOAD]], splat (i16 10)89; CHECK-NEXT: call void @llvm.masked.store.v4i16.p0(<4 x i16> zeroinitializer, ptr align 2 [[TMP6]], <4 x i1> [[TMP5]])90; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP0]], 491; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4)92; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 9693; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]94; CHECK: [[MIDDLE_BLOCK]]:95; CHECK-NEXT: br label %[[SCALAR_PH:.*]]96; CHECK: [[SCALAR_PH]]:97; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]98; CHECK: [[LOOP_HEADER]]:99; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 96, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]100; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr i16, ptr [[DST]], i64 [[IV]]101; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr i16, ptr [[SRC]], i64 [[IV]]102; CHECK-NEXT: [[L:%.*]] = load i16, ptr [[GEP_SRC]], align 2103; CHECK-NEXT: [[C:%.*]] = icmp eq i16 [[L]], 10104; CHECK-NEXT: br i1 [[C]], label %[[LOOP_LATCH]], label %[[THEN:.*]]105; CHECK: [[THEN]]:106; CHECK-NEXT: store i16 0, ptr [[GEP_DST]], align 2107; CHECK-NEXT: br label %[[LOOP_LATCH]]108; CHECK: [[LOOP_LATCH]]:109; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1110; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 99111; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP5:![0-9]+]]112; CHECK: [[EXIT]]:113; CHECK-NEXT: [[GEP_DST_LCSSA:%.*]] = phi ptr [ [[GEP_DST]], %[[LOOP_LATCH]] ]114; CHECK-NEXT: store i16 0, ptr [[GEP_DST_LCSSA]], align 2115; CHECK-NEXT: ret void116;117entry:118 br label %loop.header119 120loop.header:121 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]122 %gep.dst = getelementptr i16, ptr %dst, i64 %iv123 %gep.src = getelementptr i16, ptr %src, i64 %iv124 %l = load i16, ptr %gep.src125 %c = icmp eq i16 %l, 10126 br i1 %c, label %loop.latch, label %then127 128then:129 store i16 0, ptr %gep.dst, align 2130 br label %loop.latch131 132loop.latch:133 %iv.next = add i64 %iv, 1134 %ec = icmp eq i64 %iv.next, 99135 br i1 %ec, label %exit, label %loop.header136 137exit:138 store i16 0, ptr %gep.dst, align 2139 ret void140}141;.142; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}143; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}144; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}145; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}146; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}147; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]}148;.149