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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s3 4target triple = "x86_64-unknown-linux-gnu"5 6define i16 @wide_add_induction_step_live_in(ptr %dst, i64 %N, i16 %off) {7; CHECK-LABEL: @wide_add_induction_step_live_in(8; CHECK-NEXT: entry:9; CHECK-NEXT: [[O_1:%.*]] = add i16 [[OFF:%.*]], 210; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 811; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]12; CHECK: vector.ph:13; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 814; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]15; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i16> poison, i16 [[O_1]], i64 016; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i16> [[BROADCAST_SPLATINSERT]], <4 x i16> poison, <4 x i32> zeroinitializer17; CHECK-NEXT: [[DOTCAST:%.*]] = trunc i64 [[N_VEC]] to i1618; CHECK-NEXT: [[TMP0:%.*]] = mul i16 [[DOTCAST]], [[O_1]]19; CHECK-NEXT: [[TMP1:%.*]] = mul <4 x i16> splat (i16 4), [[BROADCAST_SPLAT]]20; CHECK-NEXT: [[TMP2:%.*]] = mul <4 x i16> <i16 0, i16 1, i16 2, i16 3>, [[BROADCAST_SPLAT]]21; CHECK-NEXT: [[INDUCTION:%.*]] = add <4 x i16> zeroinitializer, [[TMP2]]22; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]23; CHECK: vector.body:24; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]25; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i16> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]26; CHECK-NEXT: [[STEP_ADD:%.*]] = add <4 x i16> [[VEC_IND]], [[TMP1]]27; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i16> [[VEC_IND]], [[BROADCAST_SPLAT]]28; CHECK-NEXT: [[TMP9:%.*]] = add <4 x i16> [[STEP_ADD]], [[BROADCAST_SPLAT]]29; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i16, ptr [[DST:%.*]], i64 [[INDEX]]30; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i16, ptr [[TMP5]], i64 431; CHECK-NEXT: store <4 x i16> [[TMP4]], ptr [[TMP5]], align 232; CHECK-NEXT: store <4 x i16> [[TMP9]], ptr [[TMP8]], align 233; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 834; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i16> [[STEP_ADD]], [[TMP1]]35; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]36; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]37; CHECK: middle.block:38; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]39; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]40; CHECK: scalar.ph:41; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]42; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i16 [ [[TMP0]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]43; CHECK-NEXT: br label [[LOOP:%.*]]44; CHECK: loop:45; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]46; CHECK-NEXT: [[IV_2:%.*]] = phi i16 [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ], [ [[ADD:%.*]], [[LOOP]] ]47; CHECK-NEXT: [[ADD]] = add i16 [[IV_2]], [[O_1]]48; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds i16, ptr [[DST]], i64 [[IV]]49; CHECK-NEXT: store i16 [[ADD]], ptr [[GEP_DST]], align 250; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 151; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]52; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]53; CHECK: exit:54; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i16 [ [[ADD]], [[LOOP]] ], [ [[TMP0]], [[MIDDLE_BLOCK]] ]55; CHECK-NEXT: ret i16 [[ADD_LCSSA]]56;57entry:58 %o.1 = add i16 %off, 259 br label %loop60 61loop:62 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]63 %iv.2 = phi i16 [ 0, %entry ], [ %add, %loop ]64 %add = add i16 %iv.2, %o.165 %gep.dst = getelementptr inbounds i16, ptr %dst, i64 %iv66 store i16 %add, ptr %gep.dst, align 267 %iv.next = add nuw nsw i64 %iv, 168 %ec = icmp eq i64 %iv.next, %N69 br i1 %ec , label %exit, label %loop70 71exit:72 ret i16 %add73}74 75define i16 @wide_sub_induction_step_live_in(ptr %dst, i64 %N, i16 %off) {76; CHECK-LABEL: @wide_sub_induction_step_live_in(77; CHECK-NEXT: entry:78; CHECK-NEXT: [[O_1:%.*]] = add i16 [[OFF:%.*]], 279; CHECK-NEXT: [[TMP0:%.*]] = sub i16 -2, [[OFF]]80; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 881; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]82; CHECK: vector.ph:83; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 884; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]85; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i16> poison, i16 [[TMP0]], i64 086; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i16> [[BROADCAST_SPLATINSERT]], <4 x i16> poison, <4 x i32> zeroinitializer87; CHECK-NEXT: [[DOTCAST:%.*]] = trunc i64 [[N_VEC]] to i1688; CHECK-NEXT: [[TMP1:%.*]] = mul i16 [[DOTCAST]], [[TMP0]]89; CHECK-NEXT: [[TMP2:%.*]] = mul <4 x i16> splat (i16 4), [[BROADCAST_SPLAT]]90; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i16> poison, i16 [[O_1]], i64 091; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i16> [[DOTSPLATINSERT]], <4 x i16> poison, <4 x i32> zeroinitializer92; CHECK-NEXT: [[TMP3:%.*]] = mul <4 x i16> <i16 0, i16 1, i16 2, i16 3>, [[BROADCAST_SPLAT]]93; CHECK-NEXT: [[INDUCTION:%.*]] = add <4 x i16> zeroinitializer, [[TMP3]]94; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]95; CHECK: vector.body:96; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]97; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i16> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]98; CHECK-NEXT: [[STEP_ADD:%.*]] = add <4 x i16> [[VEC_IND]], [[TMP2]]99; CHECK-NEXT: [[TMP5:%.*]] = sub <4 x i16> [[VEC_IND]], [[DOTSPLAT]]100; CHECK-NEXT: [[TMP10:%.*]] = sub <4 x i16> [[STEP_ADD]], [[DOTSPLAT]]101; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, ptr [[DST:%.*]], i64 [[INDEX]]102; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i16, ptr [[TMP6]], i64 4103; CHECK-NEXT: store <4 x i16> [[TMP5]], ptr [[TMP6]], align 2104; CHECK-NEXT: store <4 x i16> [[TMP10]], ptr [[TMP9]], align 2105; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8106; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i16> [[STEP_ADD]], [[TMP2]]107; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]108; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]109; CHECK: middle.block:110; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]111; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]112; CHECK: scalar.ph:113; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]114; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi i16 [ [[TMP1]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]115; CHECK-NEXT: br label [[LOOP:%.*]]116; CHECK: loop:117; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]118; CHECK-NEXT: [[IV_2:%.*]] = phi i16 [ [[BC_RESUME_VAL3]], [[SCALAR_PH]] ], [ [[SUB:%.*]], [[LOOP]] ]119; CHECK-NEXT: [[SUB]] = sub i16 [[IV_2]], [[O_1]]120; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds i16, ptr [[DST]], i64 [[IV]]121; CHECK-NEXT: store i16 [[SUB]], ptr [[GEP_DST]], align 2122; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1123; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]124; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]125; CHECK: exit:126; CHECK-NEXT: [[SUB_LCSSA:%.*]] = phi i16 [ [[SUB]], [[LOOP]] ], [ [[TMP1]], [[MIDDLE_BLOCK]] ]127; CHECK-NEXT: ret i16 [[SUB_LCSSA]]128;129entry:130 %o.1 = add i16 %off, 2131 br label %loop132 133loop:134 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]135 %iv.2 = phi i16 [ 0, %entry ], [ %sub, %loop ]136 %sub = sub i16 %iv.2, %o.1137 %gep.dst = getelementptr inbounds i16, ptr %dst, i64 %iv138 store i16 %sub, ptr %gep.dst, align 2139 %iv.next = add nuw nsw i64 %iv, 1140 %ec = icmp eq i64 %iv.next, %N141 br i1 %ec , label %exit, label %loop142 143exit:144 ret i16 %sub145}146