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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -force-vector-width=4 -passes=loop-vectorize -mcpu=haswell < %s | FileCheck %s3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"5target triple = "x86_64-unknown-linux-gnu"6 7;; This file includes tests for avoiding the need for a masked.load8;; We don't need a masked.load for this due to deref facts, and can instead9;; use a plain vector load.10 11declare void @init(ptr nocapture nofree)12 13;; For ease of explanation, this one demonstrates14;; with a range check, but there are better lowering options specifically for15;; this test (i.e. reducing the iteration space of the vector copy), so16;; following tests are written more generically.17define i32 @test_explicit_pred(i64 %len) {18; CHECK-LABEL: @test_explicit_pred(19; CHECK-NEXT:  entry:20; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 421; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])22; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]23; CHECK:       vector.ph:24; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[LEN:%.*]], i64 025; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer26; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]27; CHECK:       vector.body:28; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]29; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]30; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP16:%.*]], [[VECTOR_BODY]] ]31; CHECK-NEXT:    [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP17:%.*]], [[VECTOR_BODY]] ]32; CHECK-NEXT:    [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP18:%.*]], [[VECTOR_BODY]] ]33; CHECK-NEXT:    [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP19:%.*]], [[VECTOR_BODY]] ]34; CHECK-NEXT:    [[STEP_ADD:%.*]] = add <4 x i64> [[VEC_IND]], splat (i64 4)35; CHECK-NEXT:    [[STEP_ADD1:%.*]] = add <4 x i64> [[STEP_ADD]], splat (i64 4)36; CHECK-NEXT:    [[STEP_ADD2:%.*]] = add <4 x i64> [[STEP_ADD1]], splat (i64 4)37; CHECK-NEXT:    [[TMP4:%.*]] = icmp slt <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]38; CHECK-NEXT:    [[TMP5:%.*]] = icmp slt <4 x i64> [[STEP_ADD]], [[BROADCAST_SPLAT]]39; CHECK-NEXT:    [[TMP6:%.*]] = icmp slt <4 x i64> [[STEP_ADD1]], [[BROADCAST_SPLAT]]40; CHECK-NEXT:    [[TMP7:%.*]] = icmp slt <4 x i64> [[STEP_ADD2]], [[BROADCAST_SPLAT]]41; CHECK-NEXT:    [[TMP8:%.*]] = getelementptr i32, ptr [[ALLOCA]], i64 [[INDEX]]42; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr i32, ptr [[TMP8]], i64 443; CHECK-NEXT:    [[TMP14:%.*]] = getelementptr i32, ptr [[TMP8]], i64 844; CHECK-NEXT:    [[TMP15:%.*]] = getelementptr i32, ptr [[TMP8]], i64 1245; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP8]], align 446; CHECK-NEXT:    [[WIDE_LOAD7:%.*]] = load <4 x i32>, ptr [[TMP13]], align 447; CHECK-NEXT:    [[WIDE_LOAD8:%.*]] = load <4 x i32>, ptr [[TMP14]], align 448; CHECK-NEXT:    [[WIDE_LOAD9:%.*]] = load <4 x i32>, ptr [[TMP15]], align 449; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP4]], <4 x i32> [[WIDE_LOAD]], <4 x i32> zeroinitializer50; CHECK-NEXT:    [[PREDPHI10:%.*]] = select <4 x i1> [[TMP5]], <4 x i32> [[WIDE_LOAD7]], <4 x i32> zeroinitializer51; CHECK-NEXT:    [[PREDPHI11:%.*]] = select <4 x i1> [[TMP6]], <4 x i32> [[WIDE_LOAD8]], <4 x i32> zeroinitializer52; CHECK-NEXT:    [[PREDPHI12:%.*]] = select <4 x i1> [[TMP7]], <4 x i32> [[WIDE_LOAD9]], <4 x i32> zeroinitializer53; CHECK-NEXT:    [[TMP16]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]54; CHECK-NEXT:    [[TMP17]] = add <4 x i32> [[VEC_PHI4]], [[PREDPHI10]]55; CHECK-NEXT:    [[TMP18]] = add <4 x i32> [[VEC_PHI5]], [[PREDPHI11]]56; CHECK-NEXT:    [[TMP19]] = add <4 x i32> [[VEC_PHI6]], [[PREDPHI12]]57; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 1658; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <4 x i64> [[STEP_ADD2]], splat (i64 4)59; CHECK-NEXT:    [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], 409660; CHECK-NEXT:    br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]61; CHECK:       middle.block:62; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP17]], [[TMP16]]63; CHECK-NEXT:    [[BIN_RDX13:%.*]] = add <4 x i32> [[TMP18]], [[BIN_RDX]]64; CHECK-NEXT:    [[BIN_RDX14:%.*]] = add <4 x i32> [[TMP19]], [[BIN_RDX13]]65; CHECK-NEXT:    [[TMP21:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX14]])66; CHECK-NEXT:    br label [[LATCH:%.*]]67; CHECK:       loop_exit:68; CHECK-NEXT:    ret i32 [[TMP21]]69;70entry:71  %alloca = alloca [4096 x i32]72  call void @init(ptr %alloca)73  br label %loop74loop:75  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]76  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]77  %iv.next = add i64 %iv, 178  %earlycnd = icmp slt i64 %iv, %len79  br i1 %earlycnd, label %pred, label %latch80pred:81  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv82  %val = load i32, ptr %addr83  br label %latch84latch:85  %val.phi = phi i32 [0, %loop], [%val, %pred]86  %accum.next = add i32 %accum, %val.phi87  %exit = icmp ugt i64 %iv, 409488  br i1 %exit, label %loop_exit, label %loop89 90loop_exit:91  ret i32 %accum.next92}93 94;; Similiar to the above, but without an analyzeable condition.95define i32 @test_explicit_pred_generic(i64 %len, ptr %test_base) {96; CHECK-LABEL: @test_explicit_pred_generic(97; CHECK-NEXT:  entry:98; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 499; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])100; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]101; CHECK:       vector.ph:102; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]103; CHECK:       vector.body:104; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]105; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP72:%.*]], [[VECTOR_BODY]] ]106; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]107; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]108; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]109; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0110; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 1111; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 2112; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 3113; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 4114; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 5115; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 6116; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 7117; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 8118; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 9119; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 10120; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 11121; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 12122; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 13123; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 14124; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 15125; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]126; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]127; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]128; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]129; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]130; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]131; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]132; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]133; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]134; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]135; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]136; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]137; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]138; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]139; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]140; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]141; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 1142; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 1143; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 1144; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 1145; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 0146; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 1147; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 2148; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 3149; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 1150; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 1151; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 1152; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 1153; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 0154; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 1155; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 2156; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 3157; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 1158; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 1159; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 1160; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 1161; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 0162; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 1163; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 2164; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 3165; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 1166; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 1167; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 1168; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 1169; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 0170; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 1171; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 2172; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 3173; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr i32, ptr [[ALLOCA]], i64 [[TMP0]]174; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr i32, ptr [[TMP64]], i64 4175; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP64]], i64 8176; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP64]], i64 12177; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP64]], align 4178; CHECK-NEXT:    [[WIDE_LOAD4:%.*]] = load <4 x i32>, ptr [[TMP69]], align 4179; CHECK-NEXT:    [[WIDE_LOAD5:%.*]] = load <4 x i32>, ptr [[TMP70]], align 4180; CHECK-NEXT:    [[WIDE_LOAD6:%.*]] = load <4 x i32>, ptr [[TMP71]], align 4181; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[WIDE_LOAD]], <4 x i32> zeroinitializer182; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[WIDE_LOAD4]], <4 x i32> zeroinitializer183; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[WIDE_LOAD5]], <4 x i32> zeroinitializer184; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[WIDE_LOAD6]], <4 x i32> zeroinitializer185; CHECK-NEXT:    [[TMP72]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]186; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]187; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]188; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]189; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16190; CHECK-NEXT:    [[TMP76:%.*]] = icmp eq i64 [[INDEX_NEXT]], 4096191; CHECK-NEXT:    br i1 [[TMP76]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]192; CHECK:       middle.block:193; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP73]], [[TMP72]]194; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP74]], [[BIN_RDX]]195; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX10]]196; CHECK-NEXT:    [[TMP77:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])197; CHECK-NEXT:    br label [[LATCH:%.*]]198; CHECK:       loop_exit:199; CHECK-NEXT:    ret i32 [[TMP77]]200;201entry:202  %alloca = alloca [4096 x i32]203  call void @init(ptr %alloca)204  br label %loop205loop:206  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]207  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]208  %iv.next = add i64 %iv, 1209  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv210  %earlycnd = load i1, ptr %test_addr211  br i1 %earlycnd, label %pred, label %latch212pred:213  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv214  %val = load i32, ptr %addr215  br label %latch216latch:217  %val.phi = phi i32 [0, %loop], [%val, %pred]218  %accum.next = add i32 %accum, %val.phi219  %exit = icmp ugt i64 %iv, 4094220  br i1 %exit, label %loop_exit, label %loop221 222loop_exit:223  ret i32 %accum.next224}225 226; Trivial case where the address loaded from it loop invariant (and yes,227; there are better lowerings, this is a test of robustness of vectorization,228; nothing more.)229; TODO: currently shows predication which can be removed230define i32 @test_invariant_address(i64 %len, ptr %test_base) {231; CHECK-LABEL: @test_invariant_address(232; CHECK-NEXT:  entry:233; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 4234; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])235; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]236; CHECK:       vector.ph:237; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]238; CHECK:       vector.body:239; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]240; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP96:%.*]], [[VECTOR_BODY]] ]241; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP97:%.*]], [[VECTOR_BODY]] ]242; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP98:%.*]], [[VECTOR_BODY]] ]243; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP99:%.*]], [[VECTOR_BODY]] ]244; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0245; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 1246; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 2247; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 3248; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 4249; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 5250; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 6251; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 7252; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 8253; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 9254; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 10255; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 11256; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 12257; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 13258; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 14259; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 15260; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]261; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]262; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]263; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]264; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]265; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]266; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]267; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]268; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]269; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]270; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]271; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]272; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]273; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]274; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]275; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]276; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 1277; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 1278; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 1279; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 1280; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 0281; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 1282; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 2283; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 3284; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 1285; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 1286; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 1287; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 1288; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 0289; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 1290; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 2291; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 3292; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 1293; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 1294; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 1295; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 1296; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 0297; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 1298; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 2299; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 3300; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 1301; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 1302; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 1303; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 1304; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 0305; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 1306; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 2307; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 3308; CHECK-NEXT:    [[TMP64:%.*]] = load i32, ptr [[ALLOCA]], align 4309; CHECK-NEXT:    [[TMP65:%.*]] = load i32, ptr [[ALLOCA]], align 4310; CHECK-NEXT:    [[TMP66:%.*]] = load i32, ptr [[ALLOCA]], align 4311; CHECK-NEXT:    [[TMP67:%.*]] = load i32, ptr [[ALLOCA]], align 4312; CHECK-NEXT:    [[TMP68:%.*]] = insertelement <4 x i32> poison, i32 [[TMP64]], i32 0313; CHECK-NEXT:    [[TMP69:%.*]] = insertelement <4 x i32> [[TMP68]], i32 [[TMP65]], i32 1314; CHECK-NEXT:    [[TMP70:%.*]] = insertelement <4 x i32> [[TMP69]], i32 [[TMP66]], i32 2315; CHECK-NEXT:    [[TMP71:%.*]] = insertelement <4 x i32> [[TMP70]], i32 [[TMP67]], i32 3316; CHECK-NEXT:    [[TMP72:%.*]] = load i32, ptr [[ALLOCA]], align 4317; CHECK-NEXT:    [[TMP73:%.*]] = load i32, ptr [[ALLOCA]], align 4318; CHECK-NEXT:    [[TMP74:%.*]] = load i32, ptr [[ALLOCA]], align 4319; CHECK-NEXT:    [[TMP75:%.*]] = load i32, ptr [[ALLOCA]], align 4320; CHECK-NEXT:    [[TMP76:%.*]] = insertelement <4 x i32> poison, i32 [[TMP72]], i32 0321; CHECK-NEXT:    [[TMP77:%.*]] = insertelement <4 x i32> [[TMP76]], i32 [[TMP73]], i32 1322; CHECK-NEXT:    [[TMP78:%.*]] = insertelement <4 x i32> [[TMP77]], i32 [[TMP74]], i32 2323; CHECK-NEXT:    [[TMP79:%.*]] = insertelement <4 x i32> [[TMP78]], i32 [[TMP75]], i32 3324; CHECK-NEXT:    [[TMP80:%.*]] = load i32, ptr [[ALLOCA]], align 4325; CHECK-NEXT:    [[TMP81:%.*]] = load i32, ptr [[ALLOCA]], align 4326; CHECK-NEXT:    [[TMP82:%.*]] = load i32, ptr [[ALLOCA]], align 4327; CHECK-NEXT:    [[TMP83:%.*]] = load i32, ptr [[ALLOCA]], align 4328; CHECK-NEXT:    [[TMP84:%.*]] = insertelement <4 x i32> poison, i32 [[TMP80]], i32 0329; CHECK-NEXT:    [[TMP85:%.*]] = insertelement <4 x i32> [[TMP84]], i32 [[TMP81]], i32 1330; CHECK-NEXT:    [[TMP86:%.*]] = insertelement <4 x i32> [[TMP85]], i32 [[TMP82]], i32 2331; CHECK-NEXT:    [[TMP87:%.*]] = insertelement <4 x i32> [[TMP86]], i32 [[TMP83]], i32 3332; CHECK-NEXT:    [[TMP88:%.*]] = load i32, ptr [[ALLOCA]], align 4333; CHECK-NEXT:    [[TMP89:%.*]] = load i32, ptr [[ALLOCA]], align 4334; CHECK-NEXT:    [[TMP90:%.*]] = load i32, ptr [[ALLOCA]], align 4335; CHECK-NEXT:    [[TMP91:%.*]] = load i32, ptr [[ALLOCA]], align 4336; CHECK-NEXT:    [[TMP92:%.*]] = insertelement <4 x i32> poison, i32 [[TMP88]], i32 0337; CHECK-NEXT:    [[TMP93:%.*]] = insertelement <4 x i32> [[TMP92]], i32 [[TMP89]], i32 1338; CHECK-NEXT:    [[TMP94:%.*]] = insertelement <4 x i32> [[TMP93]], i32 [[TMP90]], i32 2339; CHECK-NEXT:    [[TMP95:%.*]] = insertelement <4 x i32> [[TMP94]], i32 [[TMP91]], i32 3340; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[TMP71]], <4 x i32> zeroinitializer341; CHECK-NEXT:    [[PREDPHI4:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[TMP79]], <4 x i32> zeroinitializer342; CHECK-NEXT:    [[PREDPHI5:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[TMP87]], <4 x i32> zeroinitializer343; CHECK-NEXT:    [[PREDPHI6:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[TMP95]], <4 x i32> zeroinitializer344; CHECK-NEXT:    [[TMP96]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]345; CHECK-NEXT:    [[TMP97]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI4]]346; CHECK-NEXT:    [[TMP98]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI5]]347; CHECK-NEXT:    [[TMP99]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI6]]348; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16349; CHECK-NEXT:    [[TMP100:%.*]] = icmp eq i64 [[INDEX_NEXT]], 4096350; CHECK-NEXT:    br i1 [[TMP100]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]351; CHECK:       middle.block:352; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP97]], [[TMP96]]353; CHECK-NEXT:    [[BIN_RDX7:%.*]] = add <4 x i32> [[TMP98]], [[BIN_RDX]]354; CHECK-NEXT:    [[BIN_RDX8:%.*]] = add <4 x i32> [[TMP99]], [[BIN_RDX7]]355; CHECK-NEXT:    [[TMP101:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX8]])356; CHECK-NEXT:    br label [[LATCH:%.*]]357; CHECK:       loop_exit:358; CHECK-NEXT:    ret i32 [[TMP101]]359;360entry:361  %alloca = alloca [4096 x i32]362  call void @init(ptr %alloca)363  br label %loop364loop:365  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]366  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]367  %iv.next = add i64 %iv, 1368  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv369  %earlycnd = load i1, ptr %test_addr370  br i1 %earlycnd, label %pred, label %latch371pred:372  %val = load i32, ptr %alloca373  br label %latch374latch:375  %val.phi = phi i32 [0, %loop], [%val, %pred]376  %accum.next = add i32 %accum, %val.phi377  %exit = icmp ugt i64 %iv, 4094378  br i1 %exit, label %loop_exit, label %loop379 380loop_exit:381  ret i32 %accum.next382}383 384; Overlapping loads - Fails alignment checking, not dereferenceability385define i32 @test_step_narrower_than_access(i64 %len, ptr %test_base) {386; CHECK-LABEL: @test_step_narrower_than_access(387; CHECK-NEXT:  entry:388; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 4389; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])390; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]391; CHECK:       vector.ph:392; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]393; CHECK:       vector.body:394; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_LOAD_CONTINUE33:%.*]] ]395; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP144:%.*]], [[PRED_LOAD_CONTINUE33]] ]396; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP145:%.*]], [[PRED_LOAD_CONTINUE33]] ]397; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP146:%.*]], [[PRED_LOAD_CONTINUE33]] ]398; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP147:%.*]], [[PRED_LOAD_CONTINUE33]] ]399; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0400; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 1401; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 2402; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 3403; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 4404; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 5405; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 6406; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 7407; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 8408; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 9409; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 10410; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 11411; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 12412; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 13413; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 14414; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 15415; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]416; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]417; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]418; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]419; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]420; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]421; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]422; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]423; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]424; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]425; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]426; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]427; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]428; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]429; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]430; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]431; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 1432; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 1433; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 1434; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 1435; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 0436; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 1437; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 2438; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 3439; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 1440; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 1441; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 1442; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 1443; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 0444; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 1445; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 2446; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 3447; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 1448; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 1449; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 1450; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 1451; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 0452; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 1453; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 2454; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 3455; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 1456; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 1457; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 1458; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 1459; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 0460; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 1461; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 2462; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 3463; CHECK-NEXT:    br i1 [[TMP32]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]]464; CHECK:       pred.load.if:465; CHECK-NEXT:    [[TMP65:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP0]]466; CHECK-NEXT:    [[TMP66:%.*]] = load i32, ptr [[TMP65]], align 4467; CHECK-NEXT:    [[TMP67:%.*]] = insertelement <4 x i32> poison, i32 [[TMP66]], i32 0468; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE]]469; CHECK:       pred.load.continue:470; CHECK-NEXT:    [[TMP68:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP67]], [[PRED_LOAD_IF]] ]471; CHECK-NEXT:    br i1 [[TMP33]], label [[PRED_LOAD_IF4:%.*]], label [[PRED_LOAD_CONTINUE5:%.*]]472; CHECK:       pred.load.if4:473; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP1]]474; CHECK-NEXT:    [[TMP71:%.*]] = load i32, ptr [[TMP70]], align 4475; CHECK-NEXT:    [[TMP72:%.*]] = insertelement <4 x i32> [[TMP68]], i32 [[TMP71]], i32 1476; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE5]]477; CHECK:       pred.load.continue5:478; CHECK-NEXT:    [[TMP73:%.*]] = phi <4 x i32> [ [[TMP68]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP72]], [[PRED_LOAD_IF4]] ]479; CHECK-NEXT:    br i1 [[TMP34]], label [[PRED_LOAD_IF6:%.*]], label [[PRED_LOAD_CONTINUE7:%.*]]480; CHECK:       pred.load.if6:481; CHECK-NEXT:    [[TMP75:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP2]]482; CHECK-NEXT:    [[TMP76:%.*]] = load i32, ptr [[TMP75]], align 4483; CHECK-NEXT:    [[TMP77:%.*]] = insertelement <4 x i32> [[TMP73]], i32 [[TMP76]], i32 2484; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE7]]485; CHECK:       pred.load.continue7:486; CHECK-NEXT:    [[TMP78:%.*]] = phi <4 x i32> [ [[TMP73]], [[PRED_LOAD_CONTINUE5]] ], [ [[TMP77]], [[PRED_LOAD_IF6]] ]487; CHECK-NEXT:    br i1 [[TMP35]], label [[PRED_LOAD_IF8:%.*]], label [[PRED_LOAD_CONTINUE9:%.*]]488; CHECK:       pred.load.if8:489; CHECK-NEXT:    [[TMP80:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP3]]490; CHECK-NEXT:    [[TMP81:%.*]] = load i32, ptr [[TMP80]], align 4491; CHECK-NEXT:    [[TMP82:%.*]] = insertelement <4 x i32> [[TMP78]], i32 [[TMP81]], i32 3492; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE9]]493; CHECK:       pred.load.continue9:494; CHECK-NEXT:    [[TMP83:%.*]] = phi <4 x i32> [ [[TMP78]], [[PRED_LOAD_CONTINUE7]] ], [ [[TMP82]], [[PRED_LOAD_IF8]] ]495; CHECK-NEXT:    br i1 [[TMP40]], label [[PRED_LOAD_IF10:%.*]], label [[PRED_LOAD_CONTINUE11:%.*]]496; CHECK:       pred.load.if10:497; CHECK-NEXT:    [[TMP85:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP4]]498; CHECK-NEXT:    [[TMP86:%.*]] = load i32, ptr [[TMP85]], align 4499; CHECK-NEXT:    [[TMP87:%.*]] = insertelement <4 x i32> poison, i32 [[TMP86]], i32 0500; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE11]]501; CHECK:       pred.load.continue11:502; CHECK-NEXT:    [[TMP88:%.*]] = phi <4 x i32> [ poison, [[PRED_LOAD_CONTINUE9]] ], [ [[TMP87]], [[PRED_LOAD_IF10]] ]503; CHECK-NEXT:    br i1 [[TMP41]], label [[PRED_LOAD_IF12:%.*]], label [[PRED_LOAD_CONTINUE13:%.*]]504; CHECK:       pred.load.if12:505; CHECK-NEXT:    [[TMP90:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP5]]506; CHECK-NEXT:    [[TMP91:%.*]] = load i32, ptr [[TMP90]], align 4507; CHECK-NEXT:    [[TMP92:%.*]] = insertelement <4 x i32> [[TMP88]], i32 [[TMP91]], i32 1508; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE13]]509; CHECK:       pred.load.continue13:510; CHECK-NEXT:    [[TMP93:%.*]] = phi <4 x i32> [ [[TMP88]], [[PRED_LOAD_CONTINUE11]] ], [ [[TMP92]], [[PRED_LOAD_IF12]] ]511; CHECK-NEXT:    br i1 [[TMP42]], label [[PRED_LOAD_IF14:%.*]], label [[PRED_LOAD_CONTINUE15:%.*]]512; CHECK:       pred.load.if14:513; CHECK-NEXT:    [[TMP95:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP6]]514; CHECK-NEXT:    [[TMP96:%.*]] = load i32, ptr [[TMP95]], align 4515; CHECK-NEXT:    [[TMP97:%.*]] = insertelement <4 x i32> [[TMP93]], i32 [[TMP96]], i32 2516; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE15]]517; CHECK:       pred.load.continue15:518; CHECK-NEXT:    [[TMP98:%.*]] = phi <4 x i32> [ [[TMP93]], [[PRED_LOAD_CONTINUE13]] ], [ [[TMP97]], [[PRED_LOAD_IF14]] ]519; CHECK-NEXT:    br i1 [[TMP43]], label [[PRED_LOAD_IF16:%.*]], label [[PRED_LOAD_CONTINUE17:%.*]]520; CHECK:       pred.load.if16:521; CHECK-NEXT:    [[TMP100:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP7]]522; CHECK-NEXT:    [[TMP101:%.*]] = load i32, ptr [[TMP100]], align 4523; CHECK-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> [[TMP98]], i32 [[TMP101]], i32 3524; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE17]]525; CHECK:       pred.load.continue17:526; CHECK-NEXT:    [[TMP103:%.*]] = phi <4 x i32> [ [[TMP98]], [[PRED_LOAD_CONTINUE15]] ], [ [[TMP102]], [[PRED_LOAD_IF16]] ]527; CHECK-NEXT:    br i1 [[TMP48]], label [[PRED_LOAD_IF18:%.*]], label [[PRED_LOAD_CONTINUE19:%.*]]528; CHECK:       pred.load.if18:529; CHECK-NEXT:    [[TMP105:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP8]]530; CHECK-NEXT:    [[TMP106:%.*]] = load i32, ptr [[TMP105]], align 4531; CHECK-NEXT:    [[TMP107:%.*]] = insertelement <4 x i32> poison, i32 [[TMP106]], i32 0532; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE19]]533; CHECK:       pred.load.continue19:534; CHECK-NEXT:    [[TMP108:%.*]] = phi <4 x i32> [ poison, [[PRED_LOAD_CONTINUE17]] ], [ [[TMP107]], [[PRED_LOAD_IF18]] ]535; CHECK-NEXT:    br i1 [[TMP49]], label [[PRED_LOAD_IF20:%.*]], label [[PRED_LOAD_CONTINUE21:%.*]]536; CHECK:       pred.load.if20:537; CHECK-NEXT:    [[TMP110:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP9]]538; CHECK-NEXT:    [[TMP111:%.*]] = load i32, ptr [[TMP110]], align 4539; CHECK-NEXT:    [[TMP112:%.*]] = insertelement <4 x i32> [[TMP108]], i32 [[TMP111]], i32 1540; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE21]]541; CHECK:       pred.load.continue21:542; CHECK-NEXT:    [[TMP113:%.*]] = phi <4 x i32> [ [[TMP108]], [[PRED_LOAD_CONTINUE19]] ], [ [[TMP112]], [[PRED_LOAD_IF20]] ]543; CHECK-NEXT:    br i1 [[TMP50]], label [[PRED_LOAD_IF22:%.*]], label [[PRED_LOAD_CONTINUE23:%.*]]544; CHECK:       pred.load.if22:545; CHECK-NEXT:    [[TMP115:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP10]]546; CHECK-NEXT:    [[TMP116:%.*]] = load i32, ptr [[TMP115]], align 4547; CHECK-NEXT:    [[TMP117:%.*]] = insertelement <4 x i32> [[TMP113]], i32 [[TMP116]], i32 2548; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE23]]549; CHECK:       pred.load.continue23:550; CHECK-NEXT:    [[TMP118:%.*]] = phi <4 x i32> [ [[TMP113]], [[PRED_LOAD_CONTINUE21]] ], [ [[TMP117]], [[PRED_LOAD_IF22]] ]551; CHECK-NEXT:    br i1 [[TMP51]], label [[PRED_LOAD_IF24:%.*]], label [[PRED_LOAD_CONTINUE25:%.*]]552; CHECK:       pred.load.if24:553; CHECK-NEXT:    [[TMP120:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP11]]554; CHECK-NEXT:    [[TMP121:%.*]] = load i32, ptr [[TMP120]], align 4555; CHECK-NEXT:    [[TMP122:%.*]] = insertelement <4 x i32> [[TMP118]], i32 [[TMP121]], i32 3556; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE25]]557; CHECK:       pred.load.continue25:558; CHECK-NEXT:    [[TMP123:%.*]] = phi <4 x i32> [ [[TMP118]], [[PRED_LOAD_CONTINUE23]] ], [ [[TMP122]], [[PRED_LOAD_IF24]] ]559; CHECK-NEXT:    br i1 [[TMP56]], label [[PRED_LOAD_IF26:%.*]], label [[PRED_LOAD_CONTINUE27:%.*]]560; CHECK:       pred.load.if26:561; CHECK-NEXT:    [[TMP125:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP12]]562; CHECK-NEXT:    [[TMP126:%.*]] = load i32, ptr [[TMP125]], align 4563; CHECK-NEXT:    [[TMP127:%.*]] = insertelement <4 x i32> poison, i32 [[TMP126]], i32 0564; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE27]]565; CHECK:       pred.load.continue27:566; CHECK-NEXT:    [[TMP128:%.*]] = phi <4 x i32> [ poison, [[PRED_LOAD_CONTINUE25]] ], [ [[TMP127]], [[PRED_LOAD_IF26]] ]567; CHECK-NEXT:    br i1 [[TMP57]], label [[PRED_LOAD_IF28:%.*]], label [[PRED_LOAD_CONTINUE29:%.*]]568; CHECK:       pred.load.if28:569; CHECK-NEXT:    [[TMP130:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP13]]570; CHECK-NEXT:    [[TMP131:%.*]] = load i32, ptr [[TMP130]], align 4571; CHECK-NEXT:    [[TMP132:%.*]] = insertelement <4 x i32> [[TMP128]], i32 [[TMP131]], i32 1572; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE29]]573; CHECK:       pred.load.continue29:574; CHECK-NEXT:    [[TMP133:%.*]] = phi <4 x i32> [ [[TMP128]], [[PRED_LOAD_CONTINUE27]] ], [ [[TMP132]], [[PRED_LOAD_IF28]] ]575; CHECK-NEXT:    br i1 [[TMP58]], label [[PRED_LOAD_IF30:%.*]], label [[PRED_LOAD_CONTINUE31:%.*]]576; CHECK:       pred.load.if30:577; CHECK-NEXT:    [[TMP135:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP14]]578; CHECK-NEXT:    [[TMP136:%.*]] = load i32, ptr [[TMP135]], align 4579; CHECK-NEXT:    [[TMP137:%.*]] = insertelement <4 x i32> [[TMP133]], i32 [[TMP136]], i32 2580; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE31]]581; CHECK:       pred.load.continue31:582; CHECK-NEXT:    [[TMP138:%.*]] = phi <4 x i32> [ [[TMP133]], [[PRED_LOAD_CONTINUE29]] ], [ [[TMP137]], [[PRED_LOAD_IF30]] ]583; CHECK-NEXT:    br i1 [[TMP59]], label [[PRED_LOAD_IF32:%.*]], label [[PRED_LOAD_CONTINUE33]]584; CHECK:       pred.load.if32:585; CHECK-NEXT:    [[TMP140:%.*]] = getelementptr inbounds i16, ptr [[ALLOCA]], i64 [[TMP15]]586; CHECK-NEXT:    [[TMP141:%.*]] = load i32, ptr [[TMP140]], align 4587; CHECK-NEXT:    [[TMP142:%.*]] = insertelement <4 x i32> [[TMP138]], i32 [[TMP141]], i32 3588; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE33]]589; CHECK:       pred.load.continue33:590; CHECK-NEXT:    [[TMP143:%.*]] = phi <4 x i32> [ [[TMP138]], [[PRED_LOAD_CONTINUE31]] ], [ [[TMP142]], [[PRED_LOAD_IF32]] ]591; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[TMP83]], <4 x i32> zeroinitializer592; CHECK-NEXT:    [[PREDPHI34:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[TMP103]], <4 x i32> zeroinitializer593; CHECK-NEXT:    [[PREDPHI35:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[TMP123]], <4 x i32> zeroinitializer594; CHECK-NEXT:    [[PREDPHI36:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[TMP143]], <4 x i32> zeroinitializer595; CHECK-NEXT:    [[TMP144]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]596; CHECK-NEXT:    [[TMP145]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI34]]597; CHECK-NEXT:    [[TMP146]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI35]]598; CHECK-NEXT:    [[TMP147]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI36]]599; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16600; CHECK-NEXT:    [[TMP148:%.*]] = icmp eq i64 [[INDEX_NEXT]], 4096601; CHECK-NEXT:    br i1 [[TMP148]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]602; CHECK:       middle.block:603; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP145]], [[TMP144]]604; CHECK-NEXT:    [[BIN_RDX37:%.*]] = add <4 x i32> [[TMP146]], [[BIN_RDX]]605; CHECK-NEXT:    [[BIN_RDX38:%.*]] = add <4 x i32> [[TMP147]], [[BIN_RDX37]]606; CHECK-NEXT:    [[TMP149:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX38]])607; CHECK-NEXT:    br label [[LATCH:%.*]]608; CHECK:       loop_exit:609; CHECK-NEXT:    ret i32 [[TMP149]]610;611entry:612  %alloca = alloca [4096 x i32]613  call void @init(ptr %alloca)614  br label %loop615loop:616  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]617  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]618  %iv.next = add i64 %iv, 1619  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv620  %earlycnd = load i1, ptr %test_addr621  br i1 %earlycnd, label %pred, label %latch622pred:623  %addr.i16p = getelementptr inbounds i16, ptr %alloca, i64 %iv624  %val = load i32, ptr %addr.i16p625  br label %latch626latch:627  %val.phi = phi i32 [0, %loop], [%val, %pred]628  %accum.next = add i32 %accum, %val.phi629  %exit = icmp ugt i64 %iv, 4094630  br i1 %exit, label %loop_exit, label %loop631 632loop_exit:633  ret i32 %accum.next634}635 636define i32 @test_max_trip_count(i64 %len, ptr %test_base, i64 %n) {637; CHECK-LABEL: @test_max_trip_count(638; CHECK-NEXT:  entry:639; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 4640; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])641; CHECK-NEXT:    [[MIN_CMP:%.*]] = icmp ult i64 4096, [[N:%.*]]642; CHECK-NEXT:    [[MIN_N:%.*]] = select i1 [[MIN_CMP]], i64 4096, i64 [[N]]643; CHECK-NEXT:    [[TMP0:%.*]] = add nuw nsw i64 [[MIN_N]], 2644; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16645; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]646; CHECK:       vector.ph:647; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 16648; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]649; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]650; CHECK:       vector.body:651; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]652; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]653; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]654; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]655; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP76:%.*]], [[VECTOR_BODY]] ]656; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 0657; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 1658; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 2659; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 3660; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 4661; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 5662; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 6663; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 7664; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 8665; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 9666; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 10667; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 11668; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 12669; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 13670; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 14671; CHECK-NEXT:    [[TMP16:%.*]] = add i64 [[INDEX]], 15672; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP1]]673; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]674; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]675; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]676; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]677; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]678; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]679; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]680; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]681; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]682; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]683; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]684; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]685; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]686; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]687; CHECK-NEXT:    [[TMP32:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP16]]688; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 1689; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 1690; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 1691; CHECK-NEXT:    [[TMP36:%.*]] = load i1, ptr [[TMP20]], align 1692; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> poison, i1 [[TMP33]], i32 0693; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 1694; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 2695; CHECK-NEXT:    [[TMP40:%.*]] = insertelement <4 x i1> [[TMP39]], i1 [[TMP36]], i32 3696; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 1697; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 1698; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 1699; CHECK-NEXT:    [[TMP44:%.*]] = load i1, ptr [[TMP24]], align 1700; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> poison, i1 [[TMP41]], i32 0701; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 1702; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 2703; CHECK-NEXT:    [[TMP48:%.*]] = insertelement <4 x i1> [[TMP47]], i1 [[TMP44]], i32 3704; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 1705; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 1706; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 1707; CHECK-NEXT:    [[TMP52:%.*]] = load i1, ptr [[TMP28]], align 1708; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> poison, i1 [[TMP49]], i32 0709; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 1710; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 2711; CHECK-NEXT:    [[TMP56:%.*]] = insertelement <4 x i1> [[TMP55]], i1 [[TMP52]], i32 3712; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 1713; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 1714; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 1715; CHECK-NEXT:    [[TMP60:%.*]] = load i1, ptr [[TMP32]], align 1716; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> poison, i1 [[TMP57]], i32 0717; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 1718; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 2719; CHECK-NEXT:    [[TMP64:%.*]] = insertelement <4 x i1> [[TMP63]], i1 [[TMP60]], i32 3720; CHECK-NEXT:    [[TMP65:%.*]] = getelementptr i32, ptr [[ALLOCA]], i64 [[TMP1]]721; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP65]], i64 4722; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP65]], i64 8723; CHECK-NEXT:    [[TMP72:%.*]] = getelementptr i32, ptr [[TMP65]], i64 12724; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP65]], <4 x i1> [[TMP40]], <4 x i32> poison)725; CHECK-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP70]], <4 x i1> [[TMP48]], <4 x i32> poison)726; CHECK-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP71]], <4 x i1> [[TMP56]], <4 x i32> poison)727; CHECK-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP72]], <4 x i1> [[TMP64]], <4 x i32> poison)728; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP40]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer729; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP48]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer730; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP56]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer731; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP64]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer732; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]733; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]734; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]735; CHECK-NEXT:    [[TMP76]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]736; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16737; CHECK-NEXT:    [[TMP77:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]738; CHECK-NEXT:    br i1 [[TMP77]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]739; CHECK:       middle.block:740; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP74]], [[TMP73]]741; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX]]742; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP76]], [[BIN_RDX10]]743; CHECK-NEXT:    [[TMP78:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])744; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]745; CHECK-NEXT:    br i1 [[CMP_N]], label [[LOOP_EXIT:%.*]], label [[SCALAR_PH]]746; CHECK:       scalar.ph:747; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]748; CHECK-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP78]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]749; CHECK-NEXT:    br label [[LOOP:%.*]]750; CHECK:       loop:751; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]752; CHECK-NEXT:    [[ACCUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.*]], [[LATCH]] ]753; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1754; CHECK-NEXT:    [[TEST_ADDR:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[IV]]755; CHECK-NEXT:    [[EARLYCND:%.*]] = load i1, ptr [[TEST_ADDR]], align 1756; CHECK-NEXT:    br i1 [[EARLYCND]], label [[PRED:%.*]], label [[LATCH]]757; CHECK:       pred:758; CHECK-NEXT:    [[ADDR:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[IV]]759; CHECK-NEXT:    [[VAL:%.*]] = load i32, ptr [[ADDR]], align 4760; CHECK-NEXT:    br label [[LATCH]]761; CHECK:       latch:762; CHECK-NEXT:    [[VAL_PHI:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ]763; CHECK-NEXT:    [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[VAL_PHI]]764; CHECK-NEXT:    [[EXIT:%.*]] = icmp ugt i64 [[IV]], [[MIN_N]]765; CHECK-NEXT:    br i1 [[EXIT]], label [[LOOP_EXIT]], label [[LOOP]], !llvm.loop [[LOOP7:![0-9]+]]766; CHECK:       loop_exit:767; CHECK-NEXT:    [[ACCUM_NEXT_LCSSA:%.*]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ], [ [[TMP78]], [[MIDDLE_BLOCK]] ]768; CHECK-NEXT:    ret i32 [[ACCUM_NEXT_LCSSA]]769;770entry:771  %alloca = alloca [4096 x i32]772  call void @init(ptr %alloca)773  %min.cmp = icmp ult i64 4096, %n774  %min.n = select i1 %min.cmp, i64 4096, i64 %n775  br label %loop776loop:777  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]778  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]779  %iv.next = add i64 %iv, 1780  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv781  %earlycnd = load i1, ptr %test_addr782  br i1 %earlycnd, label %pred, label %latch783pred:784  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv785  %val = load i32, ptr %addr786  br label %latch787latch:788  %val.phi = phi i32 [0, %loop], [%val, %pred]789  %accum.next = add i32 %accum, %val.phi790  %exit = icmp ugt i64 %iv, %min.n791  br i1 %exit, label %loop_exit, label %loop792 793loop_exit:794  ret i32 %accum.next795}796 797 798 799 800define i32 @test_non_zero_start(i64 %len, ptr %test_base) {801; CHECK-LABEL: @test_non_zero_start(802; CHECK-NEXT:  entry:803; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 4804; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])805; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]806; CHECK:       vector.ph:807; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]808; CHECK:       vector.body:809; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]810; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP72:%.*]], [[VECTOR_BODY]] ]811; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]812; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]813; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]814; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = add i64 1024, [[INDEX]]815; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 0816; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 1817; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[OFFSET_IDX]], 2818; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 3819; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 4820; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 5821; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 6822; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 7823; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 8824; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[OFFSET_IDX]], 9825; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[OFFSET_IDX]], 10826; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 11827; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 12828; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[OFFSET_IDX]], 13829; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[OFFSET_IDX]], 14830; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 15831; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]832; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]833; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]834; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]835; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]836; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]837; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]838; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]839; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]840; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]841; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]842; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]843; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]844; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]845; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]846; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]847; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 1848; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 1849; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 1850; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 1851; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 0852; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 1853; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 2854; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 3855; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 1856; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 1857; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 1858; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 1859; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 0860; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 1861; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 2862; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 3863; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 1864; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 1865; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 1866; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 1867; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 0868; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 1869; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 2870; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 3871; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 1872; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 1873; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 1874; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 1875; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 0876; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 1877; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 2878; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 3879; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr i32, ptr [[ALLOCA]], i64 [[TMP0]]880; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr i32, ptr [[TMP64]], i64 4881; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP64]], i64 8882; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP64]], i64 12883; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP64]], align 4884; CHECK-NEXT:    [[WIDE_LOAD4:%.*]] = load <4 x i32>, ptr [[TMP69]], align 4885; CHECK-NEXT:    [[WIDE_LOAD5:%.*]] = load <4 x i32>, ptr [[TMP70]], align 4886; CHECK-NEXT:    [[WIDE_LOAD6:%.*]] = load <4 x i32>, ptr [[TMP71]], align 4887; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[WIDE_LOAD]], <4 x i32> zeroinitializer888; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[WIDE_LOAD4]], <4 x i32> zeroinitializer889; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[WIDE_LOAD5]], <4 x i32> zeroinitializer890; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[WIDE_LOAD6]], <4 x i32> zeroinitializer891; CHECK-NEXT:    [[TMP72]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]892; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]893; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]894; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]895; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16896; CHECK-NEXT:    [[TMP76:%.*]] = icmp eq i64 [[INDEX_NEXT]], 3072897; CHECK-NEXT:    br i1 [[TMP76]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]898; CHECK:       middle.block:899; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP73]], [[TMP72]]900; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP74]], [[BIN_RDX]]901; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX10]]902; CHECK-NEXT:    [[TMP77:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])903; CHECK-NEXT:    br label [[LATCH:%.*]]904; CHECK:       loop_exit:905; CHECK-NEXT:    ret i32 [[TMP77]]906;907entry:908  %alloca = alloca [4096 x i32]909  call void @init(ptr %alloca)910  br label %loop911loop:912  %iv = phi i64 [ 1024, %entry ], [ %iv.next, %latch ]913  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]914  %iv.next = add i64 %iv, 1915  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv916  %earlycnd = load i1, ptr %test_addr917  br i1 %earlycnd, label %pred, label %latch918pred:919  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv920  %val = load i32, ptr %addr921  br label %latch922latch:923  %val.phi = phi i32 [0, %loop], [%val, %pred]924  %accum.next = add i32 %accum, %val.phi925  %exit = icmp ugt i64 %iv, 4094926  br i1 %exit, label %loop_exit, label %loop927 928loop_exit:929  ret i32 %accum.next930}931 932define i32 @neg_out_of_bounds_start(i64 %len, ptr %test_base) {933; CHECK-LABEL: @neg_out_of_bounds_start(934; CHECK-NEXT:  entry:935; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 4936; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])937; CHECK-NEXT:    br label [[LOOP:%.*]]938; CHECK:       loop:939; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ -10, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]940; CHECK-NEXT:    [[ACCUM:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ACCUM_NEXT:%.*]], [[LATCH]] ]941; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1942; CHECK-NEXT:    [[TEST_ADDR:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[IV]]943; CHECK-NEXT:    [[EARLYCND:%.*]] = load i1, ptr [[TEST_ADDR]], align 1944; CHECK-NEXT:    br i1 [[EARLYCND]], label [[PRED:%.*]], label [[LATCH]]945; CHECK:       pred:946; CHECK-NEXT:    [[ADDR:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[IV]]947; CHECK-NEXT:    [[VAL:%.*]] = load i32, ptr [[ADDR]], align 4948; CHECK-NEXT:    br label [[LATCH]]949; CHECK:       latch:950; CHECK-NEXT:    [[VAL_PHI:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ]951; CHECK-NEXT:    [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[VAL_PHI]]952; CHECK-NEXT:    [[EXIT:%.*]] = icmp ugt i64 [[IV]], 4094953; CHECK-NEXT:    br i1 [[EXIT]], label [[LOOP_EXIT:%.*]], label [[LOOP]]954; CHECK:       loop_exit:955; CHECK-NEXT:    [[ACCUM_NEXT_LCSSA:%.*]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ]956; CHECK-NEXT:    ret i32 [[ACCUM_NEXT_LCSSA]]957;958entry:959  %alloca = alloca [4096 x i32]960  call void @init(ptr %alloca)961  br label %loop962loop:963  %iv = phi i64 [ -10, %entry ], [ %iv.next, %latch ]964  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]965  %iv.next = add i64 %iv, 1966  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv967  %earlycnd = load i1, ptr %test_addr968  br i1 %earlycnd, label %pred, label %latch969pred:970  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv971  %val = load i32, ptr %addr972  br label %latch973latch:974  %val.phi = phi i32 [0, %loop], [%val, %pred]975  %accum.next = add i32 %accum, %val.phi976  %exit = icmp ugt i64 %iv, 4094977  br i1 %exit, label %loop_exit, label %loop978 979loop_exit:980  ret i32 %accum.next981}982 983define i32 @test_non_unit_stride(i64 %len, ptr %test_base) {984; CHECK-LABEL: @test_non_unit_stride(985; CHECK-NEXT:  entry:986; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 4987; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])988; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]989; CHECK:       vector.ph:990; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]991; CHECK:       vector.body:992; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]993; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP112:%.*]], [[VECTOR_BODY]] ]994; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP113:%.*]], [[VECTOR_BODY]] ]995; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP114:%.*]], [[VECTOR_BODY]] ]996; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP115:%.*]], [[VECTOR_BODY]] ]997; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 2998; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 0999; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 21000; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[OFFSET_IDX]], 41001; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 61002; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 81003; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 101004; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 121005; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 141006; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 161007; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[OFFSET_IDX]], 181008; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[OFFSET_IDX]], 201009; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 221010; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 241011; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[OFFSET_IDX]], 261012; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[OFFSET_IDX]], 281013; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 301014; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]1015; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]1016; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]1017; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]1018; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]1019; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]1020; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]1021; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]1022; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]1023; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]1024; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]1025; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]1026; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]1027; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]1028; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]1029; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]1030; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 11031; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 11032; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 11033; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 11034; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 01035; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 11036; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 21037; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 31038; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 11039; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 11040; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 11041; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 11042; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 01043; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 11044; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 21045; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 31046; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 11047; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 11048; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 11049; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 11050; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 01051; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 11052; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 21053; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 31054; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 11055; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 11056; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 11057; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 11058; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 01059; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 11060; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 21061; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 31062; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP0]]1063; CHECK-NEXT:    [[TMP65:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP1]]1064; CHECK-NEXT:    [[TMP66:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP2]]1065; CHECK-NEXT:    [[TMP67:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP3]]1066; CHECK-NEXT:    [[TMP68:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP4]]1067; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP5]]1068; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP6]]1069; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP7]]1070; CHECK-NEXT:    [[TMP72:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP8]]1071; CHECK-NEXT:    [[TMP73:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP9]]1072; CHECK-NEXT:    [[TMP74:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP10]]1073; CHECK-NEXT:    [[TMP75:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP11]]1074; CHECK-NEXT:    [[TMP76:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP12]]1075; CHECK-NEXT:    [[TMP77:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP13]]1076; CHECK-NEXT:    [[TMP78:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP14]]1077; CHECK-NEXT:    [[TMP79:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP15]]1078; CHECK-NEXT:    [[TMP80:%.*]] = load i32, ptr [[TMP64]], align 41079; CHECK-NEXT:    [[TMP81:%.*]] = load i32, ptr [[TMP65]], align 41080; CHECK-NEXT:    [[TMP82:%.*]] = load i32, ptr [[TMP66]], align 41081; CHECK-NEXT:    [[TMP83:%.*]] = load i32, ptr [[TMP67]], align 41082; CHECK-NEXT:    [[TMP84:%.*]] = insertelement <4 x i32> poison, i32 [[TMP80]], i32 01083; CHECK-NEXT:    [[TMP85:%.*]] = insertelement <4 x i32> [[TMP84]], i32 [[TMP81]], i32 11084; CHECK-NEXT:    [[TMP86:%.*]] = insertelement <4 x i32> [[TMP85]], i32 [[TMP82]], i32 21085; CHECK-NEXT:    [[TMP87:%.*]] = insertelement <4 x i32> [[TMP86]], i32 [[TMP83]], i32 31086; CHECK-NEXT:    [[TMP88:%.*]] = load i32, ptr [[TMP68]], align 41087; CHECK-NEXT:    [[TMP89:%.*]] = load i32, ptr [[TMP69]], align 41088; CHECK-NEXT:    [[TMP90:%.*]] = load i32, ptr [[TMP70]], align 41089; CHECK-NEXT:    [[TMP91:%.*]] = load i32, ptr [[TMP71]], align 41090; CHECK-NEXT:    [[TMP92:%.*]] = insertelement <4 x i32> poison, i32 [[TMP88]], i32 01091; CHECK-NEXT:    [[TMP93:%.*]] = insertelement <4 x i32> [[TMP92]], i32 [[TMP89]], i32 11092; CHECK-NEXT:    [[TMP94:%.*]] = insertelement <4 x i32> [[TMP93]], i32 [[TMP90]], i32 21093; CHECK-NEXT:    [[TMP95:%.*]] = insertelement <4 x i32> [[TMP94]], i32 [[TMP91]], i32 31094; CHECK-NEXT:    [[TMP96:%.*]] = load i32, ptr [[TMP72]], align 41095; CHECK-NEXT:    [[TMP97:%.*]] = load i32, ptr [[TMP73]], align 41096; CHECK-NEXT:    [[TMP98:%.*]] = load i32, ptr [[TMP74]], align 41097; CHECK-NEXT:    [[TMP99:%.*]] = load i32, ptr [[TMP75]], align 41098; CHECK-NEXT:    [[TMP100:%.*]] = insertelement <4 x i32> poison, i32 [[TMP96]], i32 01099; CHECK-NEXT:    [[TMP101:%.*]] = insertelement <4 x i32> [[TMP100]], i32 [[TMP97]], i32 11100; CHECK-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> [[TMP101]], i32 [[TMP98]], i32 21101; CHECK-NEXT:    [[TMP103:%.*]] = insertelement <4 x i32> [[TMP102]], i32 [[TMP99]], i32 31102; CHECK-NEXT:    [[TMP104:%.*]] = load i32, ptr [[TMP76]], align 41103; CHECK-NEXT:    [[TMP105:%.*]] = load i32, ptr [[TMP77]], align 41104; CHECK-NEXT:    [[TMP106:%.*]] = load i32, ptr [[TMP78]], align 41105; CHECK-NEXT:    [[TMP107:%.*]] = load i32, ptr [[TMP79]], align 41106; CHECK-NEXT:    [[TMP108:%.*]] = insertelement <4 x i32> poison, i32 [[TMP104]], i32 01107; CHECK-NEXT:    [[TMP109:%.*]] = insertelement <4 x i32> [[TMP108]], i32 [[TMP105]], i32 11108; CHECK-NEXT:    [[TMP110:%.*]] = insertelement <4 x i32> [[TMP109]], i32 [[TMP106]], i32 21109; CHECK-NEXT:    [[TMP111:%.*]] = insertelement <4 x i32> [[TMP110]], i32 [[TMP107]], i32 31110; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[TMP87]], <4 x i32> zeroinitializer1111; CHECK-NEXT:    [[PREDPHI4:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[TMP95]], <4 x i32> zeroinitializer1112; CHECK-NEXT:    [[PREDPHI5:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[TMP103]], <4 x i32> zeroinitializer1113; CHECK-NEXT:    [[PREDPHI6:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[TMP111]], <4 x i32> zeroinitializer1114; CHECK-NEXT:    [[TMP112]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]1115; CHECK-NEXT:    [[TMP113]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI4]]1116; CHECK-NEXT:    [[TMP114]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI5]]1117; CHECK-NEXT:    [[TMP115]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI6]]1118; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 161119; CHECK-NEXT:    [[TMP116:%.*]] = icmp eq i64 [[INDEX_NEXT]], 20481120; CHECK-NEXT:    br i1 [[TMP116]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]1121; CHECK:       middle.block:1122; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP113]], [[TMP112]]1123; CHECK-NEXT:    [[BIN_RDX7:%.*]] = add <4 x i32> [[TMP114]], [[BIN_RDX]]1124; CHECK-NEXT:    [[BIN_RDX8:%.*]] = add <4 x i32> [[TMP115]], [[BIN_RDX7]]1125; CHECK-NEXT:    [[TMP117:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX8]])1126; CHECK-NEXT:    br label [[LATCH:%.*]]1127; CHECK:       loop_exit:1128; CHECK-NEXT:    ret i32 [[TMP117]]1129;1130entry:1131  %alloca = alloca [4096 x i32]1132  call void @init(ptr %alloca)1133  br label %loop1134loop:1135  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]1136  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]1137  %iv.next = add i64 %iv, 21138  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv1139  %earlycnd = load i1, ptr %test_addr1140  br i1 %earlycnd, label %pred, label %latch1141pred:1142  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv1143  %val = load i32, ptr %addr1144  br label %latch1145latch:1146  %val.phi = phi i32 [0, %loop], [%val, %pred]1147  %accum.next = add i32 %accum, %val.phi1148  %exit = icmp ugt i64 %iv, 40931149  br i1 %exit, label %loop_exit, label %loop1150 1151loop_exit:1152  ret i32 %accum.next1153}1154 1155define i32 @neg_off_by_many(i64 %len, ptr %test_base) {1156; CHECK-LABEL: @neg_off_by_many(1157; CHECK-NEXT:  entry:1158; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [1024 x i32], align 41159; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])1160; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]1161; CHECK:       vector.ph:1162; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]1163; CHECK:       vector.body:1164; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]1165; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP72:%.*]], [[VECTOR_BODY]] ]1166; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]1167; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]1168; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]1169; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 01170; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 11171; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 21172; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 31173; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 41174; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 51175; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 61176; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 71177; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 81178; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 91179; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 101180; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 111181; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 121182; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 131183; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 141184; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 151185; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]1186; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]1187; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]1188; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]1189; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]1190; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]1191; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]1192; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]1193; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]1194; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]1195; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]1196; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]1197; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]1198; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]1199; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]1200; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]1201; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 11202; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 11203; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 11204; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 11205; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 01206; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 11207; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 21208; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 31209; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 11210; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 11211; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 11212; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 11213; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 01214; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 11215; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 21216; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 31217; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 11218; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 11219; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 11220; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 11221; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 01222; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 11223; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 21224; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 31225; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 11226; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 11227; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 11228; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 11229; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 01230; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 11231; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 21232; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 31233; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr i32, ptr [[ALLOCA]], i64 [[TMP0]]1234; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr i32, ptr [[TMP64]], i64 41235; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP64]], i64 81236; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP64]], i64 121237; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP64]], <4 x i1> [[TMP39]], <4 x i32> poison)1238; CHECK-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP69]], <4 x i1> [[TMP47]], <4 x i32> poison)1239; CHECK-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP70]], <4 x i1> [[TMP55]], <4 x i32> poison)1240; CHECK-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP71]], <4 x i1> [[TMP63]], <4 x i32> poison)1241; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer1242; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer1243; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer1244; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer1245; CHECK-NEXT:    [[TMP72]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]1246; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]1247; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]1248; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]1249; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 161250; CHECK-NEXT:    [[TMP76:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40961251; CHECK-NEXT:    br i1 [[TMP76]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]1252; CHECK:       middle.block:1253; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP73]], [[TMP72]]1254; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP74]], [[BIN_RDX]]1255; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX10]]1256; CHECK-NEXT:    [[TMP77:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])1257; CHECK-NEXT:    br label [[LATCH:%.*]]1258; CHECK:       loop_exit:1259; CHECK-NEXT:    ret i32 [[TMP77]]1260;1261entry:1262  %alloca = alloca [1024 x i32]1263  call void @init(ptr %alloca)1264  br label %loop1265loop:1266  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]1267  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]1268  %iv.next = add i64 %iv, 11269  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv1270  %earlycnd = load i1, ptr %test_addr1271  br i1 %earlycnd, label %pred, label %latch1272pred:1273  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv1274  %val = load i32, ptr %addr1275  br label %latch1276latch:1277  %val.phi = phi i32 [0, %loop], [%val, %pred]1278  %accum.next = add i32 %accum, %val.phi1279  %exit = icmp ugt i64 %iv, 40941280  br i1 %exit, label %loop_exit, label %loop1281 1282loop_exit:1283  ret i32 %accum.next1284}1285 1286define i32 @neg_off_by_one_iteration(i64 %len, ptr %test_base) {1287; CHECK-LABEL: @neg_off_by_one_iteration(1288; CHECK-NEXT:  entry:1289; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4095 x i32], align 41290; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])1291; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]1292; CHECK:       vector.ph:1293; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]1294; CHECK:       vector.body:1295; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]1296; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP72:%.*]], [[VECTOR_BODY]] ]1297; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]1298; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]1299; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]1300; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 01301; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 11302; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 21303; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 31304; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 41305; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 51306; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 61307; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 71308; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 81309; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 91310; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 101311; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 111312; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 121313; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 131314; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 141315; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 151316; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]1317; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]1318; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]1319; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]1320; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]1321; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]1322; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]1323; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]1324; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]1325; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]1326; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]1327; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]1328; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]1329; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]1330; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]1331; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]1332; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 11333; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 11334; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 11335; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 11336; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 01337; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 11338; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 21339; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 31340; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 11341; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 11342; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 11343; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 11344; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 01345; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 11346; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 21347; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 31348; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 11349; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 11350; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 11351; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 11352; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 01353; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 11354; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 21355; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 31356; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 11357; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 11358; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 11359; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 11360; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 01361; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 11362; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 21363; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 31364; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr i32, ptr [[ALLOCA]], i64 [[TMP0]]1365; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr i32, ptr [[TMP64]], i64 41366; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP64]], i64 81367; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP64]], i64 121368; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP64]], <4 x i1> [[TMP39]], <4 x i32> poison)1369; CHECK-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP69]], <4 x i1> [[TMP47]], <4 x i32> poison)1370; CHECK-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP70]], <4 x i1> [[TMP55]], <4 x i32> poison)1371; CHECK-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP71]], <4 x i1> [[TMP63]], <4 x i32> poison)1372; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer1373; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer1374; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer1375; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer1376; CHECK-NEXT:    [[TMP72]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]1377; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]1378; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]1379; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]1380; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 161381; CHECK-NEXT:    [[TMP76:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40961382; CHECK-NEXT:    br i1 [[TMP76]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]1383; CHECK:       middle.block:1384; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP73]], [[TMP72]]1385; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP74]], [[BIN_RDX]]1386; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX10]]1387; CHECK-NEXT:    [[TMP77:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])1388; CHECK-NEXT:    br label [[LATCH:%.*]]1389; CHECK:       loop_exit:1390; CHECK-NEXT:    ret i32 [[TMP77]]1391;1392entry:1393  %alloca = alloca [4095 x i32]1394  call void @init(ptr %alloca)1395  br label %loop1396loop:1397  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]1398  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]1399  %iv.next = add i64 %iv, 11400  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv1401  %earlycnd = load i1, ptr %test_addr1402  br i1 %earlycnd, label %pred, label %latch1403pred:1404  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv1405  %val = load i32, ptr %addr1406  br label %latch1407latch:1408  %val.phi = phi i32 [0, %loop], [%val, %pred]1409  %accum.next = add i32 %accum, %val.phi1410  %exit = icmp ugt i64 %iv, 40941411  br i1 %exit, label %loop_exit, label %loop1412 1413loop_exit:1414  ret i32 %accum.next1415}1416 1417define i32 @neg_off_by_one_byte(i64 %len, ptr %test_base) {1418; CHECK-LABEL: @neg_off_by_one_byte(1419; CHECK-NEXT:  entry:1420; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [16383 x i8], align 11421; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])1422; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]1423; CHECK:       vector.ph:1424; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]1425; CHECK:       vector.body:1426; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]1427; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP72:%.*]], [[VECTOR_BODY]] ]1428; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]1429; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]1430; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]1431; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 01432; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 11433; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 21434; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 31435; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 41436; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 51437; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 61438; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 71439; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 81440; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 91441; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 101442; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 111443; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 121444; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 131445; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 141446; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 151447; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]1448; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]1449; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]1450; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]1451; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]1452; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]1453; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]1454; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]1455; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]1456; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]1457; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]1458; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]1459; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]1460; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]1461; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]1462; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]1463; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 11464; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 11465; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 11466; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 11467; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 01468; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 11469; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 21470; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 31471; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 11472; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 11473; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 11474; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 11475; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 01476; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 11477; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 21478; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 31479; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 11480; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 11481; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 11482; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 11483; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 01484; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 11485; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 21486; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 31487; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 11488; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 11489; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 11490; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 11491; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 01492; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 11493; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 21494; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 31495; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr i32, ptr [[ALLOCA]], i64 [[TMP0]]1496; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr i32, ptr [[TMP64]], i64 41497; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP64]], i64 81498; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP64]], i64 121499; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP64]], <4 x i1> [[TMP39]], <4 x i32> poison)1500; CHECK-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP69]], <4 x i1> [[TMP47]], <4 x i32> poison)1501; CHECK-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP70]], <4 x i1> [[TMP55]], <4 x i32> poison)1502; CHECK-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP71]], <4 x i1> [[TMP63]], <4 x i32> poison)1503; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer1504; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer1505; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer1506; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer1507; CHECK-NEXT:    [[TMP72]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]1508; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]1509; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]1510; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]1511; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 161512; CHECK-NEXT:    [[TMP76:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40961513; CHECK-NEXT:    br i1 [[TMP76]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]1514; CHECK:       middle.block:1515; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP73]], [[TMP72]]1516; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP74]], [[BIN_RDX]]1517; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX10]]1518; CHECK-NEXT:    [[TMP77:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])1519; CHECK-NEXT:    br label [[LATCH:%.*]]1520; CHECK:       loop_exit:1521; CHECK-NEXT:    ret i32 [[TMP77]]1522;1523entry:1524  %alloca = alloca [16383 x i8]1525  call void @init(ptr %alloca)1526  br label %loop1527loop:1528  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]1529  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]1530  %iv.next = add i64 %iv, 11531  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv1532  %earlycnd = load i1, ptr %test_addr1533  br i1 %earlycnd, label %pred, label %latch1534pred:1535  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv1536  %val = load i32, ptr %addr1537  br label %latch1538latch:1539  %val.phi = phi i32 [0, %loop], [%val, %pred]1540  %accum.next = add i32 %accum, %val.phi1541  %exit = icmp ugt i64 %iv, 40941542  br i1 %exit, label %loop_exit, label %loop1543 1544loop_exit:1545  ret i32 %accum.next1546}1547 1548 1549; Show that we handle case where exit count is non-constant, but that we1550; have a constant bound on it which is sufficient to show dereferenceability.1551define i32 @test_constant_max(i64 %len, ptr %test_base) {1552; CHECK-LABEL: @test_constant_max(1553; CHECK-NEXT:  entry:1554; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 41555; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])1556; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[LEN:%.*]], 40941557; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[CMP]], i64 4094, i64 [[LEN]]1558; CHECK-NEXT:    [[TMP0:%.*]] = add nuw nsw i64 [[MIN]], 21559; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 161560; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]1561; CHECK:       vector.ph:1562; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 161563; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]1564; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]1565; CHECK:       vector.body:1566; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]1567; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]1568; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]1569; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]1570; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP76:%.*]], [[VECTOR_BODY]] ]1571; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 01572; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 11573; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 21574; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 31575; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 41576; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 51577; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 61578; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 71579; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 81580; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 91581; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 101582; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 111583; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 121584; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 131585; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 141586; CHECK-NEXT:    [[TMP16:%.*]] = add i64 [[INDEX]], 151587; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP1]]1588; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]1589; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]1590; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]1591; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]1592; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]1593; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]1594; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]1595; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]1596; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]1597; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]1598; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]1599; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]1600; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]1601; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]1602; CHECK-NEXT:    [[TMP32:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP16]]1603; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 11604; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 11605; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 11606; CHECK-NEXT:    [[TMP36:%.*]] = load i1, ptr [[TMP20]], align 11607; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> poison, i1 [[TMP33]], i32 01608; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 11609; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 21610; CHECK-NEXT:    [[TMP40:%.*]] = insertelement <4 x i1> [[TMP39]], i1 [[TMP36]], i32 31611; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 11612; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 11613; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 11614; CHECK-NEXT:    [[TMP44:%.*]] = load i1, ptr [[TMP24]], align 11615; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> poison, i1 [[TMP41]], i32 01616; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 11617; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 21618; CHECK-NEXT:    [[TMP48:%.*]] = insertelement <4 x i1> [[TMP47]], i1 [[TMP44]], i32 31619; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 11620; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 11621; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 11622; CHECK-NEXT:    [[TMP52:%.*]] = load i1, ptr [[TMP28]], align 11623; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> poison, i1 [[TMP49]], i32 01624; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 11625; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 21626; CHECK-NEXT:    [[TMP56:%.*]] = insertelement <4 x i1> [[TMP55]], i1 [[TMP52]], i32 31627; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 11628; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 11629; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 11630; CHECK-NEXT:    [[TMP60:%.*]] = load i1, ptr [[TMP32]], align 11631; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> poison, i1 [[TMP57]], i32 01632; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 11633; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 21634; CHECK-NEXT:    [[TMP64:%.*]] = insertelement <4 x i1> [[TMP63]], i1 [[TMP60]], i32 31635; CHECK-NEXT:    [[TMP65:%.*]] = getelementptr i32, ptr [[ALLOCA]], i64 [[TMP1]]1636; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP65]], i64 41637; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP65]], i64 81638; CHECK-NEXT:    [[TMP72:%.*]] = getelementptr i32, ptr [[TMP65]], i64 121639; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP65]], align 41640; CHECK-NEXT:    [[WIDE_LOAD4:%.*]] = load <4 x i32>, ptr [[TMP70]], align 41641; CHECK-NEXT:    [[WIDE_LOAD5:%.*]] = load <4 x i32>, ptr [[TMP71]], align 41642; CHECK-NEXT:    [[WIDE_LOAD6:%.*]] = load <4 x i32>, ptr [[TMP72]], align 41643; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP40]], <4 x i32> [[WIDE_LOAD]], <4 x i32> zeroinitializer1644; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP48]], <4 x i32> [[WIDE_LOAD4]], <4 x i32> zeroinitializer1645; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP56]], <4 x i32> [[WIDE_LOAD5]], <4 x i32> zeroinitializer1646; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP64]], <4 x i32> [[WIDE_LOAD6]], <4 x i32> zeroinitializer1647; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]1648; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]1649; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]1650; CHECK-NEXT:    [[TMP76]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]1651; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 161652; CHECK-NEXT:    [[TMP77:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1653; CHECK-NEXT:    br i1 [[TMP77]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]1654; CHECK:       middle.block:1655; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP74]], [[TMP73]]1656; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX]]1657; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP76]], [[BIN_RDX10]]1658; CHECK-NEXT:    [[TMP78:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])1659; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]1660; CHECK-NEXT:    br i1 [[CMP_N]], label [[LOOP_EXIT:%.*]], label [[SCALAR_PH]]1661; CHECK:       scalar.ph:1662; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]1663; CHECK-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP78]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]1664; CHECK-NEXT:    br label [[LOOP:%.*]]1665; CHECK:       loop:1666; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]1667; CHECK-NEXT:    [[ACCUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.*]], [[LATCH]] ]1668; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 11669; CHECK-NEXT:    [[TEST_ADDR:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[IV]]1670; CHECK-NEXT:    [[EARLYCND:%.*]] = load i1, ptr [[TEST_ADDR]], align 11671; CHECK-NEXT:    br i1 [[EARLYCND]], label [[PRED:%.*]], label [[LATCH]]1672; CHECK:       pred:1673; CHECK-NEXT:    [[ADDR:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[IV]]1674; CHECK-NEXT:    [[VAL:%.*]] = load i32, ptr [[ADDR]], align 41675; CHECK-NEXT:    br label [[LATCH]]1676; CHECK:       latch:1677; CHECK-NEXT:    [[VAL_PHI:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ]1678; CHECK-NEXT:    [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[VAL_PHI]]1679; CHECK-NEXT:    [[EXIT:%.*]] = icmp ugt i64 [[IV]], [[MIN]]1680; CHECK-NEXT:    br i1 [[EXIT]], label [[LOOP_EXIT]], label [[LOOP]], !llvm.loop [[LOOP14:![0-9]+]]1681; CHECK:       loop_exit:1682; CHECK-NEXT:    [[ACCUM_NEXT_LCSSA:%.*]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ], [ [[TMP78]], [[MIDDLE_BLOCK]] ]1683; CHECK-NEXT:    ret i32 [[ACCUM_NEXT_LCSSA]]1684;1685entry:1686  %alloca = alloca [4096 x i32]1687  call void @init(ptr %alloca)1688  %cmp = icmp ugt i64 %len, 40941689  %min = select i1 %cmp, i64 4094, i64 %len1690  br label %loop1691loop:1692  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]1693  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]1694  %iv.next = add i64 %iv, 11695  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv1696  %earlycnd = load i1, ptr %test_addr1697  br i1 %earlycnd, label %pred, label %latch1698pred:1699  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv1700  %val = load i32, ptr %addr1701  br label %latch1702latch:1703  %val.phi = phi i32 [0, %loop], [%val, %pred]1704  %accum.next = add i32 %accum, %val.phi1705  %exit = icmp ugt i64 %iv, %min1706  br i1 %exit, label %loop_exit, label %loop1707 1708loop_exit:1709  ret i32 %accum.next1710}1711 1712 1713;; Model a custom allocate which allocates in chunks of 8 bytes1714declare align 8 dereferenceable_or_null(8) ptr @my_alloc(i32) allocsize(0)1715declare align 8 dereferenceable_or_null(8) ptr @my_array_alloc(i32, i32) allocsize(0, 1)1716 1717define i32 @test_allocsize(i64 %len, ptr %test_base) nofree nosync {1718; CHECK-LABEL: @test_allocsize(1719; CHECK-NEXT:  entry:1720; CHECK-NEXT:    [[ALLOCATION:%.*]] = call nonnull ptr @my_alloc(i32 16384)1721; CHECK-NEXT:    call void @init(ptr [[ALLOCATION]])1722; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]1723; CHECK:       vector.ph:1724; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]1725; CHECK:       vector.body:1726; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]1727; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP72:%.*]], [[VECTOR_BODY]] ]1728; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]1729; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]1730; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]1731; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 01732; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 11733; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 21734; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 31735; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 41736; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 51737; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 61738; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 71739; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 81740; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 91741; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 101742; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 111743; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 121744; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 131745; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 141746; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 151747; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]1748; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]1749; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]1750; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]1751; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]1752; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]1753; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]1754; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]1755; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]1756; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]1757; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]1758; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]1759; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]1760; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]1761; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]1762; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]1763; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 11764; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 11765; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 11766; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 11767; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 01768; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 11769; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 21770; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 31771; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 11772; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 11773; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 11774; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 11775; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 01776; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 11777; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 21778; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 31779; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 11780; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 11781; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 11782; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 11783; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 01784; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 11785; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 21786; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 31787; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 11788; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 11789; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 11790; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 11791; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 01792; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 11793; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 21794; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 31795; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr i32, ptr [[ALLOCATION]], i64 [[TMP0]]1796; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr i32, ptr [[TMP64]], i64 41797; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP64]], i64 81798; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP64]], i64 121799; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP64]], <4 x i1> [[TMP39]], <4 x i32> poison)1800; CHECK-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP69]], <4 x i1> [[TMP47]], <4 x i32> poison)1801; CHECK-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP70]], <4 x i1> [[TMP55]], <4 x i32> poison)1802; CHECK-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP71]], <4 x i1> [[TMP63]], <4 x i32> poison)1803; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer1804; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer1805; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer1806; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer1807; CHECK-NEXT:    [[TMP72]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]1808; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]1809; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]1810; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]1811; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 161812; CHECK-NEXT:    [[TMP76:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40961813; CHECK-NEXT:    br i1 [[TMP76]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]1814; CHECK:       middle.block:1815; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP73]], [[TMP72]]1816; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP74]], [[BIN_RDX]]1817; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX10]]1818; CHECK-NEXT:    [[TMP77:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])1819; CHECK-NEXT:    br label [[LATCH:%.*]]1820; CHECK:       loop_exit:1821; CHECK-NEXT:    ret i32 [[TMP77]]1822;1823entry:1824  %allocation = call nonnull ptr @my_alloc(i32 16384)1825  call void @init(ptr %allocation)1826  br label %loop1827loop:1828  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]1829  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]1830  %iv.next = add i64 %iv, 11831  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv1832  %earlycnd = load i1, ptr %test_addr1833  br i1 %earlycnd, label %pred, label %latch1834pred:1835  %addr = getelementptr inbounds i32, ptr %allocation, i64 %iv1836  %val = load i32, ptr %addr1837  br label %latch1838latch:1839  %val.phi = phi i32 [0, %loop], [%val, %pred]1840  %accum.next = add i32 %accum, %val.phi1841  %exit = icmp ugt i64 %iv, 40941842  br i1 %exit, label %loop_exit, label %loop1843 1844loop_exit:1845  ret i32 %accum.next1846}1847 1848 1849define i32 @test_allocsize_array(i64 %len, ptr %test_base) nofree nosync {1850; CHECK-LABEL: @test_allocsize_array(1851; CHECK-NEXT:  entry:1852; CHECK-NEXT:    [[ALLOCATION:%.*]] = call nonnull ptr @my_array_alloc(i32 4096, i32 4)1853; CHECK-NEXT:    call void @init(ptr [[ALLOCATION]])1854; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]1855; CHECK:       vector.ph:1856; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]1857; CHECK:       vector.body:1858; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]1859; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP72:%.*]], [[VECTOR_BODY]] ]1860; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]1861; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]1862; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]1863; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 01864; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 11865; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 21866; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 31867; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 41868; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 51869; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 61870; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 71871; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 81872; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 91873; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 101874; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 111875; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 121876; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 131877; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 141878; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 151879; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]1880; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]1881; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]1882; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]1883; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]1884; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]1885; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]1886; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]1887; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]1888; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]1889; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]1890; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]1891; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]1892; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]1893; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]1894; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]1895; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 11896; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 11897; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 11898; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 11899; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 01900; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 11901; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 21902; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 31903; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 11904; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 11905; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 11906; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 11907; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 01908; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 11909; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 21910; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 31911; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 11912; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 11913; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 11914; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 11915; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 01916; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 11917; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 21918; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 31919; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 11920; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 11921; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 11922; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 11923; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 01924; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 11925; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 21926; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 31927; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr i32, ptr [[ALLOCATION]], i64 [[TMP0]]1928; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr i32, ptr [[TMP64]], i64 41929; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP64]], i64 81930; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP64]], i64 121931; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP64]], <4 x i1> [[TMP39]], <4 x i32> poison)1932; CHECK-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP69]], <4 x i1> [[TMP47]], <4 x i32> poison)1933; CHECK-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP70]], <4 x i1> [[TMP55]], <4 x i32> poison)1934; CHECK-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP71]], <4 x i1> [[TMP63]], <4 x i32> poison)1935; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer1936; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer1937; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer1938; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer1939; CHECK-NEXT:    [[TMP72]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]1940; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]1941; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]1942; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]1943; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 161944; CHECK-NEXT:    [[TMP76:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40961945; CHECK-NEXT:    br i1 [[TMP76]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]1946; CHECK:       middle.block:1947; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP73]], [[TMP72]]1948; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP74]], [[BIN_RDX]]1949; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX10]]1950; CHECK-NEXT:    [[TMP77:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])1951; CHECK-NEXT:    br label [[LATCH:%.*]]1952; CHECK:       loop_exit:1953; CHECK-NEXT:    ret i32 [[TMP77]]1954;1955entry:1956  %allocation = call nonnull ptr @my_array_alloc(i32 4096, i32 4)1957  call void @init(ptr %allocation)1958  br label %loop1959loop:1960  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]1961  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]1962  %iv.next = add i64 %iv, 11963  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv1964  %earlycnd = load i1, ptr %test_addr1965  br i1 %earlycnd, label %pred, label %latch1966pred:1967  %addr = getelementptr inbounds i32, ptr %allocation, i64 %iv1968  %val = load i32, ptr %addr1969  br label %latch1970latch:1971  %val.phi = phi i32 [0, %loop], [%val, %pred]1972  %accum.next = add i32 %accum, %val.phi1973  %exit = icmp ugt i64 %iv, 40941974  br i1 %exit, label %loop_exit, label %loop1975 1976loop_exit:1977  ret i32 %accum.next1978}1979 1980declare void @my_free(ptr)1981 1982; For the point in time variant of deref(N) semantics, show a negative1983; example where hoisting without explicit predication might introduce a1984; dynamic use after free.  (e.g. allzero is true when all elements of the1985; test vector are false and thus base is never accessed.)1986define i32 @test_allocsize_cond_deref(i1 %allzero, ptr %test_base) {1987; CHECK-LABEL: @test_allocsize_cond_deref(1988; CHECK-NEXT:  entry:1989; CHECK-NEXT:    [[ALLOCATION:%.*]] = call nonnull ptr @my_alloc(i32 16384)1990; CHECK-NEXT:    call void @init(ptr [[ALLOCATION]])1991; CHECK-NEXT:    br i1 [[ALLZERO:%.*]], label [[FREEIT:%.*]], label [[PREHEADER:%.*]]1992; CHECK:       freeit:1993; CHECK-NEXT:    call void @my_free(ptr [[ALLOCATION]])1994; CHECK-NEXT:    br label [[PREHEADER]]1995; CHECK:       preheader:1996; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]1997; CHECK:       vector.ph:1998; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]1999; CHECK:       vector.body:2000; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]2001; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP72:%.*]], [[VECTOR_BODY]] ]2002; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP73:%.*]], [[VECTOR_BODY]] ]2003; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP74:%.*]], [[VECTOR_BODY]] ]2004; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP75:%.*]], [[VECTOR_BODY]] ]2005; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 02006; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 12007; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 22008; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 32009; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 42010; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 52011; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 62012; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 72013; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 82014; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 92015; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 102016; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 112017; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 122018; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 132019; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 142020; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 152021; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]2022; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]2023; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]2024; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]2025; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]2026; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]2027; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]2028; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]2029; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]2030; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]2031; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]2032; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]2033; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]2034; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]2035; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]2036; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]2037; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 12038; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 12039; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 12040; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 12041; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 02042; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 12043; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 22044; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 32045; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 12046; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 12047; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 12048; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 12049; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 02050; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 12051; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 22052; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 32053; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 12054; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 12055; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 12056; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 12057; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 02058; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 12059; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 22060; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 32061; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 12062; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 12063; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 12064; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 12065; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 02066; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 12067; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 22068; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 32069; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr i32, ptr [[ALLOCATION]], i64 [[TMP0]]2070; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr i32, ptr [[TMP64]], i64 42071; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr i32, ptr [[TMP64]], i64 82072; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr i32, ptr [[TMP64]], i64 122073; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP64]], <4 x i1> [[TMP39]], <4 x i32> poison)2074; CHECK-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP69]], <4 x i1> [[TMP47]], <4 x i32> poison)2075; CHECK-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP70]], <4 x i1> [[TMP55]], <4 x i32> poison)2076; CHECK-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[TMP71]], <4 x i1> [[TMP63]], <4 x i32> poison)2077; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer2078; CHECK-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer2079; CHECK-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer2080; CHECK-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer2081; CHECK-NEXT:    [[TMP72]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]2082; CHECK-NEXT:    [[TMP73]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]2083; CHECK-NEXT:    [[TMP74]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]2084; CHECK-NEXT:    [[TMP75]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]2085; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 162086; CHECK-NEXT:    [[TMP76:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40962087; CHECK-NEXT:    br i1 [[TMP76]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]2088; CHECK:       middle.block:2089; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP73]], [[TMP72]]2090; CHECK-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP74]], [[BIN_RDX]]2091; CHECK-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP75]], [[BIN_RDX10]]2092; CHECK-NEXT:    [[TMP77:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])2093; CHECK-NEXT:    br label [[LATCH:%.*]]2094; CHECK:       loop_exit:2095; CHECK-NEXT:    ret i32 [[TMP77]]2096;2097entry:2098  %allocation = call nonnull ptr @my_alloc(i32 16384)2099  call void @init(ptr %allocation)2100  br i1 %allzero, label %freeit, label %preheader2101freeit:2102  call void @my_free(ptr %allocation)2103  br label %preheader2104preheader:2105  br label %loop2106loop:2107  %iv = phi i64 [ 0, %preheader ], [ %iv.next, %latch ]2108  %accum = phi i32 [ 0, %preheader ], [ %accum.next, %latch ]2109  %iv.next = add i64 %iv, 12110  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv2111  %earlycnd = load i1, ptr %test_addr2112  br i1 %earlycnd, label %pred, label %latch2113pred:2114  %addr = getelementptr inbounds i32, ptr %allocation, i64 %iv2115  %val = load i32, ptr %addr2116  br label %latch2117latch:2118  %val.phi = phi i32 [0, %loop], [%val, %pred]2119  %accum.next = add i32 %accum, %val.phi2120  %exit = icmp ugt i64 %iv, 40942121  br i1 %exit, label %loop_exit, label %loop2122 2123loop_exit:2124  ret i32 %accum.next2125}2126 2127 2128; All non-unit stride test cases below.2129; These will be masked gathers with AVX-512 support.2130define i32 @test_stride_three(i64 %len, ptr %test_base) {2131; CHECK-LABEL: @test_stride_three(2132; CHECK-NEXT:  entry:2133; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [105 x i32], align 42134; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])2135; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]2136; CHECK:       vector.ph:2137; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]2138; CHECK:       vector.body:2139; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]2140; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP112:%.*]], [[VECTOR_BODY]] ]2141; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP113:%.*]], [[VECTOR_BODY]] ]2142; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP114:%.*]], [[VECTOR_BODY]] ]2143; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP115:%.*]], [[VECTOR_BODY]] ]2144; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 32145; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 02146; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 32147; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[OFFSET_IDX]], 62148; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 92149; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 122150; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 152151; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 182152; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 212153; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 242154; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[OFFSET_IDX]], 272155; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[OFFSET_IDX]], 302156; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 332157; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 362158; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[OFFSET_IDX]], 392159; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[OFFSET_IDX]], 422160; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 452161; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]2162; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]2163; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]2164; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]2165; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]2166; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]2167; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]2168; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]2169; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]2170; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]2171; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]2172; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]2173; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]2174; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]2175; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]2176; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]2177; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 12178; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 12179; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 12180; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 12181; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 02182; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 12183; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 22184; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 32185; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 12186; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 12187; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 12188; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 12189; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 02190; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 12191; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 22192; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 32193; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 12194; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 12195; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 12196; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 12197; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 02198; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 12199; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 22200; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 32201; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 12202; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 12203; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 12204; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 12205; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 02206; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 12207; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 22208; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 32209; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP0]]2210; CHECK-NEXT:    [[TMP65:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP1]]2211; CHECK-NEXT:    [[TMP66:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP2]]2212; CHECK-NEXT:    [[TMP67:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP3]]2213; CHECK-NEXT:    [[TMP68:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP4]]2214; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP5]]2215; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP6]]2216; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP7]]2217; CHECK-NEXT:    [[TMP72:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP8]]2218; CHECK-NEXT:    [[TMP73:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP9]]2219; CHECK-NEXT:    [[TMP74:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP10]]2220; CHECK-NEXT:    [[TMP75:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP11]]2221; CHECK-NEXT:    [[TMP76:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP12]]2222; CHECK-NEXT:    [[TMP77:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP13]]2223; CHECK-NEXT:    [[TMP78:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP14]]2224; CHECK-NEXT:    [[TMP79:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP15]]2225; CHECK-NEXT:    [[TMP80:%.*]] = load i32, ptr [[TMP64]], align 42226; CHECK-NEXT:    [[TMP81:%.*]] = load i32, ptr [[TMP65]], align 42227; CHECK-NEXT:    [[TMP82:%.*]] = load i32, ptr [[TMP66]], align 42228; CHECK-NEXT:    [[TMP83:%.*]] = load i32, ptr [[TMP67]], align 42229; CHECK-NEXT:    [[TMP84:%.*]] = insertelement <4 x i32> poison, i32 [[TMP80]], i32 02230; CHECK-NEXT:    [[TMP85:%.*]] = insertelement <4 x i32> [[TMP84]], i32 [[TMP81]], i32 12231; CHECK-NEXT:    [[TMP86:%.*]] = insertelement <4 x i32> [[TMP85]], i32 [[TMP82]], i32 22232; CHECK-NEXT:    [[TMP87:%.*]] = insertelement <4 x i32> [[TMP86]], i32 [[TMP83]], i32 32233; CHECK-NEXT:    [[TMP88:%.*]] = load i32, ptr [[TMP68]], align 42234; CHECK-NEXT:    [[TMP89:%.*]] = load i32, ptr [[TMP69]], align 42235; CHECK-NEXT:    [[TMP90:%.*]] = load i32, ptr [[TMP70]], align 42236; CHECK-NEXT:    [[TMP91:%.*]] = load i32, ptr [[TMP71]], align 42237; CHECK-NEXT:    [[TMP92:%.*]] = insertelement <4 x i32> poison, i32 [[TMP88]], i32 02238; CHECK-NEXT:    [[TMP93:%.*]] = insertelement <4 x i32> [[TMP92]], i32 [[TMP89]], i32 12239; CHECK-NEXT:    [[TMP94:%.*]] = insertelement <4 x i32> [[TMP93]], i32 [[TMP90]], i32 22240; CHECK-NEXT:    [[TMP95:%.*]] = insertelement <4 x i32> [[TMP94]], i32 [[TMP91]], i32 32241; CHECK-NEXT:    [[TMP96:%.*]] = load i32, ptr [[TMP72]], align 42242; CHECK-NEXT:    [[TMP97:%.*]] = load i32, ptr [[TMP73]], align 42243; CHECK-NEXT:    [[TMP98:%.*]] = load i32, ptr [[TMP74]], align 42244; CHECK-NEXT:    [[TMP99:%.*]] = load i32, ptr [[TMP75]], align 42245; CHECK-NEXT:    [[TMP100:%.*]] = insertelement <4 x i32> poison, i32 [[TMP96]], i32 02246; CHECK-NEXT:    [[TMP101:%.*]] = insertelement <4 x i32> [[TMP100]], i32 [[TMP97]], i32 12247; CHECK-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> [[TMP101]], i32 [[TMP98]], i32 22248; CHECK-NEXT:    [[TMP103:%.*]] = insertelement <4 x i32> [[TMP102]], i32 [[TMP99]], i32 32249; CHECK-NEXT:    [[TMP104:%.*]] = load i32, ptr [[TMP76]], align 42250; CHECK-NEXT:    [[TMP105:%.*]] = load i32, ptr [[TMP77]], align 42251; CHECK-NEXT:    [[TMP106:%.*]] = load i32, ptr [[TMP78]], align 42252; CHECK-NEXT:    [[TMP107:%.*]] = load i32, ptr [[TMP79]], align 42253; CHECK-NEXT:    [[TMP108:%.*]] = insertelement <4 x i32> poison, i32 [[TMP104]], i32 02254; CHECK-NEXT:    [[TMP109:%.*]] = insertelement <4 x i32> [[TMP108]], i32 [[TMP105]], i32 12255; CHECK-NEXT:    [[TMP110:%.*]] = insertelement <4 x i32> [[TMP109]], i32 [[TMP106]], i32 22256; CHECK-NEXT:    [[TMP111:%.*]] = insertelement <4 x i32> [[TMP110]], i32 [[TMP107]], i32 32257; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[TMP87]], <4 x i32> zeroinitializer2258; CHECK-NEXT:    [[PREDPHI4:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[TMP95]], <4 x i32> zeroinitializer2259; CHECK-NEXT:    [[PREDPHI5:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[TMP103]], <4 x i32> zeroinitializer2260; CHECK-NEXT:    [[PREDPHI6:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[TMP111]], <4 x i32> zeroinitializer2261; CHECK-NEXT:    [[TMP112]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]2262; CHECK-NEXT:    [[TMP113]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI4]]2263; CHECK-NEXT:    [[TMP114]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI5]]2264; CHECK-NEXT:    [[TMP115]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI6]]2265; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 162266; CHECK-NEXT:    [[TMP116:%.*]] = icmp eq i64 [[INDEX_NEXT]], 322267; CHECK-NEXT:    br i1 [[TMP116]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]2268; CHECK:       middle.block:2269; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP113]], [[TMP112]]2270; CHECK-NEXT:    [[BIN_RDX7:%.*]] = add <4 x i32> [[TMP114]], [[BIN_RDX]]2271; CHECK-NEXT:    [[BIN_RDX8:%.*]] = add <4 x i32> [[TMP115]], [[BIN_RDX7]]2272; CHECK-NEXT:    [[TMP117:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX8]])2273; CHECK-NEXT:    br label [[SCALAR_PH:%.*]]2274; CHECK:       scalar.ph:2275; CHECK-NEXT:    br label [[LOOP:%.*]]2276; CHECK:       loop:2277; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 96, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]2278; CHECK-NEXT:    [[ACCUM:%.*]] = phi i32 [ [[TMP117]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.*]], [[LATCH]] ]2279; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 32280; CHECK-NEXT:    [[TEST_ADDR:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[IV]]2281; CHECK-NEXT:    [[EARLYCND:%.*]] = load i1, ptr [[TEST_ADDR]], align 12282; CHECK-NEXT:    br i1 [[EARLYCND]], label [[PRED:%.*]], label [[LATCH]]2283; CHECK:       pred:2284; CHECK-NEXT:    [[ADDR:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[IV]]2285; CHECK-NEXT:    [[VAL:%.*]] = load i32, ptr [[ADDR]], align 42286; CHECK-NEXT:    br label [[LATCH]]2287; CHECK:       latch:2288; CHECK-NEXT:    [[VAL_PHI:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ]2289; CHECK-NEXT:    [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[VAL_PHI]]2290; CHECK-NEXT:    [[EXIT:%.*]] = icmp ugt i64 [[IV]], 1002291; CHECK-NEXT:    br i1 [[EXIT]], label [[LOOP_EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP19:![0-9]+]]2292; CHECK:       loop_exit:2293; CHECK-NEXT:    [[ACCUM_NEXT_LCSSA:%.*]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ]2294; CHECK-NEXT:    ret i32 [[ACCUM_NEXT_LCSSA]]2295;2296entry:2297  %alloca = alloca [105 x i32]2298  call void @init(ptr %alloca)2299  br label %loop2300loop:2301  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]2302  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]2303  %iv.next = add i64 %iv, 32304  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv2305  %earlycnd = load i1, ptr %test_addr2306  br i1 %earlycnd, label %pred, label %latch2307pred:2308  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv2309  %val = load i32, ptr %addr2310  br label %latch2311latch:2312  %val.phi = phi i32 [0, %loop], [%val, %pred]2313  %accum.next = add i32 %accum, %val.phi2314  %exit = icmp ugt i64 %iv, 1002315  br i1 %exit, label %loop_exit, label %loop2316 2317loop_exit:2318  ret i32 %accum.next2319}2320 2321define i32 @test_non_unit_stride_four(i64 %len, ptr %test_base) {2322; CHECK-LABEL: @test_non_unit_stride_four(2323; CHECK-NEXT:  entry:2324; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [108 x i32], align 42325; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])2326; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]2327; CHECK:       vector.ph:2328; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]2329; CHECK:       vector.body:2330; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]2331; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP56:%.*]], [[VECTOR_BODY]] ]2332; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP57:%.*]], [[VECTOR_BODY]] ]2333; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 42334; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 02335; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 42336; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[OFFSET_IDX]], 82337; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 122338; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 162339; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 202340; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 242341; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 282342; CHECK-NEXT:    [[TMP8:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]2343; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]2344; CHECK-NEXT:    [[TMP10:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]2345; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]2346; CHECK-NEXT:    [[TMP12:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]2347; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]2348; CHECK-NEXT:    [[TMP14:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]2349; CHECK-NEXT:    [[TMP15:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]2350; CHECK-NEXT:    [[TMP16:%.*]] = load i1, ptr [[TMP8]], align 12351; CHECK-NEXT:    [[TMP17:%.*]] = load i1, ptr [[TMP9]], align 12352; CHECK-NEXT:    [[TMP18:%.*]] = load i1, ptr [[TMP10]], align 12353; CHECK-NEXT:    [[TMP19:%.*]] = load i1, ptr [[TMP11]], align 12354; CHECK-NEXT:    [[TMP20:%.*]] = insertelement <4 x i1> poison, i1 [[TMP16]], i32 02355; CHECK-NEXT:    [[TMP21:%.*]] = insertelement <4 x i1> [[TMP20]], i1 [[TMP17]], i32 12356; CHECK-NEXT:    [[TMP22:%.*]] = insertelement <4 x i1> [[TMP21]], i1 [[TMP18]], i32 22357; CHECK-NEXT:    [[TMP23:%.*]] = insertelement <4 x i1> [[TMP22]], i1 [[TMP19]], i32 32358; CHECK-NEXT:    [[TMP24:%.*]] = load i1, ptr [[TMP12]], align 12359; CHECK-NEXT:    [[TMP25:%.*]] = load i1, ptr [[TMP13]], align 12360; CHECK-NEXT:    [[TMP26:%.*]] = load i1, ptr [[TMP14]], align 12361; CHECK-NEXT:    [[TMP27:%.*]] = load i1, ptr [[TMP15]], align 12362; CHECK-NEXT:    [[TMP28:%.*]] = insertelement <4 x i1> poison, i1 [[TMP24]], i32 02363; CHECK-NEXT:    [[TMP29:%.*]] = insertelement <4 x i1> [[TMP28]], i1 [[TMP25]], i32 12364; CHECK-NEXT:    [[TMP30:%.*]] = insertelement <4 x i1> [[TMP29]], i1 [[TMP26]], i32 22365; CHECK-NEXT:    [[TMP31:%.*]] = insertelement <4 x i1> [[TMP30]], i1 [[TMP27]], i32 32366; CHECK-NEXT:    [[TMP32:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP0]]2367; CHECK-NEXT:    [[TMP33:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP1]]2368; CHECK-NEXT:    [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP2]]2369; CHECK-NEXT:    [[TMP35:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP3]]2370; CHECK-NEXT:    [[TMP36:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP4]]2371; CHECK-NEXT:    [[TMP37:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP5]]2372; CHECK-NEXT:    [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP6]]2373; CHECK-NEXT:    [[TMP39:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP7]]2374; CHECK-NEXT:    [[TMP40:%.*]] = load i32, ptr [[TMP32]], align 42375; CHECK-NEXT:    [[TMP41:%.*]] = load i32, ptr [[TMP33]], align 42376; CHECK-NEXT:    [[TMP42:%.*]] = load i32, ptr [[TMP34]], align 42377; CHECK-NEXT:    [[TMP43:%.*]] = load i32, ptr [[TMP35]], align 42378; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i32> poison, i32 [[TMP40]], i32 02379; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i32> [[TMP44]], i32 [[TMP41]], i32 12380; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i32> [[TMP45]], i32 [[TMP42]], i32 22381; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i32> [[TMP46]], i32 [[TMP43]], i32 32382; CHECK-NEXT:    [[TMP48:%.*]] = load i32, ptr [[TMP36]], align 42383; CHECK-NEXT:    [[TMP49:%.*]] = load i32, ptr [[TMP37]], align 42384; CHECK-NEXT:    [[TMP50:%.*]] = load i32, ptr [[TMP38]], align 42385; CHECK-NEXT:    [[TMP51:%.*]] = load i32, ptr [[TMP39]], align 42386; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i32> poison, i32 [[TMP48]], i32 02387; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i32> [[TMP52]], i32 [[TMP49]], i32 12388; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i32> [[TMP53]], i32 [[TMP50]], i32 22389; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i32> [[TMP54]], i32 [[TMP51]], i32 32390; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP23]], <4 x i32> [[TMP47]], <4 x i32> zeroinitializer2391; CHECK-NEXT:    [[PREDPHI2:%.*]] = select <4 x i1> [[TMP31]], <4 x i32> [[TMP55]], <4 x i32> zeroinitializer2392; CHECK-NEXT:    [[TMP56]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]2393; CHECK-NEXT:    [[TMP57]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI2]]2394; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 82395; CHECK-NEXT:    [[TMP58:%.*]] = icmp eq i64 [[INDEX_NEXT]], 242396; CHECK-NEXT:    br i1 [[TMP58]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]2397; CHECK:       middle.block:2398; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP57]], [[TMP56]]2399; CHECK-NEXT:    [[TMP59:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX]])2400; CHECK-NEXT:    br label [[SCALAR_PH:%.*]]2401; CHECK:       scalar.ph:2402; CHECK-NEXT:    br label [[LOOP:%.*]]2403; CHECK:       loop:2404; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 96, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]2405; CHECK-NEXT:    [[ACCUM:%.*]] = phi i32 [ [[TMP59]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.*]], [[LATCH]] ]2406; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 42407; CHECK-NEXT:    [[TEST_ADDR:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[IV]]2408; CHECK-NEXT:    [[EARLYCND:%.*]] = load i1, ptr [[TEST_ADDR]], align 12409; CHECK-NEXT:    br i1 [[EARLYCND]], label [[PRED:%.*]], label [[LATCH]]2410; CHECK:       pred:2411; CHECK-NEXT:    [[ADDR:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[IV]]2412; CHECK-NEXT:    [[VAL:%.*]] = load i32, ptr [[ADDR]], align 42413; CHECK-NEXT:    br label [[LATCH]]2414; CHECK:       latch:2415; CHECK-NEXT:    [[VAL_PHI:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ]2416; CHECK-NEXT:    [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[VAL_PHI]]2417; CHECK-NEXT:    [[EXIT:%.*]] = icmp ugt i64 [[IV]], 1002418; CHECK-NEXT:    br i1 [[EXIT]], label [[LOOP_EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP21:![0-9]+]]2419; CHECK:       loop_exit:2420; CHECK-NEXT:    [[ACCUM_NEXT_LCSSA:%.*]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ]2421; CHECK-NEXT:    ret i32 [[ACCUM_NEXT_LCSSA]]2422;2423entry:2424  %alloca = alloca [108 x i32]2425  call void @init(ptr %alloca)2426  br label %loop2427loop:2428  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]2429  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]2430  %iv.next = add i64 %iv, 42431  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv2432  %earlycnd = load i1, ptr %test_addr2433  br i1 %earlycnd, label %pred, label %latch2434pred:2435  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv2436  %val = load i32, ptr %addr2437  br label %latch2438latch:2439  %val.phi = phi i32 [0, %loop], [%val, %pred]2440  %accum.next = add i32 %accum, %val.phi2441  %exit = icmp ugt i64 %iv, 1002442  br i1 %exit, label %loop_exit, label %loop2443 2444loop_exit:2445  ret i32 %accum.next2446}2447 2448define i32 @test_non_unit_stride_five(i64 %len, ptr %test_base) {2449; CHECK-LABEL: @test_non_unit_stride_five(2450; CHECK-NEXT:  entry:2451; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [110 x i32], align 42452; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])2453; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]2454; CHECK:       vector.ph:2455; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]2456; CHECK:       vector.body:2457; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]2458; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP112:%.*]], [[VECTOR_BODY]] ]2459; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP113:%.*]], [[VECTOR_BODY]] ]2460; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP114:%.*]], [[VECTOR_BODY]] ]2461; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP115:%.*]], [[VECTOR_BODY]] ]2462; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 52463; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 02464; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 52465; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[OFFSET_IDX]], 102466; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 152467; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 202468; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 252469; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 302470; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 352471; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 402472; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[OFFSET_IDX]], 452473; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[OFFSET_IDX]], 502474; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 552475; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 602476; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[OFFSET_IDX]], 652477; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[OFFSET_IDX]], 702478; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 752479; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]2480; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]2481; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]2482; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]2483; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]2484; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]2485; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]2486; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]2487; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]2488; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]2489; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]2490; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]2491; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]2492; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]2493; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]2494; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]2495; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 12496; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 12497; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 12498; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 12499; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 02500; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 12501; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 22502; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 32503; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 12504; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 12505; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 12506; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 12507; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 02508; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 12509; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 22510; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 32511; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 12512; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 12513; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 12514; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 12515; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 02516; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 12517; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 22518; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 32519; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 12520; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 12521; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 12522; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 12523; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 02524; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 12525; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 22526; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 32527; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP0]]2528; CHECK-NEXT:    [[TMP65:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP1]]2529; CHECK-NEXT:    [[TMP66:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP2]]2530; CHECK-NEXT:    [[TMP67:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP3]]2531; CHECK-NEXT:    [[TMP68:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP4]]2532; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP5]]2533; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP6]]2534; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP7]]2535; CHECK-NEXT:    [[TMP72:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP8]]2536; CHECK-NEXT:    [[TMP73:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP9]]2537; CHECK-NEXT:    [[TMP74:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP10]]2538; CHECK-NEXT:    [[TMP75:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP11]]2539; CHECK-NEXT:    [[TMP76:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP12]]2540; CHECK-NEXT:    [[TMP77:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP13]]2541; CHECK-NEXT:    [[TMP78:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP14]]2542; CHECK-NEXT:    [[TMP79:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP15]]2543; CHECK-NEXT:    [[TMP80:%.*]] = load i32, ptr [[TMP64]], align 42544; CHECK-NEXT:    [[TMP81:%.*]] = load i32, ptr [[TMP65]], align 42545; CHECK-NEXT:    [[TMP82:%.*]] = load i32, ptr [[TMP66]], align 42546; CHECK-NEXT:    [[TMP83:%.*]] = load i32, ptr [[TMP67]], align 42547; CHECK-NEXT:    [[TMP84:%.*]] = insertelement <4 x i32> poison, i32 [[TMP80]], i32 02548; CHECK-NEXT:    [[TMP85:%.*]] = insertelement <4 x i32> [[TMP84]], i32 [[TMP81]], i32 12549; CHECK-NEXT:    [[TMP86:%.*]] = insertelement <4 x i32> [[TMP85]], i32 [[TMP82]], i32 22550; CHECK-NEXT:    [[TMP87:%.*]] = insertelement <4 x i32> [[TMP86]], i32 [[TMP83]], i32 32551; CHECK-NEXT:    [[TMP88:%.*]] = load i32, ptr [[TMP68]], align 42552; CHECK-NEXT:    [[TMP89:%.*]] = load i32, ptr [[TMP69]], align 42553; CHECK-NEXT:    [[TMP90:%.*]] = load i32, ptr [[TMP70]], align 42554; CHECK-NEXT:    [[TMP91:%.*]] = load i32, ptr [[TMP71]], align 42555; CHECK-NEXT:    [[TMP92:%.*]] = insertelement <4 x i32> poison, i32 [[TMP88]], i32 02556; CHECK-NEXT:    [[TMP93:%.*]] = insertelement <4 x i32> [[TMP92]], i32 [[TMP89]], i32 12557; CHECK-NEXT:    [[TMP94:%.*]] = insertelement <4 x i32> [[TMP93]], i32 [[TMP90]], i32 22558; CHECK-NEXT:    [[TMP95:%.*]] = insertelement <4 x i32> [[TMP94]], i32 [[TMP91]], i32 32559; CHECK-NEXT:    [[TMP96:%.*]] = load i32, ptr [[TMP72]], align 42560; CHECK-NEXT:    [[TMP97:%.*]] = load i32, ptr [[TMP73]], align 42561; CHECK-NEXT:    [[TMP98:%.*]] = load i32, ptr [[TMP74]], align 42562; CHECK-NEXT:    [[TMP99:%.*]] = load i32, ptr [[TMP75]], align 42563; CHECK-NEXT:    [[TMP100:%.*]] = insertelement <4 x i32> poison, i32 [[TMP96]], i32 02564; CHECK-NEXT:    [[TMP101:%.*]] = insertelement <4 x i32> [[TMP100]], i32 [[TMP97]], i32 12565; CHECK-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> [[TMP101]], i32 [[TMP98]], i32 22566; CHECK-NEXT:    [[TMP103:%.*]] = insertelement <4 x i32> [[TMP102]], i32 [[TMP99]], i32 32567; CHECK-NEXT:    [[TMP104:%.*]] = load i32, ptr [[TMP76]], align 42568; CHECK-NEXT:    [[TMP105:%.*]] = load i32, ptr [[TMP77]], align 42569; CHECK-NEXT:    [[TMP106:%.*]] = load i32, ptr [[TMP78]], align 42570; CHECK-NEXT:    [[TMP107:%.*]] = load i32, ptr [[TMP79]], align 42571; CHECK-NEXT:    [[TMP108:%.*]] = insertelement <4 x i32> poison, i32 [[TMP104]], i32 02572; CHECK-NEXT:    [[TMP109:%.*]] = insertelement <4 x i32> [[TMP108]], i32 [[TMP105]], i32 12573; CHECK-NEXT:    [[TMP110:%.*]] = insertelement <4 x i32> [[TMP109]], i32 [[TMP106]], i32 22574; CHECK-NEXT:    [[TMP111:%.*]] = insertelement <4 x i32> [[TMP110]], i32 [[TMP107]], i32 32575; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[TMP87]], <4 x i32> zeroinitializer2576; CHECK-NEXT:    [[PREDPHI4:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[TMP95]], <4 x i32> zeroinitializer2577; CHECK-NEXT:    [[PREDPHI5:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[TMP103]], <4 x i32> zeroinitializer2578; CHECK-NEXT:    [[PREDPHI6:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[TMP111]], <4 x i32> zeroinitializer2579; CHECK-NEXT:    [[TMP112]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]2580; CHECK-NEXT:    [[TMP113]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI4]]2581; CHECK-NEXT:    [[TMP114]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI5]]2582; CHECK-NEXT:    [[TMP115]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI6]]2583; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 162584; CHECK-NEXT:    br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]]2585; CHECK:       middle.block:2586; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP113]], [[TMP112]]2587; CHECK-NEXT:    [[BIN_RDX7:%.*]] = add <4 x i32> [[TMP114]], [[BIN_RDX]]2588; CHECK-NEXT:    [[BIN_RDX8:%.*]] = add <4 x i32> [[TMP115]], [[BIN_RDX7]]2589; CHECK-NEXT:    [[TMP117:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX8]])2590; CHECK-NEXT:    br label [[SCALAR_PH:%.*]]2591; CHECK:       scalar.ph:2592; CHECK-NEXT:    br label [[LOOP:%.*]]2593; CHECK:       loop:2594; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 80, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]2595; CHECK-NEXT:    [[ACCUM:%.*]] = phi i32 [ [[TMP117]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.*]], [[LATCH]] ]2596; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 52597; CHECK-NEXT:    [[TEST_ADDR:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[IV]]2598; CHECK-NEXT:    [[EARLYCND:%.*]] = load i1, ptr [[TEST_ADDR]], align 12599; CHECK-NEXT:    br i1 [[EARLYCND]], label [[PRED:%.*]], label [[LATCH]]2600; CHECK:       pred:2601; CHECK-NEXT:    [[ADDR:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[IV]]2602; CHECK-NEXT:    [[VAL:%.*]] = load i32, ptr [[ADDR]], align 42603; CHECK-NEXT:    br label [[LATCH]]2604; CHECK:       latch:2605; CHECK-NEXT:    [[VAL_PHI:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ]2606; CHECK-NEXT:    [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[VAL_PHI]]2607; CHECK-NEXT:    [[EXIT:%.*]] = icmp ugt i64 [[IV]], 1002608; CHECK-NEXT:    br i1 [[EXIT]], label [[LOOP_EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP23:![0-9]+]]2609; CHECK:       loop_exit:2610; CHECK-NEXT:    [[ACCUM_NEXT_LCSSA:%.*]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ]2611; CHECK-NEXT:    ret i32 [[ACCUM_NEXT_LCSSA]]2612;2613entry:2614  %alloca = alloca [110 x i32]2615  call void @init(ptr %alloca)2616  br label %loop2617loop:2618  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]2619  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]2620  %iv.next = add i64 %iv, 52621  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv2622  %earlycnd = load i1, ptr %test_addr2623  br i1 %earlycnd, label %pred, label %latch2624pred:2625  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv2626  %val = load i32, ptr %addr2627  br label %latch2628latch:2629  %val.phi = phi i32 [0, %loop], [%val, %pred]2630  %accum.next = add i32 %accum, %val.phi2631  %exit = icmp ugt i64 %iv, 1002632  br i1 %exit, label %loop_exit, label %loop2633 2634loop_exit:2635  ret i32 %accum.next2636}2637 2638define i32 @test_non_unit_stride_off_by_four_bytes(i64 %len, ptr %test_base) {2639; CHECK-LABEL: @test_non_unit_stride_off_by_four_bytes(2640; CHECK-NEXT:  entry:2641; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [103 x i32], align 42642; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])2643; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]2644; CHECK:       vector.ph:2645; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]2646; CHECK:       vector.body:2647; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]2648; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP112:%.*]], [[VECTOR_BODY]] ]2649; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP113:%.*]], [[VECTOR_BODY]] ]2650; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP114:%.*]], [[VECTOR_BODY]] ]2651; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP115:%.*]], [[VECTOR_BODY]] ]2652; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 22653; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 02654; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 22655; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[OFFSET_IDX]], 42656; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 62657; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 82658; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 102659; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 122660; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 142661; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 162662; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[OFFSET_IDX]], 182663; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[OFFSET_IDX]], 202664; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 222665; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 242666; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[OFFSET_IDX]], 262667; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[OFFSET_IDX]], 282668; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 302669; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]2670; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]2671; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]2672; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]2673; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]2674; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]2675; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]2676; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]2677; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]2678; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]2679; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]2680; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]2681; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]2682; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]2683; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]2684; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]2685; CHECK-NEXT:    [[TMP32:%.*]] = load i1, ptr [[TMP16]], align 12686; CHECK-NEXT:    [[TMP33:%.*]] = load i1, ptr [[TMP17]], align 12687; CHECK-NEXT:    [[TMP34:%.*]] = load i1, ptr [[TMP18]], align 12688; CHECK-NEXT:    [[TMP35:%.*]] = load i1, ptr [[TMP19]], align 12689; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <4 x i1> poison, i1 [[TMP32]], i32 02690; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <4 x i1> [[TMP36]], i1 [[TMP33]], i32 12691; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <4 x i1> [[TMP37]], i1 [[TMP34]], i32 22692; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <4 x i1> [[TMP38]], i1 [[TMP35]], i32 32693; CHECK-NEXT:    [[TMP40:%.*]] = load i1, ptr [[TMP20]], align 12694; CHECK-NEXT:    [[TMP41:%.*]] = load i1, ptr [[TMP21]], align 12695; CHECK-NEXT:    [[TMP42:%.*]] = load i1, ptr [[TMP22]], align 12696; CHECK-NEXT:    [[TMP43:%.*]] = load i1, ptr [[TMP23]], align 12697; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <4 x i1> poison, i1 [[TMP40]], i32 02698; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <4 x i1> [[TMP44]], i1 [[TMP41]], i32 12699; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <4 x i1> [[TMP45]], i1 [[TMP42]], i32 22700; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <4 x i1> [[TMP46]], i1 [[TMP43]], i32 32701; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP24]], align 12702; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP25]], align 12703; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP26]], align 12704; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP27]], align 12705; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 02706; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 12707; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 22708; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 32709; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP28]], align 12710; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP29]], align 12711; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP30]], align 12712; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP31]], align 12713; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 02714; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 12715; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 22716; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 32717; CHECK-NEXT:    [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP0]]2718; CHECK-NEXT:    [[TMP65:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP1]]2719; CHECK-NEXT:    [[TMP66:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP2]]2720; CHECK-NEXT:    [[TMP67:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP3]]2721; CHECK-NEXT:    [[TMP68:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP4]]2722; CHECK-NEXT:    [[TMP69:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP5]]2723; CHECK-NEXT:    [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP6]]2724; CHECK-NEXT:    [[TMP71:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP7]]2725; CHECK-NEXT:    [[TMP72:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP8]]2726; CHECK-NEXT:    [[TMP73:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP9]]2727; CHECK-NEXT:    [[TMP74:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP10]]2728; CHECK-NEXT:    [[TMP75:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP11]]2729; CHECK-NEXT:    [[TMP76:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP12]]2730; CHECK-NEXT:    [[TMP77:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP13]]2731; CHECK-NEXT:    [[TMP78:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP14]]2732; CHECK-NEXT:    [[TMP79:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP15]]2733; CHECK-NEXT:    [[TMP80:%.*]] = load i32, ptr [[TMP64]], align 42734; CHECK-NEXT:    [[TMP81:%.*]] = load i32, ptr [[TMP65]], align 42735; CHECK-NEXT:    [[TMP82:%.*]] = load i32, ptr [[TMP66]], align 42736; CHECK-NEXT:    [[TMP83:%.*]] = load i32, ptr [[TMP67]], align 42737; CHECK-NEXT:    [[TMP84:%.*]] = insertelement <4 x i32> poison, i32 [[TMP80]], i32 02738; CHECK-NEXT:    [[TMP85:%.*]] = insertelement <4 x i32> [[TMP84]], i32 [[TMP81]], i32 12739; CHECK-NEXT:    [[TMP86:%.*]] = insertelement <4 x i32> [[TMP85]], i32 [[TMP82]], i32 22740; CHECK-NEXT:    [[TMP87:%.*]] = insertelement <4 x i32> [[TMP86]], i32 [[TMP83]], i32 32741; CHECK-NEXT:    [[TMP88:%.*]] = load i32, ptr [[TMP68]], align 42742; CHECK-NEXT:    [[TMP89:%.*]] = load i32, ptr [[TMP69]], align 42743; CHECK-NEXT:    [[TMP90:%.*]] = load i32, ptr [[TMP70]], align 42744; CHECK-NEXT:    [[TMP91:%.*]] = load i32, ptr [[TMP71]], align 42745; CHECK-NEXT:    [[TMP92:%.*]] = insertelement <4 x i32> poison, i32 [[TMP88]], i32 02746; CHECK-NEXT:    [[TMP93:%.*]] = insertelement <4 x i32> [[TMP92]], i32 [[TMP89]], i32 12747; CHECK-NEXT:    [[TMP94:%.*]] = insertelement <4 x i32> [[TMP93]], i32 [[TMP90]], i32 22748; CHECK-NEXT:    [[TMP95:%.*]] = insertelement <4 x i32> [[TMP94]], i32 [[TMP91]], i32 32749; CHECK-NEXT:    [[TMP96:%.*]] = load i32, ptr [[TMP72]], align 42750; CHECK-NEXT:    [[TMP97:%.*]] = load i32, ptr [[TMP73]], align 42751; CHECK-NEXT:    [[TMP98:%.*]] = load i32, ptr [[TMP74]], align 42752; CHECK-NEXT:    [[TMP99:%.*]] = load i32, ptr [[TMP75]], align 42753; CHECK-NEXT:    [[TMP100:%.*]] = insertelement <4 x i32> poison, i32 [[TMP96]], i32 02754; CHECK-NEXT:    [[TMP101:%.*]] = insertelement <4 x i32> [[TMP100]], i32 [[TMP97]], i32 12755; CHECK-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> [[TMP101]], i32 [[TMP98]], i32 22756; CHECK-NEXT:    [[TMP103:%.*]] = insertelement <4 x i32> [[TMP102]], i32 [[TMP99]], i32 32757; CHECK-NEXT:    [[TMP104:%.*]] = load i32, ptr [[TMP76]], align 42758; CHECK-NEXT:    [[TMP105:%.*]] = load i32, ptr [[TMP77]], align 42759; CHECK-NEXT:    [[TMP106:%.*]] = load i32, ptr [[TMP78]], align 42760; CHECK-NEXT:    [[TMP107:%.*]] = load i32, ptr [[TMP79]], align 42761; CHECK-NEXT:    [[TMP108:%.*]] = insertelement <4 x i32> poison, i32 [[TMP104]], i32 02762; CHECK-NEXT:    [[TMP109:%.*]] = insertelement <4 x i32> [[TMP108]], i32 [[TMP105]], i32 12763; CHECK-NEXT:    [[TMP110:%.*]] = insertelement <4 x i32> [[TMP109]], i32 [[TMP106]], i32 22764; CHECK-NEXT:    [[TMP111:%.*]] = insertelement <4 x i32> [[TMP110]], i32 [[TMP107]], i32 32765; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP39]], <4 x i32> [[TMP87]], <4 x i32> zeroinitializer2766; CHECK-NEXT:    [[PREDPHI4:%.*]] = select <4 x i1> [[TMP47]], <4 x i32> [[TMP95]], <4 x i32> zeroinitializer2767; CHECK-NEXT:    [[PREDPHI5:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[TMP103]], <4 x i32> zeroinitializer2768; CHECK-NEXT:    [[PREDPHI6:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[TMP111]], <4 x i32> zeroinitializer2769; CHECK-NEXT:    [[TMP112]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]2770; CHECK-NEXT:    [[TMP113]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI4]]2771; CHECK-NEXT:    [[TMP114]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI5]]2772; CHECK-NEXT:    [[TMP115]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI6]]2773; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 162774; CHECK-NEXT:    [[TMP116:%.*]] = icmp eq i64 [[INDEX_NEXT]], 482775; CHECK-NEXT:    br i1 [[TMP116]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]2776; CHECK:       middle.block:2777; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP113]], [[TMP112]]2778; CHECK-NEXT:    [[BIN_RDX7:%.*]] = add <4 x i32> [[TMP114]], [[BIN_RDX]]2779; CHECK-NEXT:    [[BIN_RDX8:%.*]] = add <4 x i32> [[TMP115]], [[BIN_RDX7]]2780; CHECK-NEXT:    [[TMP117:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX8]])2781; CHECK-NEXT:    br label [[SCALAR_PH:%.*]]2782; CHECK:       scalar.ph:2783; CHECK-NEXT:    br label [[LOOP:%.*]]2784; CHECK:       loop:2785; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 96, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]2786; CHECK-NEXT:    [[ACCUM:%.*]] = phi i32 [ [[TMP117]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.*]], [[LATCH]] ]2787; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 22788; CHECK-NEXT:    [[TEST_ADDR:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[IV]]2789; CHECK-NEXT:    [[EARLYCND:%.*]] = load i1, ptr [[TEST_ADDR]], align 12790; CHECK-NEXT:    br i1 [[EARLYCND]], label [[PRED:%.*]], label [[LATCH]]2791; CHECK:       pred:2792; CHECK-NEXT:    [[ADDR:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[IV]]2793; CHECK-NEXT:    [[VAL:%.*]] = load i32, ptr [[ADDR]], align 42794; CHECK-NEXT:    br label [[LATCH]]2795; CHECK:       latch:2796; CHECK-NEXT:    [[VAL_PHI:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ]2797; CHECK-NEXT:    [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[VAL_PHI]]2798; CHECK-NEXT:    [[EXIT:%.*]] = icmp ugt i64 [[IV]], 1002799; CHECK-NEXT:    br i1 [[EXIT]], label [[LOOP_EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP25:![0-9]+]]2800; CHECK:       loop_exit:2801; CHECK-NEXT:    [[ACCUM_NEXT_LCSSA:%.*]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ]2802; CHECK-NEXT:    ret i32 [[ACCUM_NEXT_LCSSA]]2803;2804entry:2805  %alloca = alloca [103 x i32]2806  call void @init(ptr %alloca)2807  br label %loop2808loop:2809  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]2810  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]2811  %iv.next = add i64 %iv, 22812  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv2813  %earlycnd = load i1, ptr %test_addr2814  br i1 %earlycnd, label %pred, label %latch2815pred:2816  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv2817  %val = load i32, ptr %addr2818  br label %latch2819latch:2820  %val.phi = phi i32 [0, %loop], [%val, %pred]2821  %accum.next = add i32 %accum, %val.phi2822  %exit = icmp ugt i64 %iv, 1002823  br i1 %exit, label %loop_exit, label %loop2824 2825loop_exit:2826  ret i32 %accum.next2827}2828 2829; Start value of AddRec is not a value (%alloca + 4)2830define i32 @test_non_unit_stride_with_first_iteration_step_access(i64 %len, ptr %test_base) {2831; CHECK-LABEL: @test_non_unit_stride_with_first_iteration_step_access(2832; CHECK-NEXT:  entry:2833; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [4096 x i32], align 42834; CHECK-NEXT:    call void @init(ptr [[ALLOCA]])2835; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]2836; CHECK:       vector.ph:2837; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]2838; CHECK:       vector.body:2839; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]2840; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP128:%.*]], [[VECTOR_BODY]] ]2841; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP129:%.*]], [[VECTOR_BODY]] ]2842; CHECK-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP130:%.*]], [[VECTOR_BODY]] ]2843; CHECK-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP131:%.*]], [[VECTOR_BODY]] ]2844; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 22845; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 02846; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 22847; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[OFFSET_IDX]], 42848; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 62849; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 82850; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 102851; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 122852; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 142853; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 162854; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[OFFSET_IDX]], 182855; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[OFFSET_IDX]], 202856; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 222857; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 242858; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[OFFSET_IDX]], 262859; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[OFFSET_IDX]], 282860; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 302861; CHECK-NEXT:    [[TMP16:%.*]] = add i64 [[TMP0]], 22862; CHECK-NEXT:    [[TMP17:%.*]] = add i64 [[TMP1]], 22863; CHECK-NEXT:    [[TMP18:%.*]] = add i64 [[TMP2]], 22864; CHECK-NEXT:    [[TMP19:%.*]] = add i64 [[TMP3]], 22865; CHECK-NEXT:    [[TMP20:%.*]] = add i64 [[TMP4]], 22866; CHECK-NEXT:    [[TMP21:%.*]] = add i64 [[TMP5]], 22867; CHECK-NEXT:    [[TMP22:%.*]] = add i64 [[TMP6]], 22868; CHECK-NEXT:    [[TMP23:%.*]] = add i64 [[TMP7]], 22869; CHECK-NEXT:    [[TMP24:%.*]] = add i64 [[TMP8]], 22870; CHECK-NEXT:    [[TMP25:%.*]] = add i64 [[TMP9]], 22871; CHECK-NEXT:    [[TMP26:%.*]] = add i64 [[TMP10]], 22872; CHECK-NEXT:    [[TMP27:%.*]] = add i64 [[TMP11]], 22873; CHECK-NEXT:    [[TMP28:%.*]] = add i64 [[TMP12]], 22874; CHECK-NEXT:    [[TMP29:%.*]] = add i64 [[TMP13]], 22875; CHECK-NEXT:    [[TMP30:%.*]] = add i64 [[TMP14]], 22876; CHECK-NEXT:    [[TMP31:%.*]] = add i64 [[TMP15]], 22877; CHECK-NEXT:    [[TMP32:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i64 [[TMP0]]2878; CHECK-NEXT:    [[TMP33:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP1]]2879; CHECK-NEXT:    [[TMP34:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP2]]2880; CHECK-NEXT:    [[TMP35:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP3]]2881; CHECK-NEXT:    [[TMP36:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP4]]2882; CHECK-NEXT:    [[TMP37:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP5]]2883; CHECK-NEXT:    [[TMP38:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP6]]2884; CHECK-NEXT:    [[TMP39:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP7]]2885; CHECK-NEXT:    [[TMP40:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP8]]2886; CHECK-NEXT:    [[TMP41:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP9]]2887; CHECK-NEXT:    [[TMP42:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP10]]2888; CHECK-NEXT:    [[TMP43:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP11]]2889; CHECK-NEXT:    [[TMP44:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP12]]2890; CHECK-NEXT:    [[TMP45:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP13]]2891; CHECK-NEXT:    [[TMP46:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP14]]2892; CHECK-NEXT:    [[TMP47:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[TMP15]]2893; CHECK-NEXT:    [[TMP48:%.*]] = load i1, ptr [[TMP32]], align 12894; CHECK-NEXT:    [[TMP49:%.*]] = load i1, ptr [[TMP33]], align 12895; CHECK-NEXT:    [[TMP50:%.*]] = load i1, ptr [[TMP34]], align 12896; CHECK-NEXT:    [[TMP51:%.*]] = load i1, ptr [[TMP35]], align 12897; CHECK-NEXT:    [[TMP52:%.*]] = insertelement <4 x i1> poison, i1 [[TMP48]], i32 02898; CHECK-NEXT:    [[TMP53:%.*]] = insertelement <4 x i1> [[TMP52]], i1 [[TMP49]], i32 12899; CHECK-NEXT:    [[TMP54:%.*]] = insertelement <4 x i1> [[TMP53]], i1 [[TMP50]], i32 22900; CHECK-NEXT:    [[TMP55:%.*]] = insertelement <4 x i1> [[TMP54]], i1 [[TMP51]], i32 32901; CHECK-NEXT:    [[TMP56:%.*]] = load i1, ptr [[TMP36]], align 12902; CHECK-NEXT:    [[TMP57:%.*]] = load i1, ptr [[TMP37]], align 12903; CHECK-NEXT:    [[TMP58:%.*]] = load i1, ptr [[TMP38]], align 12904; CHECK-NEXT:    [[TMP59:%.*]] = load i1, ptr [[TMP39]], align 12905; CHECK-NEXT:    [[TMP60:%.*]] = insertelement <4 x i1> poison, i1 [[TMP56]], i32 02906; CHECK-NEXT:    [[TMP61:%.*]] = insertelement <4 x i1> [[TMP60]], i1 [[TMP57]], i32 12907; CHECK-NEXT:    [[TMP62:%.*]] = insertelement <4 x i1> [[TMP61]], i1 [[TMP58]], i32 22908; CHECK-NEXT:    [[TMP63:%.*]] = insertelement <4 x i1> [[TMP62]], i1 [[TMP59]], i32 32909; CHECK-NEXT:    [[TMP64:%.*]] = load i1, ptr [[TMP40]], align 12910; CHECK-NEXT:    [[TMP65:%.*]] = load i1, ptr [[TMP41]], align 12911; CHECK-NEXT:    [[TMP66:%.*]] = load i1, ptr [[TMP42]], align 12912; CHECK-NEXT:    [[TMP67:%.*]] = load i1, ptr [[TMP43]], align 12913; CHECK-NEXT:    [[TMP68:%.*]] = insertelement <4 x i1> poison, i1 [[TMP64]], i32 02914; CHECK-NEXT:    [[TMP69:%.*]] = insertelement <4 x i1> [[TMP68]], i1 [[TMP65]], i32 12915; CHECK-NEXT:    [[TMP70:%.*]] = insertelement <4 x i1> [[TMP69]], i1 [[TMP66]], i32 22916; CHECK-NEXT:    [[TMP71:%.*]] = insertelement <4 x i1> [[TMP70]], i1 [[TMP67]], i32 32917; CHECK-NEXT:    [[TMP72:%.*]] = load i1, ptr [[TMP44]], align 12918; CHECK-NEXT:    [[TMP73:%.*]] = load i1, ptr [[TMP45]], align 12919; CHECK-NEXT:    [[TMP74:%.*]] = load i1, ptr [[TMP46]], align 12920; CHECK-NEXT:    [[TMP75:%.*]] = load i1, ptr [[TMP47]], align 12921; CHECK-NEXT:    [[TMP76:%.*]] = insertelement <4 x i1> poison, i1 [[TMP72]], i32 02922; CHECK-NEXT:    [[TMP77:%.*]] = insertelement <4 x i1> [[TMP76]], i1 [[TMP73]], i32 12923; CHECK-NEXT:    [[TMP78:%.*]] = insertelement <4 x i1> [[TMP77]], i1 [[TMP74]], i32 22924; CHECK-NEXT:    [[TMP79:%.*]] = insertelement <4 x i1> [[TMP78]], i1 [[TMP75]], i32 32925; CHECK-NEXT:    [[TMP80:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP16]]2926; CHECK-NEXT:    [[TMP81:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP17]]2927; CHECK-NEXT:    [[TMP82:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP18]]2928; CHECK-NEXT:    [[TMP83:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP19]]2929; CHECK-NEXT:    [[TMP84:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP20]]2930; CHECK-NEXT:    [[TMP85:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP21]]2931; CHECK-NEXT:    [[TMP86:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP22]]2932; CHECK-NEXT:    [[TMP87:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP23]]2933; CHECK-NEXT:    [[TMP88:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP24]]2934; CHECK-NEXT:    [[TMP89:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP25]]2935; CHECK-NEXT:    [[TMP90:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP26]]2936; CHECK-NEXT:    [[TMP91:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP27]]2937; CHECK-NEXT:    [[TMP92:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP28]]2938; CHECK-NEXT:    [[TMP93:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP29]]2939; CHECK-NEXT:    [[TMP94:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP30]]2940; CHECK-NEXT:    [[TMP95:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[TMP31]]2941; CHECK-NEXT:    [[TMP96:%.*]] = load i32, ptr [[TMP80]], align 42942; CHECK-NEXT:    [[TMP97:%.*]] = load i32, ptr [[TMP81]], align 42943; CHECK-NEXT:    [[TMP98:%.*]] = load i32, ptr [[TMP82]], align 42944; CHECK-NEXT:    [[TMP99:%.*]] = load i32, ptr [[TMP83]], align 42945; CHECK-NEXT:    [[TMP100:%.*]] = insertelement <4 x i32> poison, i32 [[TMP96]], i32 02946; CHECK-NEXT:    [[TMP101:%.*]] = insertelement <4 x i32> [[TMP100]], i32 [[TMP97]], i32 12947; CHECK-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> [[TMP101]], i32 [[TMP98]], i32 22948; CHECK-NEXT:    [[TMP103:%.*]] = insertelement <4 x i32> [[TMP102]], i32 [[TMP99]], i32 32949; CHECK-NEXT:    [[TMP104:%.*]] = load i32, ptr [[TMP84]], align 42950; CHECK-NEXT:    [[TMP105:%.*]] = load i32, ptr [[TMP85]], align 42951; CHECK-NEXT:    [[TMP106:%.*]] = load i32, ptr [[TMP86]], align 42952; CHECK-NEXT:    [[TMP107:%.*]] = load i32, ptr [[TMP87]], align 42953; CHECK-NEXT:    [[TMP108:%.*]] = insertelement <4 x i32> poison, i32 [[TMP104]], i32 02954; CHECK-NEXT:    [[TMP109:%.*]] = insertelement <4 x i32> [[TMP108]], i32 [[TMP105]], i32 12955; CHECK-NEXT:    [[TMP110:%.*]] = insertelement <4 x i32> [[TMP109]], i32 [[TMP106]], i32 22956; CHECK-NEXT:    [[TMP111:%.*]] = insertelement <4 x i32> [[TMP110]], i32 [[TMP107]], i32 32957; CHECK-NEXT:    [[TMP112:%.*]] = load i32, ptr [[TMP88]], align 42958; CHECK-NEXT:    [[TMP113:%.*]] = load i32, ptr [[TMP89]], align 42959; CHECK-NEXT:    [[TMP114:%.*]] = load i32, ptr [[TMP90]], align 42960; CHECK-NEXT:    [[TMP115:%.*]] = load i32, ptr [[TMP91]], align 42961; CHECK-NEXT:    [[TMP116:%.*]] = insertelement <4 x i32> poison, i32 [[TMP112]], i32 02962; CHECK-NEXT:    [[TMP117:%.*]] = insertelement <4 x i32> [[TMP116]], i32 [[TMP113]], i32 12963; CHECK-NEXT:    [[TMP118:%.*]] = insertelement <4 x i32> [[TMP117]], i32 [[TMP114]], i32 22964; CHECK-NEXT:    [[TMP119:%.*]] = insertelement <4 x i32> [[TMP118]], i32 [[TMP115]], i32 32965; CHECK-NEXT:    [[TMP120:%.*]] = load i32, ptr [[TMP92]], align 42966; CHECK-NEXT:    [[TMP121:%.*]] = load i32, ptr [[TMP93]], align 42967; CHECK-NEXT:    [[TMP122:%.*]] = load i32, ptr [[TMP94]], align 42968; CHECK-NEXT:    [[TMP123:%.*]] = load i32, ptr [[TMP95]], align 42969; CHECK-NEXT:    [[TMP124:%.*]] = insertelement <4 x i32> poison, i32 [[TMP120]], i32 02970; CHECK-NEXT:    [[TMP125:%.*]] = insertelement <4 x i32> [[TMP124]], i32 [[TMP121]], i32 12971; CHECK-NEXT:    [[TMP126:%.*]] = insertelement <4 x i32> [[TMP125]], i32 [[TMP122]], i32 22972; CHECK-NEXT:    [[TMP127:%.*]] = insertelement <4 x i32> [[TMP126]], i32 [[TMP123]], i32 32973; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP55]], <4 x i32> [[TMP103]], <4 x i32> zeroinitializer2974; CHECK-NEXT:    [[PREDPHI4:%.*]] = select <4 x i1> [[TMP63]], <4 x i32> [[TMP111]], <4 x i32> zeroinitializer2975; CHECK-NEXT:    [[PREDPHI5:%.*]] = select <4 x i1> [[TMP71]], <4 x i32> [[TMP119]], <4 x i32> zeroinitializer2976; CHECK-NEXT:    [[PREDPHI6:%.*]] = select <4 x i1> [[TMP79]], <4 x i32> [[TMP127]], <4 x i32> zeroinitializer2977; CHECK-NEXT:    [[TMP128]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]2978; CHECK-NEXT:    [[TMP129]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI4]]2979; CHECK-NEXT:    [[TMP130]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI5]]2980; CHECK-NEXT:    [[TMP131]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI6]]2981; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 162982; CHECK-NEXT:    [[TMP132:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1442983; CHECK-NEXT:    br i1 [[TMP132]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]]2984; CHECK:       middle.block:2985; CHECK-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP129]], [[TMP128]]2986; CHECK-NEXT:    [[BIN_RDX7:%.*]] = add <4 x i32> [[TMP130]], [[BIN_RDX]]2987; CHECK-NEXT:    [[BIN_RDX8:%.*]] = add <4 x i32> [[TMP131]], [[BIN_RDX7]]2988; CHECK-NEXT:    [[TMP133:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX8]])2989; CHECK-NEXT:    br label [[SCALAR_PH:%.*]]2990; CHECK:       scalar.ph:2991; CHECK-NEXT:    br label [[LOOP:%.*]]2992; CHECK:       loop:2993; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 288, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]2994; CHECK-NEXT:    [[ACCUM:%.*]] = phi i32 [ [[TMP133]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.*]], [[LATCH]] ]2995; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 22996; CHECK-NEXT:    [[TEST_ADDR:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i64 [[IV]]2997; CHECK-NEXT:    [[EARLYCND:%.*]] = load i1, ptr [[TEST_ADDR]], align 12998; CHECK-NEXT:    br i1 [[EARLYCND]], label [[PRED:%.*]], label [[LATCH]]2999; CHECK:       pred:3000; CHECK-NEXT:    [[ADDR:%.*]] = getelementptr inbounds i32, ptr [[ALLOCA]], i64 [[IV_NEXT]]3001; CHECK-NEXT:    [[VAL:%.*]] = load i32, ptr [[ADDR]], align 43002; CHECK-NEXT:    br label [[LATCH]]3003; CHECK:       latch:3004; CHECK-NEXT:    [[VAL_PHI:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ]3005; CHECK-NEXT:    [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[VAL_PHI]]3006; CHECK-NEXT:    [[EXIT:%.*]] = icmp ugt i64 [[IV]], 3003007; CHECK-NEXT:    br i1 [[EXIT]], label [[LOOP_EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP27:![0-9]+]]3008; CHECK:       loop_exit:3009; CHECK-NEXT:    [[ACCUM_NEXT_LCSSA:%.*]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ]3010; CHECK-NEXT:    ret i32 [[ACCUM_NEXT_LCSSA]]3011;3012entry:3013  %alloca = alloca [4096 x i32]3014  call void @init(ptr %alloca)3015  br label %loop3016loop:3017  %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]3018  %accum = phi i32 [ 0, %entry ], [ %accum.next, %latch ]3019  %iv.next = add i64 %iv, 23020  %test_addr = getelementptr inbounds i1, ptr %test_base, i64 %iv3021  %earlycnd = load i1, ptr %test_addr3022  br i1 %earlycnd, label %pred, label %latch3023pred:3024  %addr = getelementptr inbounds i32, ptr %alloca, i64 %iv.next3025  %val = load i32, ptr %addr3026  br label %latch3027latch:3028  %val.phi = phi i32 [0, %loop], [%val, %pred]3029  %accum.next = add i32 %accum, %val.phi3030  %exit = icmp ugt i64 %iv,3003031  br i1 %exit, label %loop_exit, label %loop3032 3033loop_exit:3034  ret i32 %accum.next3035}3036