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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph:" --version 62; RUN: opt -p loop-vectorize -mtriple=x86_64-linux-gnu -S %s | FileCheck --check-prefix=I64 %s3; RUN: opt -p loop-vectorize -mtriple=i386-pc-linux-gnu -S %s | FileCheck --check-prefix=I32 %s4 5 6define void @test_store_initially_interleave(i32 %n, ptr noalias %src) #0 {7; I64-LABEL: define void @test_store_initially_interleave(8; I64-SAME: i32 [[N:%.*]], ptr noalias [[SRC:%.*]]) #[[ATTR0:[0-9]+]] {9; I64-NEXT: [[ITER_CHECK:.*:]]10; I64-NEXT: [[TMP4:%.*]] = add i32 [[N]], 111; I64-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP4]], 412; I64-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]13; I64: [[VECTOR_SCEVCHECK]]:14; I64-NEXT: [[TMP1:%.*]] = icmp slt i32 [[N]], 015; I64-NEXT: br i1 [[TMP1]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]16; I64: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:17; I64-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ule i32 [[TMP4]], 1618; I64-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]19; I64: [[VECTOR_PH]]:20; I64-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP4]], 1621; I64-NEXT: [[TMP2:%.*]] = icmp eq i32 [[N_MOD_VF]], 022; I64-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 16, i32 [[N_MOD_VF]]23; I64-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP4]], [[TMP3]]24; I64-NEXT: br label %[[VECTOR_BODY:.*]]25; I64: [[VECTOR_BODY]]:26; I64-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]27; I64-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]28; I64-NEXT: [[STEP_ADD:%.*]] = add <4 x i32> [[VEC_IND]], splat (i32 4)29; I64-NEXT: [[STEP_ADD_2:%.*]] = add <4 x i32> [[STEP_ADD]], splat (i32 4)30; I64-NEXT: [[STEP_ADD_3:%.*]] = add <4 x i32> [[STEP_ADD_2]], splat (i32 4)31; I64-NEXT: [[IV:%.*]] = add i32 [[INDEX]], 032; I64-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 133; I64-NEXT: [[TMP6:%.*]] = add i32 [[INDEX]], 234; I64-NEXT: [[TMP7:%.*]] = add i32 [[INDEX]], 335; I64-NEXT: [[TMP8:%.*]] = add i32 [[INDEX]], 436; I64-NEXT: [[TMP9:%.*]] = add i32 [[INDEX]], 537; I64-NEXT: [[TMP10:%.*]] = add i32 [[INDEX]], 638; I64-NEXT: [[TMP11:%.*]] = add i32 [[INDEX]], 739; I64-NEXT: [[TMP12:%.*]] = add i32 [[INDEX]], 840; I64-NEXT: [[TMP13:%.*]] = add i32 [[INDEX]], 941; I64-NEXT: [[TMP14:%.*]] = add i32 [[INDEX]], 1042; I64-NEXT: [[TMP15:%.*]] = add i32 [[INDEX]], 1143; I64-NEXT: [[TMP16:%.*]] = add i32 [[INDEX]], 1244; I64-NEXT: [[TMP17:%.*]] = add i32 [[INDEX]], 1345; I64-NEXT: [[TMP18:%.*]] = add i32 [[INDEX]], 1446; I64-NEXT: [[TMP19:%.*]] = add i32 [[INDEX]], 1547; I64-NEXT: [[TMP20:%.*]] = uitofp <4 x i32> [[VEC_IND]] to <4 x double>48; I64-NEXT: [[CONV:%.*]] = extractelement <4 x double> [[TMP20]], i32 049; I64-NEXT: [[TMP57:%.*]] = extractelement <4 x double> [[TMP20]], i32 150; I64-NEXT: [[TMP58:%.*]] = extractelement <4 x double> [[TMP20]], i32 251; I64-NEXT: [[TMP59:%.*]] = extractelement <4 x double> [[TMP20]], i32 352; I64-NEXT: [[TMP21:%.*]] = uitofp <4 x i32> [[STEP_ADD]] to <4 x double>53; I64-NEXT: [[TMP60:%.*]] = extractelement <4 x double> [[TMP21]], i32 054; I64-NEXT: [[TMP61:%.*]] = extractelement <4 x double> [[TMP21]], i32 155; I64-NEXT: [[TMP62:%.*]] = extractelement <4 x double> [[TMP21]], i32 256; I64-NEXT: [[TMP63:%.*]] = extractelement <4 x double> [[TMP21]], i32 357; I64-NEXT: [[TMP22:%.*]] = uitofp <4 x i32> [[STEP_ADD_2]] to <4 x double>58; I64-NEXT: [[TMP64:%.*]] = extractelement <4 x double> [[TMP22]], i32 059; I64-NEXT: [[TMP65:%.*]] = extractelement <4 x double> [[TMP22]], i32 160; I64-NEXT: [[TMP66:%.*]] = extractelement <4 x double> [[TMP22]], i32 261; I64-NEXT: [[TMP67:%.*]] = extractelement <4 x double> [[TMP22]], i32 362; I64-NEXT: [[TMP23:%.*]] = uitofp <4 x i32> [[STEP_ADD_3]] to <4 x double>63; I64-NEXT: [[TMP68:%.*]] = extractelement <4 x double> [[TMP23]], i32 064; I64-NEXT: [[TMP69:%.*]] = extractelement <4 x double> [[TMP23]], i32 165; I64-NEXT: [[TMP70:%.*]] = extractelement <4 x double> [[TMP23]], i32 266; I64-NEXT: [[TMP71:%.*]] = extractelement <4 x double> [[TMP23]], i32 367; I64-NEXT: [[ADD_PTR_I:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[IV]]68; I64-NEXT: [[TMP25:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP5]]69; I64-NEXT: [[TMP26:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP6]]70; I64-NEXT: [[TMP27:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP7]]71; I64-NEXT: [[TMP28:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP8]]72; I64-NEXT: [[TMP29:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP9]]73; I64-NEXT: [[TMP30:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP10]]74; I64-NEXT: [[TMP31:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP11]]75; I64-NEXT: [[TMP32:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP12]]76; I64-NEXT: [[TMP33:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP13]]77; I64-NEXT: [[TMP34:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP14]]78; I64-NEXT: [[TMP35:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP15]]79; I64-NEXT: [[TMP36:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP16]]80; I64-NEXT: [[TMP37:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP17]]81; I64-NEXT: [[TMP38:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP18]]82; I64-NEXT: [[TMP39:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP19]]83; I64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ADD_PTR_I]], align 484; I64-NEXT: [[TMP41:%.*]] = load ptr, ptr [[TMP25]], align 485; I64-NEXT: [[TMP42:%.*]] = load ptr, ptr [[TMP26]], align 486; I64-NEXT: [[TMP43:%.*]] = load ptr, ptr [[TMP27]], align 487; I64-NEXT: [[TMP44:%.*]] = load ptr, ptr [[TMP28]], align 488; I64-NEXT: [[TMP45:%.*]] = load ptr, ptr [[TMP29]], align 489; I64-NEXT: [[TMP46:%.*]] = load ptr, ptr [[TMP30]], align 490; I64-NEXT: [[TMP47:%.*]] = load ptr, ptr [[TMP31]], align 491; I64-NEXT: [[TMP48:%.*]] = load ptr, ptr [[TMP32]], align 492; I64-NEXT: [[TMP49:%.*]] = load ptr, ptr [[TMP33]], align 493; I64-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP34]], align 494; I64-NEXT: [[TMP51:%.*]] = load ptr, ptr [[TMP35]], align 495; I64-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP36]], align 496; I64-NEXT: [[TMP53:%.*]] = load ptr, ptr [[TMP37]], align 497; I64-NEXT: [[TMP54:%.*]] = load ptr, ptr [[TMP38]], align 498; I64-NEXT: [[TMP55:%.*]] = load ptr, ptr [[TMP39]], align 499; I64-NEXT: store double [[CONV]], ptr [[TMP0]], align 4100; I64-NEXT: store double [[TMP57]], ptr [[TMP41]], align 4101; I64-NEXT: store double [[TMP58]], ptr [[TMP42]], align 4102; I64-NEXT: store double [[TMP59]], ptr [[TMP43]], align 4103; I64-NEXT: store double [[TMP60]], ptr [[TMP44]], align 4104; I64-NEXT: store double [[TMP61]], ptr [[TMP45]], align 4105; I64-NEXT: store double [[TMP62]], ptr [[TMP46]], align 4106; I64-NEXT: store double [[TMP63]], ptr [[TMP47]], align 4107; I64-NEXT: store double [[TMP64]], ptr [[TMP48]], align 4108; I64-NEXT: store double [[TMP65]], ptr [[TMP49]], align 4109; I64-NEXT: store double [[TMP66]], ptr [[TMP50]], align 4110; I64-NEXT: store double [[TMP67]], ptr [[TMP51]], align 4111; I64-NEXT: store double [[TMP68]], ptr [[TMP52]], align 4112; I64-NEXT: store double [[TMP69]], ptr [[TMP53]], align 4113; I64-NEXT: store double [[TMP70]], ptr [[TMP54]], align 4114; I64-NEXT: store double [[TMP71]], ptr [[TMP55]], align 4115; I64-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 16116; I64-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[STEP_ADD_3]], splat (i32 4)117; I64-NEXT: [[TMP72:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]118; I64-NEXT: br i1 [[TMP72]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]119; I64: [[MIDDLE_BLOCK]]:120; I64-NEXT: br label %[[VEC_EPILOG_ITER_CHECK:.*]]121; I64: [[VEC_EPILOG_ITER_CHECK]]:122; I64-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP3]], 4123; I64-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF3:![0-9]+]]124; I64: [[VEC_EPILOG_PH]]:125; I64-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]126; I64-NEXT: [[N_MOD_VF2:%.*]] = urem i32 [[TMP4]], 4127; I64-NEXT: [[TMP73:%.*]] = icmp eq i32 [[N_MOD_VF2]], 0128; I64-NEXT: [[TMP74:%.*]] = select i1 [[TMP73]], i32 4, i32 [[N_MOD_VF2]]129; I64-NEXT: [[N_VEC3:%.*]] = sub i32 [[TMP4]], [[TMP74]]130; I64-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[BC_RESUME_VAL]], i64 0131; I64-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer132; I64-NEXT: [[INDUCTION:%.*]] = add <4 x i32> [[BROADCAST_SPLAT]], <i32 0, i32 1, i32 2, i32 3>133; I64-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]134; I64: [[VEC_EPILOG_VECTOR_BODY]]:135; I64-NEXT: [[INDEX4:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT6:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]136; I64-NEXT: [[VEC_IND5:%.*]] = phi <4 x i32> [ [[INDUCTION]], %[[VEC_EPILOG_PH]] ], [ [[VEC_IND_NEXT7:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]137; I64-NEXT: [[TMP75:%.*]] = add i32 [[INDEX4]], 0138; I64-NEXT: [[TMP76:%.*]] = add i32 [[INDEX4]], 1139; I64-NEXT: [[TMP77:%.*]] = add i32 [[INDEX4]], 2140; I64-NEXT: [[TMP78:%.*]] = add i32 [[INDEX4]], 3141; I64-NEXT: [[TMP79:%.*]] = uitofp <4 x i32> [[VEC_IND5]] to <4 x double>142; I64-NEXT: [[TMP88:%.*]] = extractelement <4 x double> [[TMP79]], i32 0143; I64-NEXT: [[TMP89:%.*]] = extractelement <4 x double> [[TMP79]], i32 1144; I64-NEXT: [[TMP90:%.*]] = extractelement <4 x double> [[TMP79]], i32 2145; I64-NEXT: [[TMP91:%.*]] = extractelement <4 x double> [[TMP79]], i32 3146; I64-NEXT: [[TMP84:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP75]]147; I64-NEXT: [[TMP85:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP76]]148; I64-NEXT: [[TMP86:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP77]]149; I64-NEXT: [[TMP93:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP78]]150; I64-NEXT: [[TMP94:%.*]] = load ptr, ptr [[TMP84]], align 4151; I64-NEXT: [[TMP95:%.*]] = load ptr, ptr [[TMP85]], align 4152; I64-NEXT: [[TMP96:%.*]] = load ptr, ptr [[TMP86]], align 4153; I64-NEXT: [[TMP87:%.*]] = load ptr, ptr [[TMP93]], align 4154; I64-NEXT: store double [[TMP88]], ptr [[TMP94]], align 4155; I64-NEXT: store double [[TMP89]], ptr [[TMP95]], align 4156; I64-NEXT: store double [[TMP90]], ptr [[TMP96]], align 4157; I64-NEXT: store double [[TMP91]], ptr [[TMP87]], align 4158; I64-NEXT: [[INDEX_NEXT6]] = add nuw i32 [[INDEX4]], 4159; I64-NEXT: [[VEC_IND_NEXT7]] = add <4 x i32> [[VEC_IND5]], splat (i32 4)160; I64-NEXT: [[TMP92:%.*]] = icmp eq i32 [[INDEX_NEXT6]], [[N_VEC3]]161; I64-NEXT: br i1 [[TMP92]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]162; I64: [[VEC_EPILOG_MIDDLE_BLOCK]]:163; I64-NEXT: br label %[[VEC_EPILOG_SCALAR_PH]]164; I64: [[VEC_EPILOG_SCALAR_PH]]:165;166; I32-LABEL: define void @test_store_initially_interleave(167; I32-SAME: i32 [[N:%.*]], ptr noalias [[SRC:%.*]]) #[[ATTR0:[0-9]+]] {168; I32-NEXT: [[ENTRY:.*:]]169; I32-NEXT: [[TMP0:%.*]] = add i32 [[N]], 1170; I32-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP0]], 4171; I32-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]172; I32: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:173; I32-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ule i32 [[TMP0]], 16174; I32-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]175; I32: [[VECTOR_PH]]:176; I32-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 16177; I32-NEXT: [[TMP1:%.*]] = icmp eq i32 [[N_MOD_VF]], 0178; I32-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 16, i32 [[N_MOD_VF]]179; I32-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[TMP2]]180; I32-NEXT: br label %[[VECTOR_BODY:.*]]181; I32: [[VECTOR_BODY]]:182; I32-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]183; I32-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]184; I32-NEXT: [[STEP_ADD:%.*]] = add <4 x i32> [[VEC_IND]], splat (i32 4)185; I32-NEXT: [[STEP_ADD_2:%.*]] = add <4 x i32> [[STEP_ADD]], splat (i32 4)186; I32-NEXT: [[STEP_ADD_3:%.*]] = add <4 x i32> [[STEP_ADD_2]], splat (i32 4)187; I32-NEXT: [[TMP3:%.*]] = add i32 [[INDEX]], 0188; I32-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 1189; I32-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 2190; I32-NEXT: [[TMP6:%.*]] = add i32 [[INDEX]], 3191; I32-NEXT: [[TMP7:%.*]] = add i32 [[INDEX]], 4192; I32-NEXT: [[TMP8:%.*]] = add i32 [[INDEX]], 5193; I32-NEXT: [[TMP9:%.*]] = add i32 [[INDEX]], 6194; I32-NEXT: [[TMP10:%.*]] = add i32 [[INDEX]], 7195; I32-NEXT: [[TMP11:%.*]] = add i32 [[INDEX]], 8196; I32-NEXT: [[TMP12:%.*]] = add i32 [[INDEX]], 9197; I32-NEXT: [[TMP13:%.*]] = add i32 [[INDEX]], 10198; I32-NEXT: [[TMP14:%.*]] = add i32 [[INDEX]], 11199; I32-NEXT: [[TMP40:%.*]] = add i32 [[INDEX]], 12200; I32-NEXT: [[TMP41:%.*]] = add i32 [[INDEX]], 13201; I32-NEXT: [[TMP42:%.*]] = add i32 [[INDEX]], 14202; I32-NEXT: [[TMP43:%.*]] = add i32 [[INDEX]], 15203; I32-NEXT: [[TMP44:%.*]] = uitofp <4 x i32> [[VEC_IND]] to <4 x double>204; I32-NEXT: [[TMP31:%.*]] = extractelement <4 x double> [[TMP44]], i32 0205; I32-NEXT: [[TMP32:%.*]] = extractelement <4 x double> [[TMP44]], i32 1206; I32-NEXT: [[TMP33:%.*]] = extractelement <4 x double> [[TMP44]], i32 2207; I32-NEXT: [[TMP34:%.*]] = extractelement <4 x double> [[TMP44]], i32 3208; I32-NEXT: [[TMP45:%.*]] = uitofp <4 x i32> [[STEP_ADD]] to <4 x double>209; I32-NEXT: [[TMP35:%.*]] = extractelement <4 x double> [[TMP45]], i32 0210; I32-NEXT: [[TMP36:%.*]] = extractelement <4 x double> [[TMP45]], i32 1211; I32-NEXT: [[TMP37:%.*]] = extractelement <4 x double> [[TMP45]], i32 2212; I32-NEXT: [[TMP38:%.*]] = extractelement <4 x double> [[TMP45]], i32 3213; I32-NEXT: [[TMP46:%.*]] = uitofp <4 x i32> [[STEP_ADD_2]] to <4 x double>214; I32-NEXT: [[TMP63:%.*]] = extractelement <4 x double> [[TMP46]], i32 0215; I32-NEXT: [[TMP64:%.*]] = extractelement <4 x double> [[TMP46]], i32 1216; I32-NEXT: [[TMP65:%.*]] = extractelement <4 x double> [[TMP46]], i32 2217; I32-NEXT: [[TMP66:%.*]] = extractelement <4 x double> [[TMP46]], i32 3218; I32-NEXT: [[TMP55:%.*]] = uitofp <4 x i32> [[STEP_ADD_3]] to <4 x double>219; I32-NEXT: [[TMP67:%.*]] = extractelement <4 x double> [[TMP55]], i32 0220; I32-NEXT: [[TMP68:%.*]] = extractelement <4 x double> [[TMP55]], i32 1221; I32-NEXT: [[TMP69:%.*]] = extractelement <4 x double> [[TMP55]], i32 2222; I32-NEXT: [[TMP70:%.*]] = extractelement <4 x double> [[TMP55]], i32 3223; I32-NEXT: [[TMP15:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP3]]224; I32-NEXT: [[TMP16:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP4]]225; I32-NEXT: [[TMP17:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP5]]226; I32-NEXT: [[TMP18:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP6]]227; I32-NEXT: [[TMP19:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP7]]228; I32-NEXT: [[TMP20:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP8]]229; I32-NEXT: [[TMP21:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP9]]230; I32-NEXT: [[TMP22:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP10]]231; I32-NEXT: [[TMP56:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP11]]232; I32-NEXT: [[TMP57:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP12]]233; I32-NEXT: [[TMP58:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP13]]234; I32-NEXT: [[TMP59:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP14]]235; I32-NEXT: [[TMP60:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP40]]236; I32-NEXT: [[TMP61:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP41]]237; I32-NEXT: [[TMP62:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP42]]238; I32-NEXT: [[TMP71:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP43]]239; I32-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP15]], align 4240; I32-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP16]], align 4241; I32-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP17]], align 4242; I32-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP18]], align 4243; I32-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP19]], align 4244; I32-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP20]], align 4245; I32-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP21]], align 4246; I32-NEXT: [[TMP30:%.*]] = load ptr, ptr [[TMP22]], align 4247; I32-NEXT: [[TMP47:%.*]] = load ptr, ptr [[TMP56]], align 4248; I32-NEXT: [[TMP48:%.*]] = load ptr, ptr [[TMP57]], align 4249; I32-NEXT: [[TMP49:%.*]] = load ptr, ptr [[TMP58]], align 4250; I32-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP59]], align 4251; I32-NEXT: [[TMP51:%.*]] = load ptr, ptr [[TMP60]], align 4252; I32-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP61]], align 4253; I32-NEXT: [[TMP53:%.*]] = load ptr, ptr [[TMP62]], align 4254; I32-NEXT: [[TMP54:%.*]] = load ptr, ptr [[TMP71]], align 4255; I32-NEXT: store double [[TMP31]], ptr [[TMP23]], align 4256; I32-NEXT: store double [[TMP32]], ptr [[TMP24]], align 4257; I32-NEXT: store double [[TMP33]], ptr [[TMP25]], align 4258; I32-NEXT: store double [[TMP34]], ptr [[TMP26]], align 4259; I32-NEXT: store double [[TMP35]], ptr [[TMP27]], align 4260; I32-NEXT: store double [[TMP36]], ptr [[TMP28]], align 4261; I32-NEXT: store double [[TMP37]], ptr [[TMP29]], align 4262; I32-NEXT: store double [[TMP38]], ptr [[TMP30]], align 4263; I32-NEXT: store double [[TMP63]], ptr [[TMP47]], align 4264; I32-NEXT: store double [[TMP64]], ptr [[TMP48]], align 4265; I32-NEXT: store double [[TMP65]], ptr [[TMP49]], align 4266; I32-NEXT: store double [[TMP66]], ptr [[TMP50]], align 4267; I32-NEXT: store double [[TMP67]], ptr [[TMP51]], align 4268; I32-NEXT: store double [[TMP68]], ptr [[TMP52]], align 4269; I32-NEXT: store double [[TMP69]], ptr [[TMP53]], align 4270; I32-NEXT: store double [[TMP70]], ptr [[TMP54]], align 4271; I32-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 16272; I32-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[STEP_ADD_3]], splat (i32 4)273; I32-NEXT: [[TMP39:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]274; I32-NEXT: br i1 [[TMP39]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]275; I32: [[MIDDLE_BLOCK]]:276; I32-NEXT: br label %[[VEC_EPILOG_ITER_CHECK:.*]]277; I32: [[VEC_EPILOG_ITER_CHECK]]:278; I32-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP2]], 4279; I32-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF3:![0-9]+]]280; I32: [[VEC_EPILOG_PH]]:281; I32-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]282; I32-NEXT: [[N_MOD_VF2:%.*]] = urem i32 [[TMP0]], 4283; I32-NEXT: [[TMP72:%.*]] = icmp eq i32 [[N_MOD_VF2]], 0284; I32-NEXT: [[TMP73:%.*]] = select i1 [[TMP72]], i32 4, i32 [[N_MOD_VF2]]285; I32-NEXT: [[N_VEC3:%.*]] = sub i32 [[TMP0]], [[TMP73]]286; I32-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[BC_RESUME_VAL]], i64 0287; I32-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer288; I32-NEXT: [[INDUCTION:%.*]] = add <4 x i32> [[BROADCAST_SPLAT]], <i32 0, i32 1, i32 2, i32 3>289; I32-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]290; I32: [[VEC_EPILOG_VECTOR_BODY]]:291; I32-NEXT: [[INDEX4:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT6:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]292; I32-NEXT: [[VEC_IND5:%.*]] = phi <4 x i32> [ [[INDUCTION]], %[[VEC_EPILOG_PH]] ], [ [[VEC_IND_NEXT7:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]293; I32-NEXT: [[TMP74:%.*]] = add i32 [[INDEX4]], 0294; I32-NEXT: [[TMP75:%.*]] = add i32 [[INDEX4]], 1295; I32-NEXT: [[TMP76:%.*]] = add i32 [[INDEX4]], 2296; I32-NEXT: [[TMP77:%.*]] = add i32 [[INDEX4]], 3297; I32-NEXT: [[TMP78:%.*]] = uitofp <4 x i32> [[VEC_IND5]] to <4 x double>298; I32-NEXT: [[TMP87:%.*]] = extractelement <4 x double> [[TMP78]], i32 0299; I32-NEXT: [[TMP88:%.*]] = extractelement <4 x double> [[TMP78]], i32 1300; I32-NEXT: [[TMP89:%.*]] = extractelement <4 x double> [[TMP78]], i32 2301; I32-NEXT: [[TMP90:%.*]] = extractelement <4 x double> [[TMP78]], i32 3302; I32-NEXT: [[TMP83:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP74]]303; I32-NEXT: [[TMP84:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP75]]304; I32-NEXT: [[TMP85:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP76]]305; I32-NEXT: [[TMP92:%.*]] = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 [[TMP77]]306; I32-NEXT: [[TMP93:%.*]] = load ptr, ptr [[TMP83]], align 4307; I32-NEXT: [[TMP94:%.*]] = load ptr, ptr [[TMP84]], align 4308; I32-NEXT: [[TMP95:%.*]] = load ptr, ptr [[TMP85]], align 4309; I32-NEXT: [[TMP86:%.*]] = load ptr, ptr [[TMP92]], align 4310; I32-NEXT: store double [[TMP87]], ptr [[TMP93]], align 4311; I32-NEXT: store double [[TMP88]], ptr [[TMP94]], align 4312; I32-NEXT: store double [[TMP89]], ptr [[TMP95]], align 4313; I32-NEXT: store double [[TMP90]], ptr [[TMP86]], align 4314; I32-NEXT: [[INDEX_NEXT6]] = add nuw i32 [[INDEX4]], 4315; I32-NEXT: [[VEC_IND_NEXT7]] = add <4 x i32> [[VEC_IND5]], splat (i32 4)316; I32-NEXT: [[TMP91:%.*]] = icmp eq i32 [[INDEX_NEXT6]], [[N_VEC3]]317; I32-NEXT: br i1 [[TMP91]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]318; I32: [[VEC_EPILOG_MIDDLE_BLOCK]]:319; I32-NEXT: br label %[[VEC_EPILOG_SCALAR_PH]]320; I32: [[VEC_EPILOG_SCALAR_PH]]:321;322entry:323 br label %loop324 325loop:326 %iv = phi i32 [ 0, %entry ], [ %inc, %loop ]327 %conv = uitofp i32 %iv to double328 %add.ptr.i = getelementptr nusw { ptr, ptr, ptr }, ptr null, i32 %iv329 %0 = load ptr, ptr %add.ptr.i, align 4330 store double %conv, ptr %0, align 4331 %inc = add i32 %iv, 1332 %ec = icmp eq i32 %iv, %n333 br i1 %ec, label %exit, label %loop334 335exit: ; preds = %loop336 ret void337}338 339define void @test_store_loaded_value(ptr noalias %src, ptr noalias %dst, i32 %n) #0 {340; I64-LABEL: define void @test_store_loaded_value(341; I64-SAME: ptr noalias [[SRC:%.*]], ptr noalias [[DST:%.*]], i32 [[N:%.*]]) #[[ATTR0]] {342; I64-NEXT: [[BB:.*:]]343; I64-NEXT: [[PRE:%.*]] = icmp slt i32 [[N]], 1344; I64-NEXT: br i1 [[PRE]], [[EXIT:label %.*]], label %[[PH:.*]]345; I64: [[PH]]:346; I64-NEXT: [[N_EXT:%.*]] = zext i32 [[N]] to i64347; I64-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N_EXT]], 4348; I64-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]349; I64: [[VECTOR_PH]]:350; I64-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_EXT]], 4351; I64-NEXT: [[N_VEC:%.*]] = sub i64 [[N_EXT]], [[N_MOD_VF]]352; I64-NEXT: br label %[[VECTOR_BODY:.*]]353; I64: [[VECTOR_BODY]]:354; I64-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]355; I64-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0356; I64-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1357; I64-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2358; I64-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3359; I64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP0]]360; I64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP1]]361; I64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP2]]362; I64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP3]]363; I64-NEXT: [[TMP8:%.*]] = load double, ptr [[TMP4]], align 8364; I64-NEXT: [[TMP9:%.*]] = load double, ptr [[TMP5]], align 8365; I64-NEXT: [[TMP10:%.*]] = load double, ptr [[TMP6]], align 8366; I64-NEXT: [[TMP11:%.*]] = load double, ptr [[TMP7]], align 8367; I64-NEXT: [[TMP12:%.*]] = shl i64 [[TMP0]], 1368; I64-NEXT: [[TMP13:%.*]] = shl i64 [[TMP1]], 1369; I64-NEXT: [[TMP14:%.*]] = shl i64 [[TMP2]], 1370; I64-NEXT: [[TMP15:%.*]] = shl i64 [[TMP3]], 1371; I64-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP12]]372; I64-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP13]]373; I64-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP14]]374; I64-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP15]]375; I64-NEXT: store double [[TMP8]], ptr [[TMP16]], align 8376; I64-NEXT: store double [[TMP9]], ptr [[TMP17]], align 8377; I64-NEXT: store double [[TMP10]], ptr [[TMP18]], align 8378; I64-NEXT: store double [[TMP11]], ptr [[TMP19]], align 8379; I64-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4380; I64-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]381; I64-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]382; I64: [[MIDDLE_BLOCK]]:383; I64-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_EXT]], [[N_VEC]]384; I64-NEXT: br i1 [[CMP_N]], [[EXIT_LOOPEXIT:label %.*]], label %[[SCALAR_PH]]385; I64: [[SCALAR_PH]]:386;387; I32-LABEL: define void @test_store_loaded_value(388; I32-SAME: ptr noalias [[SRC:%.*]], ptr noalias [[DST:%.*]], i32 [[N:%.*]]) #[[ATTR0]] {389; I32-NEXT: [[BB:.*:]]390; I32-NEXT: [[PRE:%.*]] = icmp slt i32 [[N]], 1391; I32-NEXT: br i1 [[PRE]], [[EXIT:label %.*]], label %[[PH:.*]]392; I32: [[PH]]:393; I32-NEXT: [[N_EXT:%.*]] = zext i32 [[N]] to i64394; I32-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N_EXT]], 4395; I32-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]396; I32: [[VECTOR_PH]]:397; I32-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_EXT]], 4398; I32-NEXT: [[N_VEC:%.*]] = sub i64 [[N_EXT]], [[N_MOD_VF]]399; I32-NEXT: br label %[[VECTOR_BODY:.*]]400; I32: [[VECTOR_BODY]]:401; I32-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]402; I32-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0403; I32-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1404; I32-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2405; I32-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3406; I32-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP0]]407; I32-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP1]]408; I32-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP2]]409; I32-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP3]]410; I32-NEXT: [[TMP8:%.*]] = load double, ptr [[TMP4]], align 8411; I32-NEXT: [[TMP9:%.*]] = load double, ptr [[TMP5]], align 8412; I32-NEXT: [[TMP10:%.*]] = load double, ptr [[TMP6]], align 8413; I32-NEXT: [[TMP11:%.*]] = load double, ptr [[TMP7]], align 8414; I32-NEXT: [[TMP12:%.*]] = shl i64 [[TMP0]], 1415; I32-NEXT: [[TMP13:%.*]] = shl i64 [[TMP1]], 1416; I32-NEXT: [[TMP14:%.*]] = shl i64 [[TMP2]], 1417; I32-NEXT: [[TMP15:%.*]] = shl i64 [[TMP3]], 1418; I32-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP12]]419; I32-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP13]]420; I32-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP14]]421; I32-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP15]]422; I32-NEXT: store double [[TMP8]], ptr [[TMP16]], align 8423; I32-NEXT: store double [[TMP9]], ptr [[TMP17]], align 8424; I32-NEXT: store double [[TMP10]], ptr [[TMP18]], align 8425; I32-NEXT: store double [[TMP11]], ptr [[TMP19]], align 8426; I32-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4427; I32-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]428; I32-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]429; I32: [[MIDDLE_BLOCK]]:430; I32-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_EXT]], [[N_VEC]]431; I32-NEXT: br i1 [[CMP_N]], [[EXIT_LOOPEXIT:label %.*]], label %[[SCALAR_PH]]432; I32: [[SCALAR_PH]]:433;434bb:435 %pre = icmp slt i32 %n, 1436 br i1 %pre, label %exit, label %ph437 438ph:439 %n.ext = zext i32 %n to i64440 br label %loop441 442loop:443 %iv = phi i64 [ 0, %ph ], [ %iv.next, %loop ]444 %iv.next = add i64 %iv, 1445 %gep.src = getelementptr i8, ptr %src, i64 %iv446 %l = load double, ptr %gep.src, align 8447 %sext = shl i64 %iv, 1448 %gep.dst = getelementptr i8, ptr %dst, i64 %sext449 store double %l, ptr %gep.dst, align 8450 %ec = icmp eq i64 %iv.next, %n.ext451 br i1 %ec, label %exit, label %loop, !llvm.loop !0452 453exit:454 ret void455}456 457declare i1 @cond()458 459define double @test_load_used_by_other_load_scev(ptr %ptr.a, ptr %ptr.b, ptr %ptr.c) {460; I64-LABEL: define double @test_load_used_by_other_load_scev(461; I64-SAME: ptr [[PTR_A:%.*]], ptr [[PTR_B:%.*]], ptr [[PTR_C:%.*]]) {462; I64-NEXT: [[ENTRY:.*]]:463; I64-NEXT: br label %[[OUTER_LOOP:.*]]464; I64: [[OUTER_LOOP_LOOPEXIT:.*]]:465; I64-NEXT: [[RESULT_LCSSA:%.*]] = phi double [ [[RESULT:%.*]], %[[INNER_LOOP:.*]] ]466; I64-NEXT: br label %[[OUTER_LOOP]]467; I64: [[OUTER_LOOP]]:468; I64-NEXT: [[ACCUM:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[RESULT_LCSSA]], %[[OUTER_LOOP_LOOPEXIT]] ]469; I64-NEXT: [[COND:%.*]] = call i1 @cond()470; I64-NEXT: br i1 [[COND]], label %[[INNER_LOOP_PREHEADER:.*]], label %[[EXIT:.*]]471; I64: [[INNER_LOOP_PREHEADER]]:472; I64-NEXT: br label %[[INNER_LOOP]]473; I64: [[INNER_LOOP]]:474; I64-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[INNER_LOOP]] ], [ 0, %[[INNER_LOOP_PREHEADER]] ]475; I64-NEXT: [[ACCUM_INNER:%.*]] = phi double [ [[MUL1:%.*]], %[[INNER_LOOP]] ], [ [[ACCUM]], %[[INNER_LOOP_PREHEADER]] ]476; I64-NEXT: [[TMP1:%.*]] = add i64 [[IV]], 1477; I64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[PTR_C]], i64 [[TMP1]]478; I64-NEXT: [[TMP5:%.*]] = getelementptr i64, ptr [[PTR_A]], i64 [[TMP1]]479; I64-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 8480; I64-NEXT: [[TMP9:%.*]] = getelementptr double, ptr [[PTR_B]], i64 [[TMP7]]481; I64-NEXT: [[TMP10:%.*]] = load double, ptr [[PTR_A]], align 8482; I64-NEXT: [[ADD1:%.*]] = fadd double [[TMP10]], 0.000000e+00483; I64-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP3]], i64 8484; I64-NEXT: [[TMP15:%.*]] = load double, ptr [[TMP13]], align 8485; I64-NEXT: [[MUL1]] = fmul double [[ADD1]], 0.000000e+00486; I64-NEXT: [[MUL2:%.*]] = fmul double [[TMP15]], 0.000000e+00487; I64-NEXT: [[ADD2:%.*]] = fadd double [[MUL2]], 0.000000e+00488; I64-NEXT: [[ADD3:%.*]] = fadd double [[ADD2]], 1.000000e+00489; I64-NEXT: [[TMP24:%.*]] = load double, ptr [[TMP9]], align 8490; I64-NEXT: [[DIV:%.*]] = fdiv double [[TMP24]], [[ADD3]]491; I64-NEXT: [[RESULT]] = fsub double [[ACCUM_INNER]], [[DIV]]492; I64-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1493; I64-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 100494; I64-NEXT: br i1 [[EXITCOND]], label %[[OUTER_LOOP_LOOPEXIT]], label %[[INNER_LOOP]]495; I64: [[EXIT]]:496; I64-NEXT: ret double [[ACCUM]]497;498; I32-LABEL: define double @test_load_used_by_other_load_scev(499; I32-SAME: ptr [[PTR_A:%.*]], ptr [[PTR_B:%.*]], ptr [[PTR_C:%.*]]) {500; I32-NEXT: [[ENTRY:.*]]:501; I32-NEXT: br label %[[OUTER_LOOP:.*]]502; I32: [[OUTER_LOOP]]:503; I32-NEXT: [[ACCUM:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[RESULT:%.*]], %[[INNER_LOOP:.*]] ]504; I32-NEXT: [[COND:%.*]] = call i1 @cond()505; I32-NEXT: br i1 [[COND]], label %[[INNER_LOOP]], label %[[EXIT:.*]]506; I32: [[INNER_LOOP]]:507; I32-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[OUTER_LOOP]] ], [ [[IV_NEXT:%.*]], %[[INNER_LOOP]] ]508; I32-NEXT: [[ACCUM_INNER:%.*]] = phi double [ [[ACCUM]], %[[OUTER_LOOP]] ], [ [[MUL1:%.*]], %[[INNER_LOOP]] ]509; I32-NEXT: [[IDX_PLUS1:%.*]] = add i64 [[IV]], 1510; I32-NEXT: [[GEP_C:%.*]] = getelementptr i8, ptr [[PTR_C]], i64 [[IDX_PLUS1]]511; I32-NEXT: [[GEP_A_I64:%.*]] = getelementptr i64, ptr [[PTR_A]], i64 [[IDX_PLUS1]]512; I32-NEXT: [[LOAD_IDX:%.*]] = load i64, ptr [[GEP_A_I64]], align 8513; I32-NEXT: [[GEP_B:%.*]] = getelementptr double, ptr [[PTR_B]], i64 [[LOAD_IDX]]514; I32-NEXT: [[LOAD_A:%.*]] = load double, ptr [[PTR_A]], align 8515; I32-NEXT: [[ADD1:%.*]] = fadd double [[LOAD_A]], 0.000000e+00516; I32-NEXT: [[GEP_C_OFFSET:%.*]] = getelementptr i8, ptr [[GEP_C]], i64 8517; I32-NEXT: [[LOAD_C:%.*]] = load double, ptr [[GEP_C_OFFSET]], align 8518; I32-NEXT: [[MUL1]] = fmul double [[ADD1]], 0.000000e+00519; I32-NEXT: [[MUL2:%.*]] = fmul double [[LOAD_C]], 0.000000e+00520; I32-NEXT: [[ADD2:%.*]] = fadd double [[MUL2]], 0.000000e+00521; I32-NEXT: [[ADD3:%.*]] = fadd double [[ADD2]], 1.000000e+00522; I32-NEXT: [[LOAD_B:%.*]] = load double, ptr [[GEP_B]], align 8523; I32-NEXT: [[DIV:%.*]] = fdiv double [[LOAD_B]], [[ADD3]]524; I32-NEXT: [[RESULT]] = fsub double [[ACCUM_INNER]], [[DIV]]525; I32-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1526; I32-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 100527; I32-NEXT: br i1 [[EXITCOND]], label %[[OUTER_LOOP]], label %[[INNER_LOOP]]528; I32: [[EXIT]]:529; I32-NEXT: ret double [[ACCUM]]530;531entry:532 br label %outer.loop533 534outer.loop:535 %accum = phi double [ 0.0, %entry ], [ %result, %inner.loop ]536 %cond = call i1 @cond()537 br i1 %cond, label %inner.loop, label %exit538 539inner.loop:540 %iv = phi i64 [ 0, %outer.loop ], [ %iv.next, %inner.loop ]541 %accum.inner = phi double [ %accum, %outer.loop ], [ %mul1, %inner.loop ]542 %idx.plus1 = add i64 %iv, 1543 %gep.c = getelementptr i8, ptr %ptr.c, i64 %idx.plus1544 %gep.a.i64 = getelementptr i64, ptr %ptr.a, i64 %idx.plus1545 %load.idx = load i64, ptr %gep.a.i64, align 8546 %gep.b = getelementptr double, ptr %ptr.b, i64 %load.idx547 %load.a = load double, ptr %ptr.a, align 8548 %add1 = fadd double %load.a, 0.000000e+00549 %gep.c.offset = getelementptr i8, ptr %gep.c, i64 8550 %load.c = load double, ptr %gep.c.offset, align 8551 %mul1 = fmul double %add1, 0.000000e+00552 %mul2 = fmul double %load.c, 0.000000e+00553 %add2 = fadd double %mul2, 0.000000e+00554 %add3 = fadd double %add2, 1.000000e+00555 %load.b = load double, ptr %gep.b, align 8556 %div = fdiv double %load.b, %add3557 %result = fsub double %accum.inner, %div558 %iv.next = add i64 %iv, 1559 %exitcond = icmp eq i64 %iv, 100560 br i1 %exitcond, label %outer.loop, label %inner.loop561 562exit:563 ret double %accum564}565 566define double @test_load_used_by_other_load_scev_low_trip_count(ptr %ptr.a, ptr %ptr.b, ptr %ptr.c) {567; I64-LABEL: define double @test_load_used_by_other_load_scev_low_trip_count(568; I64-SAME: ptr [[PTR_A:%.*]], ptr [[PTR_B:%.*]], ptr [[PTR_C:%.*]]) {569; I64-NEXT: [[ENTRY:.*]]:570; I64-NEXT: br label %[[OUTER_LOOP:.*]]571; I64: [[OUTER_LOOP_LOOPEXIT:.*]]:572; I64-NEXT: [[RESULT_LCSSA:%.*]] = phi double [ [[RESULT:%.*]], %[[INNER_LOOP:.*]] ]573; I64-NEXT: br label %[[OUTER_LOOP]]574; I64: [[OUTER_LOOP]]:575; I64-NEXT: [[ACCUM:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[RESULT_LCSSA]], %[[OUTER_LOOP_LOOPEXIT]] ]576; I64-NEXT: [[COND:%.*]] = call i1 @cond()577; I64-NEXT: br i1 [[COND]], label %[[INNER_LOOP_PREHEADER:.*]], label %[[EXIT:.*]]578; I64: [[INNER_LOOP_PREHEADER]]:579; I64-NEXT: br label %[[INNER_LOOP]]580; I64: [[INNER_LOOP]]:581; I64-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[INNER_LOOP]] ], [ 0, %[[INNER_LOOP_PREHEADER]] ]582; I64-NEXT: [[ACCUM_INNER:%.*]] = phi double [ [[MUL1:%.*]], %[[INNER_LOOP]] ], [ [[ACCUM]], %[[INNER_LOOP_PREHEADER]] ]583; I64-NEXT: [[TMP1:%.*]] = add i64 [[IV]], 1584; I64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[PTR_C]], i64 [[TMP1]]585; I64-NEXT: [[TMP5:%.*]] = getelementptr i64, ptr [[PTR_A]], i64 [[TMP1]]586; I64-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 8587; I64-NEXT: [[TMP9:%.*]] = getelementptr double, ptr [[PTR_B]], i64 [[TMP7]]588; I64-NEXT: [[TMP10:%.*]] = load double, ptr [[PTR_A]], align 8589; I64-NEXT: [[ADD1:%.*]] = fadd double [[TMP10]], 0.000000e+00590; I64-NEXT: [[GEP_C_OFFSET:%.*]] = getelementptr i8, ptr [[TMP3]], i64 8591; I64-NEXT: [[LOAD_C:%.*]] = load double, ptr [[GEP_C_OFFSET]], align 8592; I64-NEXT: [[MUL1]] = fmul double [[ADD1]], 0.000000e+00593; I64-NEXT: [[MUL2:%.*]] = fmul double [[LOAD_C]], 0.000000e+00594; I64-NEXT: [[ADD2:%.*]] = fadd double [[MUL2]], 0.000000e+00595; I64-NEXT: [[ADD3:%.*]] = fadd double [[ADD2]], 1.000000e+00596; I64-NEXT: [[TMP24:%.*]] = load double, ptr [[TMP9]], align 8597; I64-NEXT: [[DIV:%.*]] = fdiv double [[TMP24]], [[ADD3]]598; I64-NEXT: [[RESULT]] = fsub double [[ACCUM_INNER]], [[DIV]]599; I64-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1600; I64-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1601; I64-NEXT: br i1 [[EXITCOND]], label %[[OUTER_LOOP_LOOPEXIT]], label %[[INNER_LOOP]]602; I64: [[EXIT]]:603; I64-NEXT: ret double [[ACCUM]]604;605; I32-LABEL: define double @test_load_used_by_other_load_scev_low_trip_count(606; I32-SAME: ptr [[PTR_A:%.*]], ptr [[PTR_B:%.*]], ptr [[PTR_C:%.*]]) {607; I32-NEXT: [[ENTRY:.*]]:608; I32-NEXT: br label %[[OUTER_LOOP:.*]]609; I32: [[OUTER_LOOP]]:610; I32-NEXT: [[ACCUM:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[RESULT:%.*]], %[[INNER_LOOP:.*]] ]611; I32-NEXT: [[COND:%.*]] = call i1 @cond()612; I32-NEXT: br i1 [[COND]], label %[[INNER_LOOP]], label %[[EXIT:.*]]613; I32: [[INNER_LOOP]]:614; I32-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[OUTER_LOOP]] ], [ [[IV_NEXT:%.*]], %[[INNER_LOOP]] ]615; I32-NEXT: [[ACCUM_INNER:%.*]] = phi double [ [[ACCUM]], %[[OUTER_LOOP]] ], [ [[MUL1:%.*]], %[[INNER_LOOP]] ]616; I32-NEXT: [[IDX_PLUS1:%.*]] = add i64 [[IV]], 1617; I32-NEXT: [[GEP_C:%.*]] = getelementptr i8, ptr [[PTR_C]], i64 [[IDX_PLUS1]]618; I32-NEXT: [[GEP_A_I64:%.*]] = getelementptr i64, ptr [[PTR_A]], i64 [[IDX_PLUS1]]619; I32-NEXT: [[LOAD_IDX:%.*]] = load i64, ptr [[GEP_A_I64]], align 8620; I32-NEXT: [[GEP_B:%.*]] = getelementptr double, ptr [[PTR_B]], i64 [[LOAD_IDX]]621; I32-NEXT: [[LOAD_A:%.*]] = load double, ptr [[PTR_A]], align 8622; I32-NEXT: [[ADD1:%.*]] = fadd double [[LOAD_A]], 0.000000e+00623; I32-NEXT: [[GEP_C_OFFSET:%.*]] = getelementptr i8, ptr [[GEP_C]], i64 8624; I32-NEXT: [[LOAD_C:%.*]] = load double, ptr [[GEP_C_OFFSET]], align 8625; I32-NEXT: [[MUL1]] = fmul double [[ADD1]], 0.000000e+00626; I32-NEXT: [[MUL2:%.*]] = fmul double [[LOAD_C]], 0.000000e+00627; I32-NEXT: [[ADD2:%.*]] = fadd double [[MUL2]], 0.000000e+00628; I32-NEXT: [[ADD3:%.*]] = fadd double [[ADD2]], 1.000000e+00629; I32-NEXT: [[LOAD_B:%.*]] = load double, ptr [[GEP_B]], align 8630; I32-NEXT: [[DIV:%.*]] = fdiv double [[LOAD_B]], [[ADD3]]631; I32-NEXT: [[RESULT]] = fsub double [[ACCUM_INNER]], [[DIV]]632; I32-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1633; I32-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1634; I32-NEXT: br i1 [[EXITCOND]], label %[[OUTER_LOOP]], label %[[INNER_LOOP]]635; I32: [[EXIT]]:636; I32-NEXT: ret double [[ACCUM]]637;638entry:639 br label %outer.loop640 641outer.loop:642 %accum = phi double [ 0.0, %entry ], [ %result, %inner.loop ]643 %cond = call i1 @cond()644 br i1 %cond, label %inner.loop, label %exit645 646inner.loop:647 %iv = phi i64 [ 0, %outer.loop ], [ %iv.next, %inner.loop ]648 %accum.inner = phi double [ %accum, %outer.loop ], [ %mul1, %inner.loop ]649 %idx.plus1 = add i64 %iv, 1650 %gep.c = getelementptr i8, ptr %ptr.c, i64 %idx.plus1651 %gep.a.i64 = getelementptr i64, ptr %ptr.a, i64 %idx.plus1652 %load.idx = load i64, ptr %gep.a.i64, align 8653 %gep.b = getelementptr double, ptr %ptr.b, i64 %load.idx654 %load.a = load double, ptr %ptr.a, align 8655 %add1 = fadd double %load.a, 0.000000e+00656 %gep.c.offset = getelementptr i8, ptr %gep.c, i64 8657 %load.c = load double, ptr %gep.c.offset, align 8658 %mul1 = fmul double %add1, 0.000000e+00659 %mul2 = fmul double %load.c, 0.000000e+00660 %add2 = fadd double %mul2, 0.000000e+00661 %add3 = fadd double %add2, 1.000000e+00662 %load.b = load double, ptr %gep.b, align 8663 %div = fdiv double %load.b, %add3664 %result = fsub double %accum.inner, %div665 %iv.next = add i64 %iv, 1666 %exitcond = icmp eq i64 %iv, 1667 br i1 %exitcond, label %outer.loop, label %inner.loop668 669exit:670 ret double %accum671}672 673define void @loaded_address_used_by_load_through_blend(i64 %start, ptr noalias %src, ptr noalias %src.2, ptr noalias %dst) #0 {674; I64-LABEL: define void @loaded_address_used_by_load_through_blend(675; I64-SAME: i64 [[START:%.*]], ptr noalias [[SRC:%.*]], ptr noalias [[SRC_2:%.*]], ptr noalias [[DST:%.*]]) #[[ATTR0]] {676; I64-NEXT: [[ENTRY:.*]]:677; I64-NEXT: br label %[[LOOP_HEADER:.*]]678; I64: [[LOOP_HEADER]]:679; I64-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]680; I64-NEXT: [[IV_2:%.*]] = phi i64 [ [[START]], %[[ENTRY]] ], [ [[IV_2_NEXT:%.*]], %[[LOOP_LATCH]] ]681; I64-NEXT: [[IV_1:%.*]] = add i64 [[IV]], 1682; I64-NEXT: [[GEP_SRC:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[IV_1]]683; I64-NEXT: [[L_SRC:%.*]] = load float, ptr [[GEP_SRC]], align 4684; I64-NEXT: [[C:%.*]] = fcmp oeq float [[L_SRC]], 0.000000e+00685; I64-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LOOP_LATCH]]686; I64: [[THEN]]:687; I64-NEXT: [[IV_MUL:%.*]] = mul i64 [[IV_1]], [[START]]688; I64-NEXT: [[GEP_SRC_2:%.*]] = getelementptr i8, ptr [[SRC_2]], i64 [[IV_MUL]]689; I64-NEXT: br label %[[LOOP_LATCH]]690; I64: [[LOOP_LATCH]]:691; I64-NEXT: [[MERGE_GEP:%.*]] = phi ptr [ [[GEP_SRC_2]], %[[THEN]] ], [ [[SRC_2]], %[[LOOP_HEADER]] ]692; I64-NEXT: [[L_2:%.*]] = load float, ptr [[MERGE_GEP]], align 4693; I64-NEXT: [[GEP_DST:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]]694; I64-NEXT: store float [[L_2]], ptr [[GEP_DST]], align 4695; I64-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1696; I64-NEXT: [[IV_2_NEXT]] = add i64 [[IV_2]], -1697; I64-NEXT: [[EC:%.*]] = icmp sgt i64 [[IV_2]], 100698; I64-NEXT: br i1 [[EC]], label %[[LOOP_HEADER]], label %[[EXIT:.*]]699; I64: [[EXIT]]:700; I64-NEXT: ret void701;702; I32-LABEL: define void @loaded_address_used_by_load_through_blend(703; I32-SAME: i64 [[START:%.*]], ptr noalias [[SRC:%.*]], ptr noalias [[SRC_2:%.*]], ptr noalias [[DST:%.*]]) #[[ATTR0]] {704; I32-NEXT: [[ENTRY:.*:]]705; I32-NEXT: [[TMP0:%.*]] = add i64 [[START]], 1706; I32-NEXT: [[SMIN:%.*]] = call i64 @llvm.smin.i64(i64 [[START]], i64 100)707; I32-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[SMIN]]708; I32-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 8709; I32-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]710; I32: [[VECTOR_PH]]:711; I32-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], 8712; I32-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]]713; I32-NEXT: [[TMP2:%.*]] = sub i64 [[START]], [[N_VEC]]714; I32-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x ptr> poison, ptr [[SRC_2]], i64 0715; I32-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x ptr> [[BROADCAST_SPLATINSERT1]], <8 x ptr> poison, <8 x i32> zeroinitializer716; I32-NEXT: br label %[[VECTOR_BODY:.*]]717; I32: [[VECTOR_BODY]]:718; I32-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]719; I32-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0720; I32-NEXT: [[TMP4:%.*]] = add i64 [[INDEX]], 1721; I32-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 2722; I32-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 3723; I32-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 4724; I32-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], 5725; I32-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 6726; I32-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 7727; I32-NEXT: [[TMP11:%.*]] = add i64 [[TMP3]], 1728; I32-NEXT: [[TMP12:%.*]] = add i64 [[TMP4]], 1729; I32-NEXT: [[TMP13:%.*]] = add i64 [[TMP5]], 1730; I32-NEXT: [[TMP14:%.*]] = add i64 [[TMP6]], 1731; I32-NEXT: [[TMP15:%.*]] = add i64 [[TMP7]], 1732; I32-NEXT: [[TMP16:%.*]] = add i64 [[TMP8]], 1733; I32-NEXT: [[TMP17:%.*]] = add i64 [[TMP9]], 1734; I32-NEXT: [[TMP18:%.*]] = add i64 [[TMP10]], 1735; I32-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP11]]736; I32-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP12]]737; I32-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP13]]738; I32-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP14]]739; I32-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP15]]740; I32-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP16]]741; I32-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP17]]742; I32-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP18]]743; I32-NEXT: [[TMP35:%.*]] = load float, ptr [[TMP27]], align 4744; I32-NEXT: [[TMP36:%.*]] = load float, ptr [[TMP28]], align 4745; I32-NEXT: [[TMP37:%.*]] = load float, ptr [[TMP29]], align 4746; I32-NEXT: [[TMP38:%.*]] = load float, ptr [[TMP30]], align 4747; I32-NEXT: [[TMP39:%.*]] = load float, ptr [[TMP31]], align 4748; I32-NEXT: [[TMP40:%.*]] = load float, ptr [[TMP32]], align 4749; I32-NEXT: [[TMP41:%.*]] = load float, ptr [[TMP33]], align 4750; I32-NEXT: [[TMP42:%.*]] = load float, ptr [[TMP34]], align 4751; I32-NEXT: [[TMP43:%.*]] = insertelement <8 x float> poison, float [[TMP35]], i32 0752; I32-NEXT: [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[TMP36]], i32 1753; I32-NEXT: [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[TMP37]], i32 2754; I32-NEXT: [[TMP46:%.*]] = insertelement <8 x float> [[TMP45]], float [[TMP38]], i32 3755; I32-NEXT: [[TMP47:%.*]] = insertelement <8 x float> [[TMP46]], float [[TMP39]], i32 4756; I32-NEXT: [[TMP48:%.*]] = insertelement <8 x float> [[TMP47]], float [[TMP40]], i32 5757; I32-NEXT: [[TMP49:%.*]] = insertelement <8 x float> [[TMP48]], float [[TMP41]], i32 6758; I32-NEXT: [[TMP50:%.*]] = insertelement <8 x float> [[TMP49]], float [[TMP42]], i32 7759; I32-NEXT: [[TMP51:%.*]] = fcmp oeq <8 x float> [[TMP50]], zeroinitializer760; I32-NEXT: [[TMP53:%.*]] = mul i64 [[TMP11]], [[START]]761; I32-NEXT: [[TMP55:%.*]] = mul i64 [[TMP12]], [[START]]762; I32-NEXT: [[TMP57:%.*]] = mul i64 [[TMP13]], [[START]]763; I32-NEXT: [[TMP59:%.*]] = mul i64 [[TMP14]], [[START]]764; I32-NEXT: [[TMP61:%.*]] = mul i64 [[TMP15]], [[START]]765; I32-NEXT: [[TMP63:%.*]] = mul i64 [[TMP16]], [[START]]766; I32-NEXT: [[TMP65:%.*]] = mul i64 [[TMP17]], [[START]]767; I32-NEXT: [[TMP67:%.*]] = mul i64 [[TMP18]], [[START]]768; I32-NEXT: [[TMP54:%.*]] = getelementptr i8, ptr [[SRC_2]], i64 [[TMP53]]769; I32-NEXT: [[TMP56:%.*]] = getelementptr i8, ptr [[SRC_2]], i64 [[TMP55]]770; I32-NEXT: [[TMP58:%.*]] = getelementptr i8, ptr [[SRC_2]], i64 [[TMP57]]771; I32-NEXT: [[TMP60:%.*]] = getelementptr i8, ptr [[SRC_2]], i64 [[TMP59]]772; I32-NEXT: [[TMP62:%.*]] = getelementptr i8, ptr [[SRC_2]], i64 [[TMP61]]773; I32-NEXT: [[TMP64:%.*]] = getelementptr i8, ptr [[SRC_2]], i64 [[TMP63]]774; I32-NEXT: [[TMP66:%.*]] = getelementptr i8, ptr [[SRC_2]], i64 [[TMP65]]775; I32-NEXT: [[TMP68:%.*]] = getelementptr i8, ptr [[SRC_2]], i64 [[TMP67]]776; I32-NEXT: [[TMP69:%.*]] = insertelement <8 x ptr> poison, ptr [[TMP54]], i32 0777; I32-NEXT: [[TMP70:%.*]] = insertelement <8 x ptr> [[TMP69]], ptr [[TMP56]], i32 1778; I32-NEXT: [[TMP71:%.*]] = insertelement <8 x ptr> [[TMP70]], ptr [[TMP58]], i32 2779; I32-NEXT: [[TMP72:%.*]] = insertelement <8 x ptr> [[TMP71]], ptr [[TMP60]], i32 3780; I32-NEXT: [[TMP73:%.*]] = insertelement <8 x ptr> [[TMP72]], ptr [[TMP62]], i32 4781; I32-NEXT: [[TMP74:%.*]] = insertelement <8 x ptr> [[TMP73]], ptr [[TMP64]], i32 5782; I32-NEXT: [[TMP75:%.*]] = insertelement <8 x ptr> [[TMP74]], ptr [[TMP66]], i32 6783; I32-NEXT: [[TMP76:%.*]] = insertelement <8 x ptr> [[TMP75]], ptr [[TMP68]], i32 7784; I32-NEXT: [[PREDPHI:%.*]] = select <8 x i1> [[TMP51]], <8 x ptr> [[TMP76]], <8 x ptr> [[BROADCAST_SPLAT2]]785; I32-NEXT: [[TMP77:%.*]] = extractelement <8 x ptr> [[PREDPHI]], i32 0786; I32-NEXT: [[TMP79:%.*]] = extractelement <8 x ptr> [[PREDPHI]], i32 1787; I32-NEXT: [[TMP81:%.*]] = extractelement <8 x ptr> [[PREDPHI]], i32 2788; I32-NEXT: [[TMP83:%.*]] = extractelement <8 x ptr> [[PREDPHI]], i32 3789; I32-NEXT: [[TMP85:%.*]] = extractelement <8 x ptr> [[PREDPHI]], i32 4790; I32-NEXT: [[TMP87:%.*]] = extractelement <8 x ptr> [[PREDPHI]], i32 5791; I32-NEXT: [[TMP89:%.*]] = extractelement <8 x ptr> [[PREDPHI]], i32 6792; I32-NEXT: [[TMP91:%.*]] = extractelement <8 x ptr> [[PREDPHI]], i32 7793; I32-NEXT: [[TMP78:%.*]] = load float, ptr [[TMP77]], align 4794; I32-NEXT: [[TMP80:%.*]] = load float, ptr [[TMP79]], align 4795; I32-NEXT: [[TMP82:%.*]] = load float, ptr [[TMP81]], align 4796; I32-NEXT: [[TMP84:%.*]] = load float, ptr [[TMP83]], align 4797; I32-NEXT: [[TMP86:%.*]] = load float, ptr [[TMP85]], align 4798; I32-NEXT: [[TMP88:%.*]] = load float, ptr [[TMP87]], align 4799; I32-NEXT: [[TMP90:%.*]] = load float, ptr [[TMP89]], align 4800; I32-NEXT: [[TMP92:%.*]] = load float, ptr [[TMP91]], align 4801; I32-NEXT: [[TMP93:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP3]]802; I32-NEXT: [[TMP94:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP4]]803; I32-NEXT: [[TMP95:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP5]]804; I32-NEXT: [[TMP96:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP6]]805; I32-NEXT: [[TMP97:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP7]]806; I32-NEXT: [[TMP98:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP8]]807; I32-NEXT: [[TMP99:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP9]]808; I32-NEXT: [[TMP100:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP10]]809; I32-NEXT: store float [[TMP78]], ptr [[TMP93]], align 4810; I32-NEXT: store float [[TMP80]], ptr [[TMP94]], align 4811; I32-NEXT: store float [[TMP82]], ptr [[TMP95]], align 4812; I32-NEXT: store float [[TMP84]], ptr [[TMP96]], align 4813; I32-NEXT: store float [[TMP86]], ptr [[TMP97]], align 4814; I32-NEXT: store float [[TMP88]], ptr [[TMP98]], align 4815; I32-NEXT: store float [[TMP90]], ptr [[TMP99]], align 4816; I32-NEXT: store float [[TMP92]], ptr [[TMP100]], align 4817; I32-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8818; I32-NEXT: [[TMP101:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]819; I32-NEXT: br i1 [[TMP101]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]820; I32: [[MIDDLE_BLOCK]]:821; I32-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]]822; I32-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]823; I32: [[SCALAR_PH]]:824;825entry:826 br label %loop.header827 828loop.header:829 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]830 %iv.2 = phi i64 [ %start, %entry ], [ %iv.2.next, %loop.latch ]831 %iv.1 = add i64 %iv, 1832 %gep.src = getelementptr i8, ptr %src, i64 %iv.1833 %l.src = load float, ptr %gep.src, align 4834 %c = fcmp oeq float %l.src, 0.000000e+00835 br i1 %c, label %then, label %loop.latch836 837then:838 %iv.mul = mul i64 %iv.1, %start839 %gep.src.2 = getelementptr i8, ptr %src.2, i64 %iv.mul840 br label %loop.latch841 842loop.latch:843 %merge.gep = phi ptr [ %gep.src.2, %then ], [ %src.2, %loop.header ]844 %l.2 = load float, ptr %merge.gep, align 4845 %gep.dst = getelementptr i8, ptr %dst, i64 %iv846 store float %l.2, ptr %gep.dst, align 4847 %iv.next = add i64 %iv, 1848 %iv.2.next = add i64 %iv.2, -1849 %ec = icmp sgt i64 %iv.2, 100850 br i1 %ec, label %loop.header, label %exit851 852exit:853 ret void854}855 856define void @address_use_in_different_block(ptr noalias %dst, ptr %src.0, ptr %src.1, i32 %x) #0 {857; I64-LABEL: define void @address_use_in_different_block(858; I64-SAME: ptr noalias [[DST:%.*]], ptr [[SRC_0:%.*]], ptr [[SRC_1:%.*]], i32 [[X:%.*]]) #[[ATTR0]] {859; I64-NEXT: [[ENTRY:.*:]]860; I64-NEXT: [[X_POS:%.*]] = call i32 @llvm.smax.i32(i32 [[X]], i32 0)861; I64-NEXT: [[OFFSET:%.*]] = zext i32 [[X_POS]] to i64862; I64-NEXT: br label %[[VECTOR_PH:.*]]863; I64: [[VECTOR_PH]]:864; I64-NEXT: br label %[[VECTOR_BODY:.*]]865; I64: [[VECTOR_BODY]]:866; I64-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]867; I64-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0868; I64-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1869; I64-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2870; I64-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3871; I64-NEXT: [[TMP4:%.*]] = add i64 [[INDEX]], 4872; I64-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 5873; I64-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 6874; I64-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 7875; I64-NEXT: [[TMP8:%.*]] = mul i64 [[TMP0]], [[OFFSET]]876; I64-NEXT: [[TMP9:%.*]] = mul i64 [[TMP1]], [[OFFSET]]877; I64-NEXT: [[TMP10:%.*]] = mul i64 [[TMP2]], [[OFFSET]]878; I64-NEXT: [[TMP11:%.*]] = mul i64 [[TMP3]], [[OFFSET]]879; I64-NEXT: [[TMP12:%.*]] = mul i64 [[TMP4]], [[OFFSET]]880; I64-NEXT: [[TMP13:%.*]] = mul i64 [[TMP5]], [[OFFSET]]881; I64-NEXT: [[TMP14:%.*]] = mul i64 [[TMP6]], [[OFFSET]]882; I64-NEXT: [[TMP15:%.*]] = mul i64 [[TMP7]], [[OFFSET]]883; I64-NEXT: [[TMP16:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP8]]884; I64-NEXT: [[TMP17:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP9]]885; I64-NEXT: [[TMP18:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP10]]886; I64-NEXT: [[TMP19:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP11]]887; I64-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP12]]888; I64-NEXT: [[TMP21:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP13]]889; I64-NEXT: [[TMP22:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP14]]890; I64-NEXT: [[TMP23:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP15]]891; I64-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP16]], align 4892; I64-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP17]], align 4893; I64-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP18]], align 4894; I64-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP19]], align 4895; I64-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP20]], align 4896; I64-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP21]], align 4897; I64-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP22]], align 4898; I64-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP23]], align 4899; I64-NEXT: [[TMP32:%.*]] = sext i32 [[TMP24]] to i64900; I64-NEXT: [[TMP33:%.*]] = sext i32 [[TMP25]] to i64901; I64-NEXT: [[TMP34:%.*]] = sext i32 [[TMP26]] to i64902; I64-NEXT: [[TMP35:%.*]] = sext i32 [[TMP27]] to i64903; I64-NEXT: [[TMP36:%.*]] = sext i32 [[TMP28]] to i64904; I64-NEXT: [[TMP37:%.*]] = sext i32 [[TMP29]] to i64905; I64-NEXT: [[TMP38:%.*]] = sext i32 [[TMP30]] to i64906; I64-NEXT: [[TMP39:%.*]] = sext i32 [[TMP31]] to i64907; I64-NEXT: [[TMP40:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP32]]908; I64-NEXT: [[TMP41:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP33]]909; I64-NEXT: [[TMP42:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP34]]910; I64-NEXT: [[TMP43:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP35]]911; I64-NEXT: [[TMP44:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP36]]912; I64-NEXT: [[TMP45:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP37]]913; I64-NEXT: [[TMP46:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP38]]914; I64-NEXT: [[TMP47:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP39]]915; I64-NEXT: [[TMP48:%.*]] = getelementptr i8, ptr [[TMP40]], i64 -8916; I64-NEXT: [[TMP49:%.*]] = getelementptr i8, ptr [[TMP41]], i64 -8917; I64-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr [[TMP42]], i64 -8918; I64-NEXT: [[TMP51:%.*]] = getelementptr i8, ptr [[TMP43]], i64 -8919; I64-NEXT: [[TMP52:%.*]] = getelementptr i8, ptr [[TMP44]], i64 -8920; I64-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr [[TMP45]], i64 -8921; I64-NEXT: [[TMP54:%.*]] = getelementptr i8, ptr [[TMP46]], i64 -8922; I64-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr [[TMP47]], i64 -8923; I64-NEXT: [[TMP56:%.*]] = load double, ptr [[TMP48]], align 8924; I64-NEXT: [[TMP57:%.*]] = load double, ptr [[TMP49]], align 8925; I64-NEXT: [[TMP58:%.*]] = insertelement <2 x double> poison, double [[TMP56]], i32 0926; I64-NEXT: [[TMP59:%.*]] = insertelement <2 x double> [[TMP58]], double [[TMP57]], i32 1927; I64-NEXT: [[TMP60:%.*]] = load double, ptr [[TMP50]], align 8928; I64-NEXT: [[TMP61:%.*]] = load double, ptr [[TMP51]], align 8929; I64-NEXT: [[TMP62:%.*]] = insertelement <2 x double> poison, double [[TMP60]], i32 0930; I64-NEXT: [[TMP63:%.*]] = insertelement <2 x double> [[TMP62]], double [[TMP61]], i32 1931; I64-NEXT: [[TMP64:%.*]] = load double, ptr [[TMP52]], align 8932; I64-NEXT: [[TMP65:%.*]] = load double, ptr [[TMP53]], align 8933; I64-NEXT: [[TMP66:%.*]] = insertelement <2 x double> poison, double [[TMP64]], i32 0934; I64-NEXT: [[TMP67:%.*]] = insertelement <2 x double> [[TMP66]], double [[TMP65]], i32 1935; I64-NEXT: [[TMP68:%.*]] = load double, ptr [[TMP54]], align 8936; I64-NEXT: [[TMP69:%.*]] = load double, ptr [[TMP55]], align 8937; I64-NEXT: [[TMP70:%.*]] = insertelement <2 x double> poison, double [[TMP68]], i32 0938; I64-NEXT: [[TMP71:%.*]] = insertelement <2 x double> [[TMP70]], double [[TMP69]], i32 1939; I64-NEXT: [[TMP72:%.*]] = fsub <2 x double> zeroinitializer, [[TMP59]]940; I64-NEXT: [[TMP84:%.*]] = extractelement <2 x double> [[TMP72]], i32 0941; I64-NEXT: [[TMP85:%.*]] = extractelement <2 x double> [[TMP72]], i32 1942; I64-NEXT: [[TMP73:%.*]] = fsub <2 x double> zeroinitializer, [[TMP63]]943; I64-NEXT: [[TMP86:%.*]] = extractelement <2 x double> [[TMP73]], i32 0944; I64-NEXT: [[TMP87:%.*]] = extractelement <2 x double> [[TMP73]], i32 1945; I64-NEXT: [[TMP74:%.*]] = fsub <2 x double> zeroinitializer, [[TMP67]]946; I64-NEXT: [[TMP88:%.*]] = extractelement <2 x double> [[TMP74]], i32 0947; I64-NEXT: [[TMP89:%.*]] = extractelement <2 x double> [[TMP74]], i32 1948; I64-NEXT: [[TMP75:%.*]] = fsub <2 x double> zeroinitializer, [[TMP71]]949; I64-NEXT: [[TMP90:%.*]] = extractelement <2 x double> [[TMP75]], i32 0950; I64-NEXT: [[TMP91:%.*]] = extractelement <2 x double> [[TMP75]], i32 1951; I64-NEXT: [[TMP93:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP8]]952; I64-NEXT: [[TMP94:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP9]]953; I64-NEXT: [[TMP95:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP10]]954; I64-NEXT: [[TMP96:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP11]]955; I64-NEXT: [[TMP97:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP12]]956; I64-NEXT: [[TMP98:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP13]]957; I64-NEXT: [[TMP99:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP14]]958; I64-NEXT: [[TMP83:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP15]]959; I64-NEXT: store double [[TMP84]], ptr [[TMP93]], align 8960; I64-NEXT: store double [[TMP85]], ptr [[TMP94]], align 8961; I64-NEXT: store double [[TMP86]], ptr [[TMP95]], align 8962; I64-NEXT: store double [[TMP87]], ptr [[TMP96]], align 8963; I64-NEXT: store double [[TMP88]], ptr [[TMP97]], align 8964; I64-NEXT: store double [[TMP89]], ptr [[TMP98]], align 8965; I64-NEXT: store double [[TMP90]], ptr [[TMP99]], align 8966; I64-NEXT: store double [[TMP91]], ptr [[TMP83]], align 8967; I64-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8968; I64-NEXT: [[TMP92:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96969; I64-NEXT: br i1 [[TMP92]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]970; I64: [[MIDDLE_BLOCK]]:971; I64-NEXT: br label %[[SCALAR_PH:.*]]972; I64: [[SCALAR_PH]]:973;974; I32-LABEL: define void @address_use_in_different_block(975; I32-SAME: ptr noalias [[DST:%.*]], ptr [[SRC_0:%.*]], ptr [[SRC_1:%.*]], i32 [[X:%.*]]) #[[ATTR0]] {976; I32-NEXT: [[ENTRY:.*:]]977; I32-NEXT: [[X_POS:%.*]] = call i32 @llvm.smax.i32(i32 [[X]], i32 0)978; I32-NEXT: [[OFFSET:%.*]] = zext i32 [[X_POS]] to i64979; I32-NEXT: br label %[[VECTOR_PH:.*]]980; I32: [[VECTOR_PH]]:981; I32-NEXT: br label %[[VECTOR_BODY:.*]]982; I32: [[VECTOR_BODY]]:983; I32-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]984; I32-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0985; I32-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1986; I32-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2987; I32-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3988; I32-NEXT: [[TMP4:%.*]] = mul i64 [[TMP0]], [[OFFSET]]989; I32-NEXT: [[TMP5:%.*]] = mul i64 [[TMP1]], [[OFFSET]]990; I32-NEXT: [[TMP6:%.*]] = mul i64 [[TMP2]], [[OFFSET]]991; I32-NEXT: [[TMP7:%.*]] = mul i64 [[TMP3]], [[OFFSET]]992; I32-NEXT: [[TMP8:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP4]]993; I32-NEXT: [[TMP9:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP5]]994; I32-NEXT: [[TMP10:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP6]]995; I32-NEXT: [[TMP11:%.*]] = getelementptr i32, ptr [[SRC_0]], i64 [[TMP7]]996; I32-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP8]], align 4997; I32-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP9]], align 4998; I32-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP10]], align 4999; I32-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP11]], align 41000; I32-NEXT: [[TMP16:%.*]] = sext i32 [[TMP12]] to i641001; I32-NEXT: [[TMP17:%.*]] = sext i32 [[TMP13]] to i641002; I32-NEXT: [[TMP18:%.*]] = sext i32 [[TMP14]] to i641003; I32-NEXT: [[TMP19:%.*]] = sext i32 [[TMP15]] to i641004; I32-NEXT: [[TMP20:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP16]]1005; I32-NEXT: [[TMP21:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP17]]1006; I32-NEXT: [[TMP22:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP18]]1007; I32-NEXT: [[TMP23:%.*]] = getelementptr double, ptr [[SRC_1]], i64 [[TMP19]]1008; I32-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP20]], i64 -81009; I32-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP21]], i64 -81010; I32-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP22]], i64 -81011; I32-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP23]], i64 -81012; I32-NEXT: [[TMP28:%.*]] = load double, ptr [[TMP24]], align 81013; I32-NEXT: [[TMP29:%.*]] = load double, ptr [[TMP25]], align 81014; I32-NEXT: [[TMP30:%.*]] = load double, ptr [[TMP26]], align 81015; I32-NEXT: [[TMP31:%.*]] = load double, ptr [[TMP27]], align 81016; I32-NEXT: [[TMP32:%.*]] = insertelement <4 x double> poison, double [[TMP28]], i32 01017; I32-NEXT: [[TMP33:%.*]] = insertelement <4 x double> [[TMP32]], double [[TMP29]], i32 11018; I32-NEXT: [[TMP34:%.*]] = insertelement <4 x double> [[TMP33]], double [[TMP30]], i32 21019; I32-NEXT: [[TMP35:%.*]] = insertelement <4 x double> [[TMP34]], double [[TMP31]], i32 31020; I32-NEXT: [[TMP36:%.*]] = fsub <4 x double> zeroinitializer, [[TMP35]]1021; I32-NEXT: [[TMP41:%.*]] = extractelement <4 x double> [[TMP36]], i32 01022; I32-NEXT: [[TMP42:%.*]] = extractelement <4 x double> [[TMP36]], i32 11023; I32-NEXT: [[TMP43:%.*]] = extractelement <4 x double> [[TMP36]], i32 21024; I32-NEXT: [[TMP44:%.*]] = extractelement <4 x double> [[TMP36]], i32 31025; I32-NEXT: [[TMP37:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP4]]1026; I32-NEXT: [[TMP38:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP5]]1027; I32-NEXT: [[TMP39:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP6]]1028; I32-NEXT: [[TMP40:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP7]]1029; I32-NEXT: store double [[TMP41]], ptr [[TMP37]], align 81030; I32-NEXT: store double [[TMP42]], ptr [[TMP38]], align 81031; I32-NEXT: store double [[TMP43]], ptr [[TMP39]], align 81032; I32-NEXT: store double [[TMP44]], ptr [[TMP40]], align 81033; I32-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41034; I32-NEXT: [[TMP45:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1001035; I32-NEXT: br i1 [[TMP45]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]1036; I32: [[MIDDLE_BLOCK]]:1037; I32-NEXT: br label %[[SCALAR_PH:.*]]1038; I32: [[SCALAR_PH]]:1039;1040entry:1041 %x.pos = call i32 @llvm.smax.i32(i32 %x, i32 0)1042 %offset = zext i32 %x.pos to i641043 br label %loop.header1044 1045loop.header:1046 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]1047 %7 = mul i64 %iv, %offset1048 %gep.src.0 = getelementptr i32, ptr %src.0, i64 %71049 %l8 = load i32, ptr %gep.src.0, align 41050 %c = icmp sgt i32 %x, 01051 br i1 %c, label %loop.latch, label %then1052 1053then:1054 br label %loop.latch1055 1056loop.latch:1057 %l.ext = sext i32 %l8 to i641058 %gep.src.1 = getelementptr double, ptr %src.1, i64 %l.ext1059 %13 = getelementptr i8, ptr %gep.src.1, i64 -81060 %l.2 = load double, ptr %13, align 81061 %sub = fsub double 0.000000e+00, %l.21062 %gep.dst = getelementptr double, ptr %dst, i64 %71063 store double %sub, ptr %gep.dst, align 81064 %iv.next = add i64 %iv, 11065 %ec = icmp eq i64 %iv, 1001066 br i1 %ec, label %exit, label %loop.header1067 1068exit:1069 ret void1070}1071 1072attributes #0 = { "target-cpu"="znver2" }1073 1074!0 = distinct !{!0, !1}1075!1 = !{!"llvm.loop.vectorize.enable", i1 true}1076