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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -p loop-vectorize -vectorizer-min-trip-count=8 -mcpu=skylake-avx512 -S %s | FileCheck %s3 4target triple = "x86_64-unknown-linux-gnu"5 6; Test case for https://github.com/llvm/llvm-project/issues/121518. Make sure7; that we preserve LCSSA form when using %iv.1 from loop.1 in the trip count8; expression when vectorizing loop.29define void @value_defined_in_loop1_used_for_trip_counts(i32 %start, i1 %c, ptr %dst) {10; CHECK-LABEL: define void @value_defined_in_loop1_used_for_trip_counts(11; CHECK-SAME: i32 [[START:%.*]], i1 [[C:%.*]], ptr [[DST:%.*]]) #[[ATTR0:[0-9]+]] {12; CHECK-NEXT: [[ENTRY:.*]]:13; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[C]], i32 0, i32 714; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[SELECT]] to i6415; CHECK-NEXT: br label %[[LOOP_1:.*]]16; CHECK: [[LOOP_1]]:17; CHECK-NEXT: [[IV_1:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[ZEXT]], %[[LOOP_1]] ]18; CHECK-NEXT: br i1 false, label %[[LOOP_1_EXIT:.*]], label %[[LOOP_1]]19; CHECK: [[LOOP_1_EXIT]]:20; CHECK-NEXT: [[IV_1_LCSSA:%.*]] = phi i64 [ [[IV_1]], %[[LOOP_1]] ]21; CHECK-NEXT: br i1 [[C]], label %[[LOOP_2_PREHEADER:.*]], label %[[LOOP_3_PREHEADER:.*]]22; CHECK: [[LOOP_3_PREHEADER]]:23; CHECK-NEXT: br label %[[VECTOR_PH:.*]]24; CHECK: [[VECTOR_PH]]:25; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[IV_1]], 126; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 027; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i64> [[BROADCAST_SPLATINSERT]], <16 x i64> poison, <16 x i32> zeroinitializer28; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]29; CHECK: [[VECTOR_BODY]]:30; CHECK-NEXT: [[TMP0:%.*]] = icmp ule <16 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15>, [[BROADCAST_SPLAT]]31; CHECK-NEXT: call void @llvm.masked.store.v16i8.p0(<16 x i8> zeroinitializer, ptr align 1 [[DST]], <16 x i1> [[TMP0]])32; CHECK-NEXT: br label %[[MIDDLE_BLOCK:.*]]33; CHECK: [[MIDDLE_BLOCK]]:34; CHECK-NEXT: br label %[[EXIT_1_LOOPEXIT1:.*]]35; CHECK: [[LOOP_2_PREHEADER]]:36; CHECK-NEXT: br label %[[LOOP_2:.*]]37; CHECK: [[LOOP_2]]:38; CHECK-NEXT: [[IV_2:%.*]] = phi i64 [ [[IV_2_NEXT:%.*]], %[[LOOP_2]] ], [ 0, %[[LOOP_2_PREHEADER]] ]39; CHECK-NEXT: [[IV_3:%.*]] = phi i32 [ [[IV_3_NEXT:%.*]], %[[LOOP_2]] ], [ [[START]], %[[LOOP_2_PREHEADER]] ]40; CHECK-NEXT: [[IV_3_NEXT]] = add i32 [[IV_3]], 141; CHECK-NEXT: [[IV_2_NEXT]] = add i64 [[IV_2]], 142; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[IV_3]], 143; CHECK-NEXT: [[ZEXT8:%.*]] = zext i32 [[SHL]] to i6444; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr i8, ptr [[DST]], i64 [[ZEXT8]]45; CHECK-NEXT: store i16 0, ptr [[GEP_DST]], align 246; CHECK-NEXT: [[EC_2:%.*]] = icmp ult i64 [[IV_2]], [[IV_1_LCSSA]]47; CHECK-NEXT: br i1 [[EC_2]], label %[[LOOP_2]], label %[[EXIT_1_LOOPEXIT:.*]]48; CHECK: [[EXIT_1_LOOPEXIT]]:49; CHECK-NEXT: br label %[[EXIT_1:.*]]50; CHECK: [[EXIT_1_LOOPEXIT1]]:51; CHECK-NEXT: br label %[[EXIT_1]]52; CHECK: [[EXIT_1]]:53; CHECK-NEXT: ret void54;55entry:56 %select = select i1 %c, i32 0, i32 757 %zext = zext i32 %select to i6458 br label %loop.159 60loop.1:61 %iv.1 = phi i64 [ 0, %entry ], [ %zext, %loop.1 ]62 br i1 false, label %loop.1.exit, label %loop.163 64loop.1.exit:65 br i1 %c, label %loop.2, label %loop.366 67loop.2:68 %iv.2 = phi i64 [ 0, %loop.1.exit ], [ %iv.2.next, %loop.2 ]69 %iv.3 = phi i32 [ %start, %loop.1.exit ], [ %iv.3.next, %loop.2 ]70 %iv.3.next = add i32 %iv.3, 171 %iv.2.next = add i64 %iv.2, 172 %shl = shl i32 %iv.3, 173 %zext8 = zext i32 %shl to i6474 %gep.dst = getelementptr i8, ptr %dst, i64 %zext875 store i16 0, ptr %gep.dst, align 276 %ec.2 = icmp ult i64 %iv.2, %iv.177 br i1 %ec.2, label %loop.2, label %exit.178 79loop.3:80 %iv.4 = phi i64 [ 0, %loop.1.exit ], [ %iv.4.next, %loop.3 ]81 %gep.dst.2 = getelementptr i8, ptr %dst, i64 %iv.482 store i8 0, ptr %gep.dst.2, align 183 %iv.4.next = add i64 %iv.4, 184 %ec.3 = icmp ult i64 %iv.4.next, %iv.185 br i1 %ec.3, label %loop.3, label %exit.186 87exit.1:88 ret void89}90