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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"5 6; Test with blend recipe in header VPBB, from7; https://github.com/llvm/llvm-project/issues/88297.8define i64 @pr88297() {9; CHECK-LABEL: define i64 @pr88297() {10; CHECK-NEXT:  entry:11; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]12; CHECK:       vector.ph:13; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]14; CHECK:       vector.body:15; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]16; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 417; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100018; CHECK-NEXT:    br i1 [[TMP0]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]19; CHECK:       middle.block:20; CHECK-NEXT:    br label [[SCALAR_PH:%.*]]21; CHECK:       scalar.ph:22; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]23; CHECK:       loop.header:24; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ 1000, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]25; CHECK-NEXT:    br i1 false, label [[LOOP_LATCH]], label [[THEN:%.*]]26; CHECK:       then:27; CHECK-NEXT:    br label [[LOOP_LATCH]]28; CHECK:       loop.latch:29; CHECK-NEXT:    [[R:%.*]] = phi i64 [ 1, [[THEN]] ], [ 0, [[LOOP_HEADER]] ]30; CHECK-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 131; CHECK-NEXT:    [[ICMP:%.*]] = icmp sgt i32 [[IV]], 100032; CHECK-NEXT:    br i1 [[ICMP]], label [[EXIT:%.*]], label [[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]33; CHECK:       exit:34; CHECK-NEXT:    [[R_LCSSA:%.*]] = phi i64 [ [[R]], [[LOOP_LATCH]] ]35; CHECK-NEXT:    ret i64 [[R_LCSSA]]36;37entry:38  br label %loop.header39 40loop.header:41  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]42  br i1 false, label %loop.latch, label %then43 44then:45  br label %loop.latch46 47loop.latch:48  %r = phi i64 [ 1, %then ], [ 0, %loop.header ]49  %iv.next = add i32 %iv, 150  %icmp = icmp sgt i32 %iv, 100051  br i1 %icmp, label %exit, label %loop.header52 53exit:54  %r.lcssa = phi i64 [ %r, %loop.latch ]55  ret i64 %r.lcssa56}57 58define i64 @pr88297_incoming_ops_reordered() {59; CHECK-LABEL: define i64 @pr88297_incoming_ops_reordered() {60; CHECK-NEXT:  entry:61; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]62; CHECK:       vector.ph:63; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]64; CHECK:       vector.body:65; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]66; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 467; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100068; CHECK-NEXT:    br i1 [[TMP0]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]69; CHECK:       middle.block:70; CHECK-NEXT:    br label [[SCALAR_PH:%.*]]71; CHECK:       scalar.ph:72; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]73; CHECK:       loop.header:74; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ 1000, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]75; CHECK-NEXT:    br i1 false, label [[LOOP_LATCH]], label [[THEN:%.*]]76; CHECK:       then:77; CHECK-NEXT:    br label [[LOOP_LATCH]]78; CHECK:       loop.latch:79; CHECK-NEXT:    [[R:%.*]] = phi i64 [ 0, [[LOOP_HEADER]] ], [ 1, [[THEN]] ]80; CHECK-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 181; CHECK-NEXT:    [[ICMP:%.*]] = icmp sgt i32 [[IV]], 100082; CHECK-NEXT:    br i1 [[ICMP]], label [[EXIT:%.*]], label [[LOOP_HEADER]], !llvm.loop [[LOOP5:![0-9]+]]83; CHECK:       exit:84; CHECK-NEXT:    [[R_LCSSA:%.*]] = phi i64 [ [[R]], [[LOOP_LATCH]] ]85; CHECK-NEXT:    ret i64 [[R_LCSSA]]86;87entry:88  br label %loop.header89 90loop.header:91  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]92  br i1 false, label %loop.latch, label %then93 94then:95  br label %loop.latch96 97loop.latch:98  %r = phi i64 [ 0, %loop.header ], [ 1, %then ]99  %iv.next = add i32 %iv, 1100  %icmp = icmp sgt i32 %iv, 1000101  br i1 %icmp, label %exit, label %loop.header102 103exit:104  %r.lcssa = phi i64 [ %r, %loop.latch ]105  ret i64 %r.lcssa106}107 108define i64 @invar_cond(i1 %c) {109; CHECK-LABEL: define i64 @invar_cond(110; CHECK-SAME: i1 [[C:%.*]]) {111; CHECK-NEXT:  entry:112; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]113; CHECK:       vector.ph:114; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]115; CHECK:       vector.body:116; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]117; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4118; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000119; CHECK-NEXT:    br i1 [[TMP0]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]120; CHECK:       middle.block:121; CHECK-NEXT:    br label [[SCALAR_PH:%.*]]122; CHECK:       scalar.ph:123; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]124; CHECK:       loop.header:125; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ 1000, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]126; CHECK-NEXT:    br i1 [[C]], label [[LOOP_LATCH]], label [[THEN:%.*]]127; CHECK:       then:128; CHECK-NEXT:    br label [[LOOP_LATCH]]129; CHECK:       loop.latch:130; CHECK-NEXT:    [[R:%.*]] = phi i64 [ 1, [[THEN]] ], [ 0, [[LOOP_HEADER]] ]131; CHECK-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1132; CHECK-NEXT:    [[ICMP:%.*]] = icmp sgt i32 [[IV]], 1000133; CHECK-NEXT:    br i1 [[ICMP]], label [[EXIT:%.*]], label [[LOOP_HEADER]], !llvm.loop [[LOOP7:![0-9]+]]134; CHECK:       exit:135; CHECK-NEXT:    [[R_LCSSA:%.*]] = phi i64 [ [[R]], [[LOOP_LATCH]] ]136; CHECK-NEXT:    ret i64 [[R_LCSSA]]137;138entry:139  br label %loop.header140 141loop.header:142  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]143  br i1 %c, label %loop.latch, label %then144 145then:146  br label %loop.latch147 148loop.latch:149  %r = phi i64 [ 1, %then ], [ 0, %loop.header ]150  %iv.next = add i32 %iv, 1151  %icmp = icmp sgt i32 %iv, 1000152  br i1 %icmp, label %exit, label %loop.header153 154exit:155  %r.lcssa = phi i64 [ %r, %loop.latch ]156  ret i64 %r.lcssa157}158 159define i64 @invar_cond_incoming_ops_reordered(i1 %c) {160; CHECK-LABEL: define i64 @invar_cond_incoming_ops_reordered(161; CHECK-SAME: i1 [[C:%.*]]) {162; CHECK-NEXT:  entry:163; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]164; CHECK:       vector.ph:165; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]166; CHECK:       vector.body:167; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]168; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4169; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000170; CHECK-NEXT:    br i1 [[TMP0]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]171; CHECK:       middle.block:172; CHECK-NEXT:    br label [[SCALAR_PH:%.*]]173; CHECK:       scalar.ph:174; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]175; CHECK:       loop.header:176; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ 1000, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]177; CHECK-NEXT:    br i1 [[C]], label [[LOOP_LATCH]], label [[THEN:%.*]]178; CHECK:       then:179; CHECK-NEXT:    br label [[LOOP_LATCH]]180; CHECK:       loop.latch:181; CHECK-NEXT:    [[R:%.*]] = phi i64 [ 0, [[LOOP_HEADER]] ], [ 1, [[THEN]] ]182; CHECK-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1183; CHECK-NEXT:    [[ICMP:%.*]] = icmp sgt i32 [[IV]], 1000184; CHECK-NEXT:    br i1 [[ICMP]], label [[EXIT:%.*]], label [[LOOP_HEADER]], !llvm.loop [[LOOP9:![0-9]+]]185; CHECK:       exit:186; CHECK-NEXT:    [[R_LCSSA:%.*]] = phi i64 [ [[R]], [[LOOP_LATCH]] ]187; CHECK-NEXT:    ret i64 [[R_LCSSA]]188;189entry:190  br label %loop.header191 192loop.header:193  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]194  br i1 %c, label %loop.latch, label %then195 196then:197  br label %loop.latch198 199loop.latch:200  %r = phi i64 [ 0, %loop.header ], [ 1, %then ]201  %iv.next = add i32 %iv, 1202  %icmp = icmp sgt i32 %iv, 1000203  br i1 %icmp, label %exit, label %loop.header204 205exit:206  %r.lcssa = phi i64 [ %r, %loop.latch ]207  ret i64 %r.lcssa208}209;.210; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}211; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}212; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}213; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}214; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}215; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]}216; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}217; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META2]], [[META1]]}218; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}219; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META2]], [[META1]]}220;.221