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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --prefix-filecheck-ir-name unnamed --version 52; RUN: opt %s -S -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 | FileCheck %s3; RUN: opt %s -S -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -enable-interleaved-mem-accesses | FileCheck %s --check-prefix=INTER4 5target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"6 7%pair = type { i32, i32 }8 9; Check that a forward consecutive pointer is recognized as uniform and remains10; uniform after vectorization.11 12define i32 @consecutive_ptr_forward(ptr %a, i64 %n) {13; CHECK-LABEL: define i32 @consecutive_ptr_forward(14; CHECK-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {15; CHECK-NEXT: [[ENTRY:.*]]:16; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)17; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 418; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]19; CHECK: [[VECTOR_PH]]:20; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 421; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]22; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]23; CHECK: [[VECTOR_BODY]]:24; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]25; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP1:%.*]], %[[VECTOR_BODY]] ]26; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDEX]]27; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 828; CHECK-NEXT: [[TMP1]] = add <4 x i32> [[VEC_PHI]], [[WIDE_LOAD]]29; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 430; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]31; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]32; CHECK: [[MIDDLE_BLOCK]]:33; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP1]])34; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]35; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]36; CHECK: [[SCALAR_PH]]:37; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]38; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]39; CHECK-NEXT: br label %[[FOR_BODY:.*]]40; CHECK: [[FOR_BODY]]:41; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]42; CHECK-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP3:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]43; CHECK-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[I]]44; CHECK-NEXT: [[UNNAMEDTMP2:%.*]] = load i32, ptr [[UNNAMEDTMP1]], align 845; CHECK-NEXT: [[UNNAMEDTMP3]] = add i32 [[UNNAMEDTMP0]], [[UNNAMEDTMP2]]46; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 147; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]48; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP3:![0-9]+]]49; CHECK: [[FOR_END]]:50; CHECK-NEXT: [[UNNAMEDTMP4:%.*]] = phi i32 [ [[UNNAMEDTMP3]], %[[FOR_BODY]] ], [ [[TMP3]], %[[MIDDLE_BLOCK]] ]51; CHECK-NEXT: ret i32 [[UNNAMEDTMP4]]52;53; INTER-LABEL: define i32 @consecutive_ptr_forward(54; INTER-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {55; INTER-NEXT: [[ENTRY:.*]]:56; INTER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)57; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 458; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]59; INTER: [[VECTOR_PH]]:60; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 461; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]62; INTER-NEXT: br label %[[VECTOR_BODY:.*]]63; INTER: [[VECTOR_BODY]]:64; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]65; INTER-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP1:%.*]], %[[VECTOR_BODY]] ]66; INTER-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDEX]]67; INTER-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 868; INTER-NEXT: [[TMP1]] = add <4 x i32> [[VEC_PHI]], [[WIDE_LOAD]]69; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 470; INTER-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]71; INTER-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]72; INTER: [[MIDDLE_BLOCK]]:73; INTER-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP1]])74; INTER-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]75; INTER-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]76; INTER: [[SCALAR_PH]]:77; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]78; INTER-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]79; INTER-NEXT: br label %[[FOR_BODY:.*]]80; INTER: [[FOR_BODY]]:81; INTER-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]82; INTER-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP3:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]83; INTER-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[I]]84; INTER-NEXT: [[UNNAMEDTMP2:%.*]] = load i32, ptr [[UNNAMEDTMP1]], align 885; INTER-NEXT: [[UNNAMEDTMP3]] = add i32 [[UNNAMEDTMP0]], [[UNNAMEDTMP2]]86; INTER-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 187; INTER-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]88; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP3:![0-9]+]]89; INTER: [[FOR_END]]:90; INTER-NEXT: [[UNNAMEDTMP4:%.*]] = phi i32 [ [[UNNAMEDTMP3]], %[[FOR_BODY]] ], [ [[TMP3]], %[[MIDDLE_BLOCK]] ]91; INTER-NEXT: ret i32 [[UNNAMEDTMP4]]92;93entry:94 br label %for.body95 96for.body:97 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]98 %tmp0 = phi i32 [ %tmp3, %for.body ], [ 0, %entry ]99 %tmp1 = getelementptr inbounds i32, ptr %a, i64 %i100 %tmp2 = load i32, ptr %tmp1, align 8101 %tmp3 = add i32 %tmp0, %tmp2102 %i.next = add nuw nsw i64 %i, 1103 %cond = icmp slt i64 %i.next, %n104 br i1 %cond, label %for.body, label %for.end105 106for.end:107 %tmp4 = phi i32 [ %tmp3, %for.body ]108 ret i32 %tmp4109}110 111; Check that a reverse consecutive pointer is recognized as uniform and remains112; uniform after vectorization.113 114define i32 @consecutive_ptr_reverse(ptr %a, i64 %n) {115; CHECK-LABEL: define i32 @consecutive_ptr_reverse(116; CHECK-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {117; CHECK-NEXT: [[ENTRY:.*]]:118; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[N]], -1119; CHECK-NEXT: [[SMIN:%.*]] = call i64 @llvm.smin.i64(i64 [[TMP0]], i64 0)120; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[N]], [[SMIN]]121; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 4122; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]123; CHECK: [[VECTOR_PH]]:124; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], 4125; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]]126; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[N]], [[N_VEC]]127; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]128; CHECK: [[VECTOR_BODY]]:129; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]130; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]131; CHECK-NEXT: [[OFFSET_IDX:%.*]] = sub i64 [[N]], [[INDEX]]132; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[OFFSET_IDX]]133; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 0134; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i64 -3135; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP4]], align 8136; CHECK-NEXT: [[REVERSE:%.*]] = shufflevector <4 x i32> [[WIDE_LOAD]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>137; CHECK-NEXT: [[TMP5]] = add <4 x i32> [[VEC_PHI]], [[REVERSE]]138; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4139; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]140; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]141; CHECK: [[MIDDLE_BLOCK]]:142; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP5]])143; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]]144; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]145; CHECK: [[SCALAR_PH]]:146; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[N]], %[[ENTRY]] ]147; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP7]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]148; CHECK-NEXT: br label %[[FOR_BODY:.*]]149; CHECK: [[FOR_BODY]]:150; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]151; CHECK-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP3:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]152; CHECK-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[I]]153; CHECK-NEXT: [[UNNAMEDTMP2:%.*]] = load i32, ptr [[UNNAMEDTMP1]], align 8154; CHECK-NEXT: [[UNNAMEDTMP3]] = add i32 [[UNNAMEDTMP0]], [[UNNAMEDTMP2]]155; CHECK-NEXT: [[I_NEXT]] = add nsw i64 [[I]], -1156; CHECK-NEXT: [[COND:%.*]] = icmp sgt i64 [[I_NEXT]], 0157; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP5:![0-9]+]]158; CHECK: [[FOR_END]]:159; CHECK-NEXT: [[UNNAMEDTMP4:%.*]] = phi i32 [ [[UNNAMEDTMP3]], %[[FOR_BODY]] ], [ [[TMP7]], %[[MIDDLE_BLOCK]] ]160; CHECK-NEXT: ret i32 [[UNNAMEDTMP4]]161;162; INTER-LABEL: define i32 @consecutive_ptr_reverse(163; INTER-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {164; INTER-NEXT: [[ENTRY:.*]]:165; INTER-NEXT: [[TMP0:%.*]] = add nsw i64 [[N]], -1166; INTER-NEXT: [[SMIN:%.*]] = call i64 @llvm.smin.i64(i64 [[TMP0]], i64 0)167; INTER-NEXT: [[TMP1:%.*]] = sub i64 [[N]], [[SMIN]]168; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 4169; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]170; INTER: [[VECTOR_PH]]:171; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], 4172; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]]173; INTER-NEXT: [[TMP2:%.*]] = sub i64 [[N]], [[N_VEC]]174; INTER-NEXT: br label %[[VECTOR_BODY:.*]]175; INTER: [[VECTOR_BODY]]:176; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]177; INTER-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]178; INTER-NEXT: [[OFFSET_IDX:%.*]] = sub i64 [[N]], [[INDEX]]179; INTER-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[OFFSET_IDX]]180; INTER-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 0181; INTER-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i64 -3182; INTER-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP4]], align 8183; INTER-NEXT: [[REVERSE:%.*]] = shufflevector <4 x i32> [[WIDE_LOAD]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>184; INTER-NEXT: [[TMP5]] = add <4 x i32> [[VEC_PHI]], [[REVERSE]]185; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4186; INTER-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]187; INTER-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]188; INTER: [[MIDDLE_BLOCK]]:189; INTER-NEXT: [[TMP7:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP5]])190; INTER-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]]191; INTER-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]192; INTER: [[SCALAR_PH]]:193; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[N]], %[[ENTRY]] ]194; INTER-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP7]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]195; INTER-NEXT: br label %[[FOR_BODY:.*]]196; INTER: [[FOR_BODY]]:197; INTER-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]198; INTER-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP3:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]199; INTER-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[I]]200; INTER-NEXT: [[UNNAMEDTMP2:%.*]] = load i32, ptr [[UNNAMEDTMP1]], align 8201; INTER-NEXT: [[UNNAMEDTMP3]] = add i32 [[UNNAMEDTMP0]], [[UNNAMEDTMP2]]202; INTER-NEXT: [[I_NEXT]] = add nsw i64 [[I]], -1203; INTER-NEXT: [[COND:%.*]] = icmp sgt i64 [[I_NEXT]], 0204; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP5:![0-9]+]]205; INTER: [[FOR_END]]:206; INTER-NEXT: [[UNNAMEDTMP4:%.*]] = phi i32 [ [[UNNAMEDTMP3]], %[[FOR_BODY]] ], [ [[TMP7]], %[[MIDDLE_BLOCK]] ]207; INTER-NEXT: ret i32 [[UNNAMEDTMP4]]208;209entry:210 br label %for.body211 212for.body:213 %i = phi i64 [ %i.next, %for.body ], [ %n, %entry ]214 %tmp0 = phi i32 [ %tmp3, %for.body ], [ 0, %entry ]215 %tmp1 = getelementptr inbounds i32, ptr %a, i64 %i216 %tmp2 = load i32, ptr %tmp1, align 8217 %tmp3 = add i32 %tmp0, %tmp2218 %i.next = add nsw i64 %i, -1219 %cond = icmp sgt i64 %i.next, 0220 br i1 %cond, label %for.body, label %for.end221 222for.end:223 %tmp4 = phi i32 [ %tmp3, %for.body ]224 ret i32 %tmp4225}226 227; Check that a consecutive-like pointer used by a forward interleaved group is228; recognized as uniform and remains uniform after vectorization. When229; interleaved memory accesses aren't enabled, the pointer should not be230; recognized as uniform, and it should not be uniform after vectorization.231 232define i32 @interleaved_access_forward(ptr %p, i64 %n) {233; CHECK-LABEL: define i32 @interleaved_access_forward(234; CHECK-SAME: ptr [[P:%.*]], i64 [[N:%.*]]) {235; CHECK-NEXT: [[ENTRY:.*]]:236; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)237; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4238; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]239; CHECK: [[VECTOR_PH]]:240; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 4241; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]242; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]243; CHECK: [[VECTOR_BODY]]:244; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]245; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP28:%.*]], %[[VECTOR_BODY]] ]246; CHECK-NEXT: [[INDEX:%.*]] = add i64 [[INDEX1]], 0247; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX1]], 1248; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX1]], 2249; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX1]], 3250; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[PAIR:%.*]], ptr [[P]], i64 [[INDEX]], i32 0251; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP0]], i32 0252; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP1]], i32 0253; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP2]], i32 0254; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[INDEX]], i32 1255; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP0]], i32 1256; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP1]], i32 1257; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP2]], i32 1258; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP3]], align 8259; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP4]], align 8260; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP5]], align 8261; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP6]], align 8262; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> poison, i32 [[TMP11]], i32 0263; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP16]], i32 [[TMP12]], i32 1264; CHECK-NEXT: [[TMP23:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP13]], i32 2265; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> [[TMP23]], i32 [[TMP14]], i32 3266; CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP7]], align 8267; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP8]], align 8268; CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP9]], align 8269; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP10]], align 8270; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> poison, i32 [[TMP19]], i32 0271; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> [[TMP24]], i32 [[TMP20]], i32 1272; CHECK-NEXT: [[TMP31:%.*]] = insertelement <4 x i32> [[TMP25]], i32 [[TMP21]], i32 2273; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> [[TMP31]], i32 [[TMP22]], i32 3274; CHECK-NEXT: [[TMP27:%.*]] = add <4 x i32> [[TMP18]], [[TMP26]]275; CHECK-NEXT: [[TMP28]] = add <4 x i32> [[VEC_PHI]], [[TMP27]]276; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX1]], 4277; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]278; CHECK-NEXT: br i1 [[TMP29]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]279; CHECK: [[MIDDLE_BLOCK]]:280; CHECK-NEXT: [[TMP30:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP28]])281; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]282; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]283; CHECK: [[SCALAR_PH]]:284; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]285; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP30]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]286; CHECK-NEXT: br label %[[FOR_BODY:.*]]287; CHECK: [[FOR_BODY]]:288; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]289; CHECK-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP6:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]290; CHECK-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 0291; CHECK-NEXT: [[UNNAMEDTMP2:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 1292; CHECK-NEXT: [[UNNAMEDTMP3:%.*]] = load i32, ptr [[UNNAMEDTMP1]], align 8293; CHECK-NEXT: [[UNNAMEDTMP4:%.*]] = load i32, ptr [[UNNAMEDTMP2]], align 8294; CHECK-NEXT: [[UNNAMEDTMP5:%.*]] = add i32 [[UNNAMEDTMP3]], [[UNNAMEDTMP4]]295; CHECK-NEXT: [[UNNAMEDTMP6]] = add i32 [[UNNAMEDTMP0]], [[UNNAMEDTMP5]]296; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1297; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]298; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP7:![0-9]+]]299; CHECK: [[FOR_END]]:300; CHECK-NEXT: [[UNNAMEDTMP14:%.*]] = phi i32 [ [[UNNAMEDTMP6]], %[[FOR_BODY]] ], [ [[TMP30]], %[[MIDDLE_BLOCK]] ]301; CHECK-NEXT: ret i32 [[UNNAMEDTMP14]]302;303; INTER-LABEL: define i32 @interleaved_access_forward(304; INTER-SAME: ptr [[P:%.*]], i64 [[N:%.*]]) {305; INTER-NEXT: [[ENTRY:.*]]:306; INTER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)307; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4308; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]309; INTER: [[VECTOR_PH]]:310; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 4311; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]312; INTER-NEXT: br label %[[VECTOR_BODY:.*]]313; INTER: [[VECTOR_BODY]]:314; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]315; INTER-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP2:%.*]], %[[VECTOR_BODY]] ]316; INTER-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[PAIR:%.*]], ptr [[P]], i64 [[INDEX]], i32 0317; INTER-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP0]], align 8318; INTER-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>319; INTER-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>320; INTER-NEXT: [[TMP1:%.*]] = add <4 x i32> [[STRIDED_VEC]], [[STRIDED_VEC1]]321; INTER-NEXT: [[TMP2]] = add <4 x i32> [[VEC_PHI]], [[TMP1]]322; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4323; INTER-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]324; INTER-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]325; INTER: [[MIDDLE_BLOCK]]:326; INTER-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP2]])327; INTER-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]328; INTER-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]329; INTER: [[SCALAR_PH]]:330; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]331; INTER-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]332; INTER-NEXT: br label %[[FOR_BODY:.*]]333; INTER: [[FOR_BODY]]:334; INTER-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]335; INTER-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP6:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]336; INTER-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 0337; INTER-NEXT: [[UNNAMEDTMP2:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 1338; INTER-NEXT: [[UNNAMEDTMP3:%.*]] = load i32, ptr [[UNNAMEDTMP1]], align 8339; INTER-NEXT: [[UNNAMEDTMP4:%.*]] = load i32, ptr [[UNNAMEDTMP2]], align 8340; INTER-NEXT: [[UNNAMEDTMP5:%.*]] = add i32 [[UNNAMEDTMP3]], [[UNNAMEDTMP4]]341; INTER-NEXT: [[UNNAMEDTMP6]] = add i32 [[UNNAMEDTMP0]], [[UNNAMEDTMP5]]342; INTER-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1343; INTER-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]344; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP7:![0-9]+]]345; INTER: [[FOR_END]]:346; INTER-NEXT: [[UNNAMEDTMP14:%.*]] = phi i32 [ [[UNNAMEDTMP6]], %[[FOR_BODY]] ], [ [[TMP4]], %[[MIDDLE_BLOCK]] ]347; INTER-NEXT: ret i32 [[UNNAMEDTMP14]]348;349entry:350 br label %for.body351 352for.body:353 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]354 %tmp0 = phi i32 [ %tmp6, %for.body ], [ 0, %entry ]355 %tmp1 = getelementptr inbounds %pair, ptr %p, i64 %i, i32 0356 %tmp2 = getelementptr inbounds %pair, ptr %p, i64 %i, i32 1357 %tmp3 = load i32, ptr %tmp1, align 8358 %tmp4 = load i32, ptr %tmp2, align 8359 %tmp5 = add i32 %tmp3, %tmp4360 %tmp6 = add i32 %tmp0, %tmp5361 %i.next = add nuw nsw i64 %i, 1362 %cond = icmp slt i64 %i.next, %n363 br i1 %cond, label %for.body, label %for.end364 365for.end:366 %tmp14 = phi i32 [ %tmp6, %for.body ]367 ret i32 %tmp14368}369 370; Check that a consecutive-like pointer used by a reverse interleaved group is371; recognized as uniform and remains uniform after vectorization. When372; interleaved memory accesses aren't enabled, the pointer should not be373; recognized as uniform, and it should not be uniform after vectorization.374 375define i32 @interleaved_access_reverse(ptr %p, i64 %n) {376; CHECK-LABEL: define i32 @interleaved_access_reverse(377; CHECK-SAME: ptr [[P:%.*]], i64 [[N:%.*]]) {378; CHECK-NEXT: [[ENTRY:.*]]:379; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[N]], -1380; CHECK-NEXT: [[SMIN:%.*]] = call i64 @llvm.smin.i64(i64 [[TMP0]], i64 0)381; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[N]], [[SMIN]]382; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 4383; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]384; CHECK: [[VECTOR_PH]]:385; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], 4386; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]]387; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[N]], [[N_VEC]]388; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]389; CHECK: [[VECTOR_BODY]]:390; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]391; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP31:%.*]], %[[VECTOR_BODY]] ]392; CHECK-NEXT: [[OFFSET_IDX:%.*]] = sub i64 [[N]], [[INDEX]]393; CHECK-NEXT: [[TMP18:%.*]] = add i64 [[OFFSET_IDX]], 0394; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], -1395; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], -2396; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], -3397; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[PAIR:%.*]], ptr [[P]], i64 [[TMP18]], i32 0398; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP3]], i32 0399; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP4]], i32 0400; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP5]], i32 0401; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP18]], i32 1402; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP3]], i32 1403; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP4]], i32 1404; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP5]], i32 1405; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP6]], align 8406; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP7]], align 8407; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP8]], align 8408; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP9]], align 8409; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i32> poison, i32 [[TMP14]], i32 0410; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP15]], i32 1411; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> [[TMP20]], i32 [[TMP16]], i32 2412; CHECK-NEXT: [[TMP21:%.*]] = insertelement <4 x i32> [[TMP26]], i32 [[TMP17]], i32 3413; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP10]], align 8414; CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP11]], align 8415; CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP12]], align 8416; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP13]], align 8417; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> poison, i32 [[TMP22]], i32 0418; CHECK-NEXT: [[TMP28:%.*]] = insertelement <4 x i32> [[TMP27]], i32 [[TMP23]], i32 1419; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP24]], i32 2420; CHECK-NEXT: [[TMP29:%.*]] = insertelement <4 x i32> [[TMP34]], i32 [[TMP25]], i32 3421; CHECK-NEXT: [[TMP30:%.*]] = add <4 x i32> [[TMP21]], [[TMP29]]422; CHECK-NEXT: [[TMP31]] = add <4 x i32> [[VEC_PHI]], [[TMP30]]423; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4424; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]425; CHECK-NEXT: br i1 [[TMP32]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]426; CHECK: [[MIDDLE_BLOCK]]:427; CHECK-NEXT: [[TMP33:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP31]])428; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]]429; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]430; CHECK: [[SCALAR_PH]]:431; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[N]], %[[ENTRY]] ]432; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP33]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]433; CHECK-NEXT: br label %[[FOR_BODY:.*]]434; CHECK: [[FOR_BODY]]:435; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]436; CHECK-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP6:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]437; CHECK-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 0438; CHECK-NEXT: [[UNNAMEDTMP2:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 1439; CHECK-NEXT: [[UNNAMEDTMP3:%.*]] = load i32, ptr [[UNNAMEDTMP1]], align 8440; CHECK-NEXT: [[UNNAMEDTMP4:%.*]] = load i32, ptr [[UNNAMEDTMP2]], align 8441; CHECK-NEXT: [[UNNAMEDTMP5:%.*]] = add i32 [[UNNAMEDTMP3]], [[UNNAMEDTMP4]]442; CHECK-NEXT: [[UNNAMEDTMP6]] = add i32 [[UNNAMEDTMP0]], [[UNNAMEDTMP5]]443; CHECK-NEXT: [[I_NEXT]] = add nsw i64 [[I]], -1444; CHECK-NEXT: [[COND:%.*]] = icmp sgt i64 [[I_NEXT]], 0445; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP9:![0-9]+]]446; CHECK: [[FOR_END]]:447; CHECK-NEXT: [[UNNAMEDTMP14:%.*]] = phi i32 [ [[UNNAMEDTMP6]], %[[FOR_BODY]] ], [ [[TMP33]], %[[MIDDLE_BLOCK]] ]448; CHECK-NEXT: ret i32 [[UNNAMEDTMP14]]449;450; INTER-LABEL: define i32 @interleaved_access_reverse(451; INTER-SAME: ptr [[P:%.*]], i64 [[N:%.*]]) {452; INTER-NEXT: [[ENTRY:.*]]:453; INTER-NEXT: [[TMP0:%.*]] = add nsw i64 [[N]], -1454; INTER-NEXT: [[SMIN:%.*]] = call i64 @llvm.smin.i64(i64 [[TMP0]], i64 0)455; INTER-NEXT: [[TMP1:%.*]] = sub i64 [[N]], [[SMIN]]456; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 4457; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]458; INTER: [[VECTOR_PH]]:459; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], 4460; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]]461; INTER-NEXT: [[TMP2:%.*]] = sub i64 [[N]], [[N_VEC]]462; INTER-NEXT: br label %[[VECTOR_BODY:.*]]463; INTER: [[VECTOR_BODY]]:464; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]465; INTER-NEXT: [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP10:%.*]], %[[VECTOR_BODY]] ]466; INTER-NEXT: [[OFFSET_IDX:%.*]] = sub i64 [[N]], [[INDEX]]467; INTER-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[PAIR:%.*]], ptr [[P]], i64 [[OFFSET_IDX]], i32 0468; INTER-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 0469; INTER-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i64 -6470; INTER-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP4]], align 8471; INTER-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>472; INTER-NEXT: [[VEC_PHI:%.*]] = shufflevector <4 x i32> [[STRIDED_VEC]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>473; INTER-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>474; INTER-NEXT: [[TMP6:%.*]] = shufflevector <4 x i32> [[STRIDED_VEC1]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>475; INTER-NEXT: [[TMP7:%.*]] = add <4 x i32> [[VEC_PHI]], [[TMP6]]476; INTER-NEXT: [[TMP10]] = add <4 x i32> [[VEC_PHI1]], [[TMP7]]477; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4478; INTER-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]479; INTER-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]480; INTER: [[MIDDLE_BLOCK]]:481; INTER-NEXT: [[TMP9:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP10]])482; INTER-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]]483; INTER-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]484; INTER: [[SCALAR_PH]]:485; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[N]], %[[ENTRY]] ]486; INTER-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP9]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]487; INTER-NEXT: br label %[[FOR_BODY:.*]]488; INTER: [[FOR_BODY]]:489; INTER-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]490; INTER-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP6:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]491; INTER-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 0492; INTER-NEXT: [[UNNAMEDTMP2:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 1493; INTER-NEXT: [[UNNAMEDTMP3:%.*]] = load i32, ptr [[UNNAMEDTMP1]], align 8494; INTER-NEXT: [[UNNAMEDTMP4:%.*]] = load i32, ptr [[UNNAMEDTMP2]], align 8495; INTER-NEXT: [[UNNAMEDTMP5:%.*]] = add i32 [[UNNAMEDTMP3]], [[UNNAMEDTMP4]]496; INTER-NEXT: [[UNNAMEDTMP6]] = add i32 [[UNNAMEDTMP0]], [[UNNAMEDTMP5]]497; INTER-NEXT: [[I_NEXT]] = add nsw i64 [[I]], -1498; INTER-NEXT: [[COND:%.*]] = icmp sgt i64 [[I_NEXT]], 0499; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP9:![0-9]+]]500; INTER: [[FOR_END]]:501; INTER-NEXT: [[UNNAMEDTMP14:%.*]] = phi i32 [ [[UNNAMEDTMP6]], %[[FOR_BODY]] ], [ [[TMP9]], %[[MIDDLE_BLOCK]] ]502; INTER-NEXT: ret i32 [[UNNAMEDTMP14]]503;504entry:505 br label %for.body506 507for.body:508 %i = phi i64 [ %i.next, %for.body ], [ %n, %entry ]509 %tmp0 = phi i32 [ %tmp6, %for.body ], [ 0, %entry ]510 %tmp1 = getelementptr inbounds %pair, ptr %p, i64 %i, i32 0511 %tmp2 = getelementptr inbounds %pair, ptr %p, i64 %i, i32 1512 %tmp3 = load i32, ptr %tmp1, align 8513 %tmp4 = load i32, ptr %tmp2, align 8514 %tmp5 = add i32 %tmp3, %tmp4515 %tmp6 = add i32 %tmp0, %tmp5516 %i.next = add nsw i64 %i, -1517 %cond = icmp sgt i64 %i.next, 0518 br i1 %cond, label %for.body, label %for.end519 520for.end:521 %tmp14 = phi i32 [ %tmp6, %for.body ]522 ret i32 %tmp14523}524 525; Check that a consecutive-like pointer used by a forward interleaved group and526; scalarized store is not recognized as uniform and is not uniform after527; vectorization. The store is scalarized because it's in a predicated block.528; Even though the load in this example is vectorized and only uses the pointer529; as if it were uniform, the store is scalarized, making the pointer530; non-uniform.531 532define void @predicated_store(ptr %p, i32 %x, i64 %n) {533; CHECK-LABEL: define void @predicated_store(534; CHECK-SAME: ptr [[P:%.*]], i32 [[X:%.*]], i64 [[N:%.*]]) {535; CHECK-NEXT: [[ENTRY:.*]]:536; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)537; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4538; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]539; CHECK: [[VECTOR_PH]]:540; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 4541; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]542; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[X]], i64 0543; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer544; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]545; CHECK: [[VECTOR_BODY]]:546; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE6:.*]] ]547; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 0548; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1549; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], 2550; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3551; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[PAIR:%.*]], ptr [[P]], i64 [[TMP5]], i32 0552; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP1]], i32 0553; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP12]], i32 0554; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP3]], i32 0555; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP0]], i32 0556; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x ptr> [[TMP13]], ptr [[TMP2]], i32 1557; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x ptr> [[TMP19]], ptr [[TMP4]], i32 2558; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x ptr> [[TMP25]], ptr [[TMP6]], i32 3559; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 8560; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 8561; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP4]], align 8562; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP6]], align 8563; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> poison, i32 [[TMP7]], i32 0564; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP16]], i32 [[TMP8]], i32 1565; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP9]], i32 2566; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP10]], i32 3567; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <4 x i32> [[TMP14]], [[BROADCAST_SPLAT]]568; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP15]], i32 0569; CHECK-NEXT: br i1 [[TMP21]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]570; CHECK: [[PRED_STORE_IF]]:571; CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP0]], align 8572; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]573; CHECK: [[PRED_STORE_CONTINUE]]:574; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i1> [[TMP15]], i32 1575; CHECK-NEXT: br i1 [[TMP22]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]576; CHECK: [[PRED_STORE_IF1]]:577; CHECK-NEXT: store i32 [[TMP8]], ptr [[TMP2]], align 8578; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE2]]579; CHECK: [[PRED_STORE_CONTINUE2]]:580; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP15]], i32 2581; CHECK-NEXT: br i1 [[TMP23]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]582; CHECK: [[PRED_STORE_IF3]]:583; CHECK-NEXT: store i32 [[TMP9]], ptr [[TMP4]], align 8584; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE4]]585; CHECK: [[PRED_STORE_CONTINUE4]]:586; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i1> [[TMP15]], i32 3587; CHECK-NEXT: br i1 [[TMP24]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6]]588; CHECK: [[PRED_STORE_IF5]]:589; CHECK-NEXT: store i32 [[TMP10]], ptr [[TMP6]], align 8590; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE6]]591; CHECK: [[PRED_STORE_CONTINUE6]]:592; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4593; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]594; CHECK-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]595; CHECK: [[MIDDLE_BLOCK]]:596; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]597; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]598; CHECK: [[SCALAR_PH]]:599; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]600; CHECK-NEXT: br label %[[FOR_BODY:.*]]601; CHECK: [[FOR_BODY]]:602; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[IF_MERGE:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]603; CHECK-NEXT: [[UNNAMEDTMP0:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 0604; CHECK-NEXT: [[UNNAMEDTMP1:%.*]] = load i32, ptr [[UNNAMEDTMP0]], align 8605; CHECK-NEXT: [[UNNAMEDTMP2:%.*]] = icmp eq i32 [[UNNAMEDTMP1]], [[X]]606; CHECK-NEXT: br i1 [[UNNAMEDTMP2]], label %[[IF_THEN:.*]], label %[[IF_MERGE]]607; CHECK: [[IF_THEN]]:608; CHECK-NEXT: store i32 [[UNNAMEDTMP1]], ptr [[UNNAMEDTMP0]], align 8609; CHECK-NEXT: br label %[[IF_MERGE]]610; CHECK: [[IF_MERGE]]:611; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1612; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]613; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP11:![0-9]+]]614; CHECK: [[FOR_END]]:615; CHECK-NEXT: ret void616;617; INTER-LABEL: define void @predicated_store(618; INTER-SAME: ptr [[P:%.*]], i32 [[X:%.*]], i64 [[N:%.*]]) {619; INTER-NEXT: [[ENTRY:.*]]:620; INTER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)621; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i64 [[SMAX]], 4622; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]623; INTER: [[VECTOR_PH]]:624; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 4625; INTER-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 0626; INTER-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 4, i64 [[N_MOD_VF]]627; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[TMP1]]628; INTER-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[X]], i64 0629; INTER-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer630; INTER-NEXT: br label %[[VECTOR_BODY:.*]]631; INTER: [[VECTOR_BODY]]:632; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE6:.*]] ]633; INTER-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[PAIR:%.*]], ptr [[P]], i64 [[INDEX]], i32 0634; INTER-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP2]], align 8635; INTER-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>636; INTER-NEXT: [[TMP3:%.*]] = icmp eq <4 x i32> [[STRIDED_VEC]], [[BROADCAST_SPLAT]]637; INTER-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP3]], i32 0638; INTER-NEXT: br i1 [[TMP4]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]639; INTER: [[PRED_STORE_IF]]:640; INTER-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 0641; INTER-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP7]], i32 0642; INTER-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i32 0643; INTER-NEXT: store i32 [[TMP6]], ptr [[TMP5]], align 8644; INTER-NEXT: br label %[[PRED_STORE_CONTINUE]]645; INTER: [[PRED_STORE_CONTINUE]]:646; INTER-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP3]], i32 1647; INTER-NEXT: br i1 [[TMP8]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]648; INTER: [[PRED_STORE_IF1]]:649; INTER-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1650; INTER-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP11]], i32 0651; INTER-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i32 1652; INTER-NEXT: store i32 [[TMP10]], ptr [[TMP9]], align 8653; INTER-NEXT: br label %[[PRED_STORE_CONTINUE2]]654; INTER: [[PRED_STORE_CONTINUE2]]:655; INTER-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP3]], i32 2656; INTER-NEXT: br i1 [[TMP12]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]657; INTER: [[PRED_STORE_IF3]]:658; INTER-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], 2659; INTER-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP15]], i32 0660; INTER-NEXT: [[TMP14:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i32 2661; INTER-NEXT: store i32 [[TMP14]], ptr [[TMP13]], align 8662; INTER-NEXT: br label %[[PRED_STORE_CONTINUE4]]663; INTER: [[PRED_STORE_CONTINUE4]]:664; INTER-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP3]], i32 3665; INTER-NEXT: br i1 [[TMP16]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6]]666; INTER: [[PRED_STORE_IF5]]:667; INTER-NEXT: [[TMP20:%.*]] = add i64 [[INDEX]], 3668; INTER-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[TMP20]], i32 0669; INTER-NEXT: [[TMP18:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i32 3670; INTER-NEXT: store i32 [[TMP18]], ptr [[TMP17]], align 8671; INTER-NEXT: br label %[[PRED_STORE_CONTINUE6]]672; INTER: [[PRED_STORE_CONTINUE6]]:673; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4674; INTER-NEXT: [[TMP19:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]675; INTER-NEXT: br i1 [[TMP19]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]676; INTER: [[MIDDLE_BLOCK]]:677; INTER-NEXT: br label %[[SCALAR_PH]]678; INTER: [[SCALAR_PH]]:679; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]680; INTER-NEXT: br label %[[FOR_BODY:.*]]681; INTER: [[FOR_BODY]]:682; INTER-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[IF_MERGE:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]683; INTER-NEXT: [[UNNAMEDTMP0:%.*]] = getelementptr inbounds [[PAIR]], ptr [[P]], i64 [[I]], i32 0684; INTER-NEXT: [[UNNAMEDTMP1:%.*]] = load i32, ptr [[UNNAMEDTMP0]], align 8685; INTER-NEXT: [[UNNAMEDTMP2:%.*]] = icmp eq i32 [[UNNAMEDTMP1]], [[X]]686; INTER-NEXT: br i1 [[UNNAMEDTMP2]], label %[[IF_THEN:.*]], label %[[IF_MERGE]]687; INTER: [[IF_THEN]]:688; INTER-NEXT: store i32 [[UNNAMEDTMP1]], ptr [[UNNAMEDTMP0]], align 8689; INTER-NEXT: br label %[[IF_MERGE]]690; INTER: [[IF_MERGE]]:691; INTER-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1692; INTER-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]693; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END:.*]], !llvm.loop [[LOOP11:![0-9]+]]694; INTER: [[FOR_END]]:695; INTER-NEXT: ret void696;697entry:698 br label %for.body699 700for.body:701 %i = phi i64 [ %i.next, %if.merge ], [ 0, %entry ]702 %tmp0 = getelementptr inbounds %pair, ptr %p, i64 %i, i32 0703 %tmp1 = load i32, ptr %tmp0, align 8704 %tmp2 = icmp eq i32 %tmp1, %x705 br i1 %tmp2, label %if.then, label %if.merge706 707if.then:708 store i32 %tmp1, ptr %tmp0, align 8709 br label %if.merge710 711if.merge:712 %i.next = add nuw nsw i64 %i, 1713 %cond = icmp slt i64 %i.next, %n714 br i1 %cond, label %for.body, label %for.end715 716for.end:717 ret void718}719 720; Check that a consecutive pointer used by a scalarized store is not recognized721; as uniform and is not uniform after vectorization. The store is scalarized722; because the stored type may required padding.723 724define void @irregular_type(ptr %a, i64 %n) {725; CHECK-LABEL: define void @irregular_type(726; CHECK-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {727; CHECK-NEXT: [[ENTRY:.*]]:728; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)729; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4730; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]731; CHECK: [[VECTOR_PH]]:732; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 4733; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]734; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]735; CHECK: [[VECTOR_BODY]]:736; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]737; CHECK-NEXT: [[INDEX:%.*]] = add i64 [[INDEX1]], 0738; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX1]], 1739; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDEX1]], 2740; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX1]], 3741; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[INDEX]]742; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[TMP1]]743; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[TMP5]]744; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[TMP3]]745; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP0]], align 16746; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP2]], align 16747; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP4]], align 16748; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP6]], align 16749; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX1]], 4750; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]751; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]752; CHECK: [[MIDDLE_BLOCK]]:753; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]754; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]755; CHECK: [[SCALAR_PH]]:756; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]757; CHECK-NEXT: br label %[[FOR_BODY:.*]]758; CHECK: [[FOR_BODY]]:759; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[I_NEXT:%.*]], %[[FOR_BODY]] ]760; CHECK-NEXT: [[UNNAMEDTMP0:%.*]] = sitofp i32 1 to x86_fp80761; CHECK-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[I]]762; CHECK-NEXT: store x86_fp80 [[UNNAMEDTMP0]], ptr [[UNNAMEDTMP1]], align 16763; CHECK-NEXT: [[I_NEXT]] = add i64 [[I]], 1764; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]765; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP13:![0-9]+]]766; CHECK: [[FOR_END]]:767; CHECK-NEXT: ret void768;769; INTER-LABEL: define void @irregular_type(770; INTER-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {771; INTER-NEXT: [[ENTRY:.*]]:772; INTER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)773; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4774; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]775; INTER: [[VECTOR_PH]]:776; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 4777; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]778; INTER-NEXT: br label %[[VECTOR_BODY:.*]]779; INTER: [[VECTOR_BODY]]:780; INTER-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]781; INTER-NEXT: [[INDEX:%.*]] = add i64 [[INDEX1]], 0782; INTER-NEXT: [[TMP1:%.*]] = add i64 [[INDEX1]], 1783; INTER-NEXT: [[TMP5:%.*]] = add i64 [[INDEX1]], 2784; INTER-NEXT: [[TMP3:%.*]] = add i64 [[INDEX1]], 3785; INTER-NEXT: [[TMP0:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[INDEX]]786; INTER-NEXT: [[TMP2:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[TMP1]]787; INTER-NEXT: [[TMP4:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[TMP5]]788; INTER-NEXT: [[TMP6:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[TMP3]]789; INTER-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP0]], align 16790; INTER-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP2]], align 16791; INTER-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP4]], align 16792; INTER-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP6]], align 16793; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX1]], 4794; INTER-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]795; INTER-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]796; INTER: [[MIDDLE_BLOCK]]:797; INTER-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]798; INTER-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]799; INTER: [[SCALAR_PH]]:800; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]801; INTER-NEXT: br label %[[FOR_BODY:.*]]802; INTER: [[FOR_BODY]]:803; INTER-NEXT: [[I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[I_NEXT:%.*]], %[[FOR_BODY]] ]804; INTER-NEXT: [[UNNAMEDTMP0:%.*]] = sitofp i32 1 to x86_fp80805; INTER-NEXT: [[UNNAMEDTMP1:%.*]] = getelementptr inbounds x86_fp80, ptr [[A]], i64 [[I]]806; INTER-NEXT: store x86_fp80 [[UNNAMEDTMP0]], ptr [[UNNAMEDTMP1]], align 16807; INTER-NEXT: [[I_NEXT]] = add i64 [[I]], 1808; INTER-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]809; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP13:![0-9]+]]810; INTER: [[FOR_END]]:811; INTER-NEXT: ret void812;813entry:814 br label %for.body815 816for.body:817 %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]818 %tmp0 = sitofp i32 1 to x86_fp80819 %tmp1 = getelementptr inbounds x86_fp80, ptr %a, i64 %i820 store x86_fp80 %tmp0, ptr %tmp1, align 16821 %i.next = add i64 %i, 1822 %cond = icmp slt i64 %i.next, %n823 br i1 %cond, label %for.body, label %for.end824 825for.end:826 ret void827}828 829; Check that a pointer induction variable is recognized as uniform and remains830; uniform after vectorization.831 832define void @pointer_iv_uniform(ptr %a, i32 %x, i64 %n) {833; CHECK-LABEL: define void @pointer_iv_uniform(834; CHECK-SAME: ptr [[A:%.*]], i32 [[X:%.*]], i64 [[N:%.*]]) {835; CHECK-NEXT: [[ENTRY:.*]]:836; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)837; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4838; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]839; CHECK: [[VECTOR_PH]]:840; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 4841; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]842; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[N_VEC]], 4843; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP0]]844; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[X]], i64 0845; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer846; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]847; CHECK: [[VECTOR_BODY]]:848; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]849; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4850; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFFSET_IDX]]851; CHECK-NEXT: store <4 x i32> [[BROADCAST_SPLAT]], ptr [[NEXT_GEP]], align 8852; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4853; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]854; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]855; CHECK: [[MIDDLE_BLOCK]]:856; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]857; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]858; CHECK: [[SCALAR_PH]]:859; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]860; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi ptr [ [[TMP1]], %[[MIDDLE_BLOCK]] ], [ [[A]], %[[ENTRY]] ]861; CHECK-NEXT: br label %[[FOR_BODY:.*]]862; CHECK: [[FOR_BODY]]:863; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]864; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[UNNAMEDTMP03:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ]865; CHECK-NEXT: store i32 [[X]], ptr [[P]], align 8866; CHECK-NEXT: [[UNNAMEDTMP03]] = getelementptr inbounds i32, ptr [[P]], i32 1867; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1868; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]869; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP15:![0-9]+]]870; CHECK: [[FOR_END]]:871; CHECK-NEXT: ret void872;873; INTER-LABEL: define void @pointer_iv_uniform(874; INTER-SAME: ptr [[A:%.*]], i32 [[X:%.*]], i64 [[N:%.*]]) {875; INTER-NEXT: [[ENTRY:.*]]:876; INTER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)877; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4878; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]879; INTER: [[VECTOR_PH]]:880; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 4881; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]882; INTER-NEXT: [[TMP0:%.*]] = mul i64 [[N_VEC]], 4883; INTER-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP0]]884; INTER-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[X]], i64 0885; INTER-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer886; INTER-NEXT: br label %[[VECTOR_BODY:.*]]887; INTER: [[VECTOR_BODY]]:888; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]889; INTER-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4890; INTER-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFFSET_IDX]]891; INTER-NEXT: store <4 x i32> [[BROADCAST_SPLAT]], ptr [[NEXT_GEP]], align 8892; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4893; INTER-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]894; INTER-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]895; INTER: [[MIDDLE_BLOCK]]:896; INTER-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]897; INTER-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]898; INTER: [[SCALAR_PH]]:899; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]900; INTER-NEXT: [[BC_RESUME_VAL1:%.*]] = phi ptr [ [[TMP1]], %[[MIDDLE_BLOCK]] ], [ [[A]], %[[ENTRY]] ]901; INTER-NEXT: br label %[[FOR_BODY:.*]]902; INTER: [[FOR_BODY]]:903; INTER-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]904; INTER-NEXT: [[P:%.*]] = phi ptr [ [[UNNAMEDTMP03:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ]905; INTER-NEXT: store i32 [[X]], ptr [[P]], align 8906; INTER-NEXT: [[UNNAMEDTMP03]] = getelementptr inbounds i32, ptr [[P]], i32 1907; INTER-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1908; INTER-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]909; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP15:![0-9]+]]910; INTER: [[FOR_END]]:911; INTER-NEXT: ret void912;913entry:914 br label %for.body915 916for.body:917 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]918 %p = phi ptr [ %tmp03, %for.body ], [ %a, %entry ]919 store i32 %x, ptr %p, align 8920 %tmp03 = getelementptr inbounds i32, ptr %p, i32 1921 %i.next = add nuw nsw i64 %i, 1922 %cond = icmp slt i64 %i.next, %n923 br i1 %cond, label %for.body, label %for.end924 925for.end:926 ret void927}928 929; Check that a pointer induction variable with a non-uniform user is not930; recognized as uniform and is not uniform after vectorization. The pointer931; induction variable is used by getelementptr instructions that are non-uniform932; due to scalarization of the stores.933 934define void @pointer_iv_non_uniform_0(ptr %a, i64 %n) {935; CHECK-LABEL: define void @pointer_iv_non_uniform_0(936; CHECK-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {937; CHECK-NEXT: [[ENTRY:.*]]:938; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)939; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4940; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]941; CHECK: [[VECTOR_PH]]:942; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 4943; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]944; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[N_VEC]], 16945; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP0]]946; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]947; CHECK: [[VECTOR_BODY]]:948; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]949; CHECK-NEXT: [[OFFSET_IDX1:%.*]] = mul i64 [[INDEX]], 16950; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[OFFSET_IDX1]], 0951; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[OFFSET_IDX1]], 16952; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[OFFSET_IDX1]], 32953; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[OFFSET_IDX1]], 48954; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFFSET_IDX]]955; CHECK-NEXT: [[NEXT_GEP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]956; CHECK-NEXT: [[NEXT_GEP2:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP4]]957; CHECK-NEXT: [[NEXT_GEP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP9]]958; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[NEXT_GEP]], align 8959; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[NEXT_GEP1]], align 8960; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[NEXT_GEP2]], align 8961; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[NEXT_GEP3]], align 8962; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> poison, i32 [[TMP5]], i32 0963; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP6]], i32 1964; CHECK-NEXT: [[TMP21:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP7]], i32 2965; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP21]], i32 [[TMP8]], i32 3966; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP]], i32 1967; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP1]], i32 1968; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP2]], i32 1969; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP3]], i32 1970; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP13]], align 8971; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP14]], align 8972; CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP15]], align 8973; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP16]], align 8974; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> poison, i32 [[TMP17]], i32 0975; CHECK-NEXT: [[TMP23:%.*]] = insertelement <4 x i32> [[TMP22]], i32 [[TMP18]], i32 1976; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP23]], i32 [[TMP19]], i32 2977; CHECK-NEXT: [[TMP40:%.*]] = insertelement <4 x i32> [[TMP37]], i32 [[TMP20]], i32 3978; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP]], i32 4979; CHECK-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP1]], i32 4980; CHECK-NEXT: [[TMP43:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP2]], i32 4981; CHECK-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP3]], i32 4982; CHECK-NEXT: [[TMP45:%.*]] = load i32, ptr [[TMP41]], align 8983; CHECK-NEXT: [[TMP46:%.*]] = load i32, ptr [[TMP42]], align 8984; CHECK-NEXT: [[TMP47:%.*]] = load i32, ptr [[TMP43]], align 8985; CHECK-NEXT: [[TMP56:%.*]] = load i32, ptr [[TMP44]], align 8986; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> poison, i32 [[TMP45]], i32 0987; CHECK-NEXT: [[TMP35:%.*]] = insertelement <4 x i32> [[TMP34]], i32 [[TMP46]], i32 1988; CHECK-NEXT: [[TMP36:%.*]] = insertelement <4 x i32> [[TMP35]], i32 [[TMP47]], i32 2989; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP36]], i32 [[TMP56]], i32 3990; CHECK-NEXT: [[TMP25:%.*]] = sub <4 x i32> [[TMP24]], [[TMP12]]991; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[TMP25]], i32 0992; CHECK-NEXT: [[TMP31:%.*]] = extractelement <4 x i32> [[TMP25]], i32 1993; CHECK-NEXT: [[TMP32:%.*]] = extractelement <4 x i32> [[TMP25]], i32 2994; CHECK-NEXT: [[TMP33:%.*]] = extractelement <4 x i32> [[TMP25]], i32 3995; CHECK-NEXT: [[TMP39:%.*]] = sub <4 x i32> [[TMP40]], [[TMP40]]996; CHECK-NEXT: [[TMP52:%.*]] = extractelement <4 x i32> [[TMP39]], i32 0997; CHECK-NEXT: [[TMP53:%.*]] = extractelement <4 x i32> [[TMP39]], i32 1998; CHECK-NEXT: [[TMP54:%.*]] = extractelement <4 x i32> [[TMP39]], i32 2999; CHECK-NEXT: [[TMP55:%.*]] = extractelement <4 x i32> [[TMP39]], i32 31000; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP]], i32 21001; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP1]], i32 21002; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP2]], i32 21003; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP3]], i32 21004; CHECK-NEXT: store i32 [[TMP30]], ptr [[TMP26]], align 81005; CHECK-NEXT: store i32 [[TMP31]], ptr [[TMP27]], align 81006; CHECK-NEXT: store i32 [[TMP32]], ptr [[TMP28]], align 81007; CHECK-NEXT: store i32 [[TMP33]], ptr [[TMP29]], align 81008; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP]], i32 31009; CHECK-NEXT: [[TMP49:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP1]], i32 31010; CHECK-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP2]], i32 31011; CHECK-NEXT: [[TMP51:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP3]], i32 31012; CHECK-NEXT: store i32 [[TMP52]], ptr [[TMP48]], align 81013; CHECK-NEXT: store i32 [[TMP53]], ptr [[TMP49]], align 81014; CHECK-NEXT: store i32 [[TMP54]], ptr [[TMP50]], align 81015; CHECK-NEXT: store i32 [[TMP55]], ptr [[TMP51]], align 81016; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41017; CHECK-NEXT: [[TMP38:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1018; CHECK-NEXT: br i1 [[TMP38]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]1019; CHECK: [[MIDDLE_BLOCK]]:1020; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]1021; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]1022; CHECK: [[SCALAR_PH]]:1023; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]1024; CHECK-NEXT: [[BC_RESUME_VAL4:%.*]] = phi ptr [ [[TMP1]], %[[MIDDLE_BLOCK]] ], [ [[A]], %[[ENTRY]] ]1025; CHECK-NEXT: br label %[[FOR_BODY:.*]]1026; CHECK: [[FOR_BODY]]:1027; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]1028; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[UNNAMEDTMP3:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL4]], %[[SCALAR_PH]] ]1029; CHECK-NEXT: [[UNNAMEDTMP00:%.*]] = load i32, ptr [[P]], align 81030; CHECK-NEXT: [[UNNAMEDTMP03:%.*]] = getelementptr inbounds i32, ptr [[P]], i32 11031; CHECK-NEXT: [[UNNAMEDTMP04:%.*]] = load i32, ptr [[UNNAMEDTMP03]], align 81032; CHECK-NEXT: [[UNNAMEDTMP3]] = getelementptr inbounds i32, ptr [[P]], i32 41033; CHECK-NEXT: [[UNNAMEDTMP4:%.*]] = load i32, ptr [[UNNAMEDTMP3]], align 81034; CHECK-NEXT: [[UNNAMEDTMP05:%.*]] = getelementptr inbounds i32, ptr [[P]], i32 51035; CHECK-NEXT: [[UNNAMEDTMP06:%.*]] = load i32, ptr [[UNNAMEDTMP05]], align 81036; CHECK-NEXT: [[UNNAMEDTMP07:%.*]] = sub i32 [[UNNAMEDTMP4]], [[UNNAMEDTMP00]]1037; CHECK-NEXT: [[UNNAMEDTMP08:%.*]] = sub i32 [[UNNAMEDTMP04]], [[UNNAMEDTMP04]]1038; CHECK-NEXT: [[UNNAMEDTMP09:%.*]] = getelementptr inbounds i32, ptr [[P]], i32 21039; CHECK-NEXT: store i32 [[UNNAMEDTMP07]], ptr [[UNNAMEDTMP09]], align 81040; CHECK-NEXT: [[UNNAMEDTMP10:%.*]] = getelementptr inbounds i32, ptr [[P]], i32 31041; CHECK-NEXT: store i32 [[UNNAMEDTMP08]], ptr [[UNNAMEDTMP10]], align 81042; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 11043; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]1044; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP17:![0-9]+]]1045; CHECK: [[FOR_END]]:1046; CHECK-NEXT: ret void1047;1048; INTER-LABEL: define void @pointer_iv_non_uniform_0(1049; INTER-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {1050; INTER-NEXT: [[ENTRY:.*]]:1051; INTER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1052; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i64 [[SMAX]], 41053; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]1054; INTER: [[VECTOR_PH]]:1055; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 41056; INTER-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 01057; INTER-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 4, i64 [[N_MOD_VF]]1058; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[TMP1]]1059; INTER-NEXT: [[TMP2:%.*]] = mul i64 [[N_VEC]], 161060; INTER-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP2]]1061; INTER-NEXT: br label %[[VECTOR_BODY:.*]]1062; INTER: [[VECTOR_BODY]]:1063; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1064; INTER-NEXT: [[OFFSET_IDX1:%.*]] = mul i64 [[INDEX]], 161065; INTER-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[OFFSET_IDX1]], 01066; INTER-NEXT: [[TMP5:%.*]] = add i64 [[OFFSET_IDX1]], 161067; INTER-NEXT: [[TMP6:%.*]] = add i64 [[OFFSET_IDX1]], 321068; INTER-NEXT: [[TMP8:%.*]] = add i64 [[OFFSET_IDX1]], 481069; INTER-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFFSET_IDX]]1070; INTER-NEXT: [[NEXT_GEP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]1071; INTER-NEXT: [[NEXT_GEP2:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP6]]1072; INTER-NEXT: [[NEXT_GEP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP8]]1073; INTER-NEXT: [[WIDE_VEC:%.*]] = load <16 x i32>, ptr [[NEXT_GEP]], align 81074; INTER-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i32> [[WIDE_VEC]], <16 x i32> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>1075; INTER-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <16 x i32> [[WIDE_VEC]], <16 x i32> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>1076; INTER-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP]], i32 41077; INTER-NEXT: [[WIDE_VEC5:%.*]] = load <16 x i32>, ptr [[TMP7]], align 81078; INTER-NEXT: [[STRIDED_VEC6:%.*]] = shufflevector <16 x i32> [[WIDE_VEC5]], <16 x i32> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>1079; INTER-NEXT: [[STRIDED_VEC7:%.*]] = shufflevector <16 x i32> [[WIDE_VEC5]], <16 x i32> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>1080; INTER-NEXT: [[TMP17:%.*]] = sub <4 x i32> [[STRIDED_VEC6]], [[STRIDED_VEC]]1081; INTER-NEXT: [[TMP13:%.*]] = extractelement <4 x i32> [[TMP17]], i32 01082; INTER-NEXT: [[TMP14:%.*]] = extractelement <4 x i32> [[TMP17]], i32 11083; INTER-NEXT: [[TMP15:%.*]] = extractelement <4 x i32> [[TMP17]], i32 21084; INTER-NEXT: [[TMP16:%.*]] = extractelement <4 x i32> [[TMP17]], i32 31085; INTER-NEXT: [[TMP18:%.*]] = sub <4 x i32> [[STRIDED_VEC4]], [[STRIDED_VEC4]]1086; INTER-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[TMP18]], i32 01087; INTER-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[TMP18]], i32 11088; INTER-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[TMP18]], i32 21089; INTER-NEXT: [[TMP26:%.*]] = extractelement <4 x i32> [[TMP18]], i32 31090; INTER-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP]], i32 21091; INTER-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP1]], i32 21092; INTER-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP2]], i32 21093; INTER-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP3]], i32 21094; INTER-NEXT: store i32 [[TMP13]], ptr [[TMP9]], align 81095; INTER-NEXT: store i32 [[TMP14]], ptr [[TMP10]], align 81096; INTER-NEXT: store i32 [[TMP15]], ptr [[TMP11]], align 81097; INTER-NEXT: store i32 [[TMP16]], ptr [[TMP12]], align 81098; INTER-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP]], i32 31099; INTER-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP1]], i32 31100; INTER-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP2]], i32 31101; INTER-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[NEXT_GEP3]], i32 31102; INTER-NEXT: store i32 [[TMP23]], ptr [[TMP19]], align 81103; INTER-NEXT: store i32 [[TMP24]], ptr [[TMP20]], align 81104; INTER-NEXT: store i32 [[TMP25]], ptr [[TMP27]], align 81105; INTER-NEXT: store i32 [[TMP26]], ptr [[TMP22]], align 81106; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41107; INTER-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1108; INTER-NEXT: br i1 [[TMP21]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]1109; INTER: [[MIDDLE_BLOCK]]:1110; INTER-NEXT: br label %[[SCALAR_PH]]1111; INTER: [[SCALAR_PH]]:1112; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]1113; INTER-NEXT: [[BC_RESUME_VAL8:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[A]], %[[ENTRY]] ]1114; INTER-NEXT: br label %[[FOR_BODY:.*]]1115; INTER: [[FOR_BODY]]:1116; INTER-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]1117; INTER-NEXT: [[P:%.*]] = phi ptr [ [[UNNAMEDTMP3:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL8]], %[[SCALAR_PH]] ]1118; INTER-NEXT: [[UNNAMEDTMP00:%.*]] = load i32, ptr [[P]], align 81119; INTER-NEXT: [[UNNAMEDTMP03:%.*]] = getelementptr inbounds i32, ptr [[P]], i32 11120; INTER-NEXT: [[UNNAMEDTMP04:%.*]] = load i32, ptr [[UNNAMEDTMP03]], align 81121; INTER-NEXT: [[UNNAMEDTMP3]] = getelementptr inbounds i32, ptr [[P]], i32 41122; INTER-NEXT: [[UNNAMEDTMP4:%.*]] = load i32, ptr [[UNNAMEDTMP3]], align 81123; INTER-NEXT: [[UNNAMEDTMP05:%.*]] = getelementptr inbounds i32, ptr [[P]], i32 51124; INTER-NEXT: [[UNNAMEDTMP06:%.*]] = load i32, ptr [[UNNAMEDTMP05]], align 81125; INTER-NEXT: [[UNNAMEDTMP07:%.*]] = sub i32 [[UNNAMEDTMP4]], [[UNNAMEDTMP00]]1126; INTER-NEXT: [[UNNAMEDTMP08:%.*]] = sub i32 [[UNNAMEDTMP04]], [[UNNAMEDTMP04]]1127; INTER-NEXT: [[UNNAMEDTMP09:%.*]] = getelementptr inbounds i32, ptr [[P]], i32 21128; INTER-NEXT: store i32 [[UNNAMEDTMP07]], ptr [[UNNAMEDTMP09]], align 81129; INTER-NEXT: [[UNNAMEDTMP10:%.*]] = getelementptr inbounds i32, ptr [[P]], i32 31130; INTER-NEXT: store i32 [[UNNAMEDTMP08]], ptr [[UNNAMEDTMP10]], align 81131; INTER-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 11132; INTER-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]1133; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END:.*]], !llvm.loop [[LOOP17:![0-9]+]]1134; INTER: [[FOR_END]]:1135; INTER-NEXT: ret void1136;1137entry:1138 br label %for.body1139 1140for.body:1141 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]1142 %p = phi ptr [ %tmp03, %for.body ], [ %a, %entry ]1143 %tmp00 = load i32, ptr %p, align 81144 %tmp01 = getelementptr inbounds i32, ptr %p, i32 11145 %tmp02 = load i32, ptr %tmp01, align 81146 %tmp03 = getelementptr inbounds i32, ptr %p, i32 41147 %tmp04 = load i32, ptr %tmp03, align 81148 %tmp05 = getelementptr inbounds i32, ptr %p, i32 51149 %tmp06 = load i32, ptr %tmp05, align 81150 %tmp07 = sub i32 %tmp04, %tmp001151 %tmp08 = sub i32 %tmp02, %tmp021152 %tmp09 = getelementptr inbounds i32, ptr %p, i32 21153 store i32 %tmp07, ptr %tmp09, align 81154 %tmp10 = getelementptr inbounds i32, ptr %p, i32 31155 store i32 %tmp08, ptr %tmp10, align 81156 %i.next = add nuw nsw i64 %i, 11157 %cond = icmp slt i64 %i.next, %n1158 br i1 %cond, label %for.body, label %for.end1159 1160for.end:1161 ret void1162}1163 1164; Check that a pointer induction variable with a non-uniform user is not1165; recognized as uniform and is not uniform after vectorization. The pointer1166; induction variable is used by a store that will be scalarized.1167 1168define void @pointer_iv_non_uniform_1(ptr %a, i64 %n) {1169; CHECK-LABEL: define void @pointer_iv_non_uniform_1(1170; CHECK-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {1171; CHECK-NEXT: [[ENTRY:.*]]:1172; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1173; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 41174; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]1175; CHECK: [[VECTOR_PH]]:1176; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 41177; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]1178; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[N_VEC]], 161179; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP0]]1180; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]1181; CHECK: [[VECTOR_BODY]]:1182; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1183; CHECK-NEXT: [[OFFSET_IDX1:%.*]] = mul i64 [[INDEX]], 161184; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[OFFSET_IDX1]], 01185; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[OFFSET_IDX1]], 161186; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[OFFSET_IDX1]], 321187; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[OFFSET_IDX1]], 481188; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFFSET_IDX]]1189; CHECK-NEXT: [[NEXT_GEP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]1190; CHECK-NEXT: [[NEXT_GEP2:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP4]]1191; CHECK-NEXT: [[NEXT_GEP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP6]]1192; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[NEXT_GEP]], align 161193; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[NEXT_GEP1]], align 161194; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[NEXT_GEP2]], align 161195; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[NEXT_GEP3]], align 161196; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41197; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1198; CHECK-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]1199; CHECK: [[MIDDLE_BLOCK]]:1200; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]1201; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]1202; CHECK: [[SCALAR_PH]]:1203; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]1204; CHECK-NEXT: [[BC_RESUME_VAL4:%.*]] = phi ptr [ [[TMP1]], %[[MIDDLE_BLOCK]] ], [ [[A]], %[[ENTRY]] ]1205; CHECK-NEXT: br label %[[FOR_BODY:.*]]1206; CHECK: [[FOR_BODY]]:1207; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]1208; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[UNNAMEDTMP1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL4]], %[[SCALAR_PH]] ]1209; CHECK-NEXT: [[UNNAMEDTMP0:%.*]] = sitofp i32 1 to x86_fp801210; CHECK-NEXT: store x86_fp80 [[UNNAMEDTMP0]], ptr [[P]], align 161211; CHECK-NEXT: [[UNNAMEDTMP1]] = getelementptr inbounds x86_fp80, ptr [[P]], i32 11212; CHECK-NEXT: [[I_NEXT]] = add i64 [[I]], 11213; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]1214; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP19:![0-9]+]]1215; CHECK: [[FOR_END]]:1216; CHECK-NEXT: ret void1217;1218; INTER-LABEL: define void @pointer_iv_non_uniform_1(1219; INTER-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {1220; INTER-NEXT: [[ENTRY:.*]]:1221; INTER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1222; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 41223; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]1224; INTER: [[VECTOR_PH]]:1225; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 41226; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]1227; INTER-NEXT: [[TMP0:%.*]] = mul i64 [[N_VEC]], 161228; INTER-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP0]]1229; INTER-NEXT: br label %[[VECTOR_BODY:.*]]1230; INTER: [[VECTOR_BODY]]:1231; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1232; INTER-NEXT: [[OFFSET_IDX1:%.*]] = mul i64 [[INDEX]], 161233; INTER-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[OFFSET_IDX1]], 01234; INTER-NEXT: [[TMP3:%.*]] = add i64 [[OFFSET_IDX1]], 161235; INTER-NEXT: [[TMP4:%.*]] = add i64 [[OFFSET_IDX1]], 321236; INTER-NEXT: [[TMP6:%.*]] = add i64 [[OFFSET_IDX1]], 481237; INTER-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFFSET_IDX]]1238; INTER-NEXT: [[NEXT_GEP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]1239; INTER-NEXT: [[NEXT_GEP2:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP4]]1240; INTER-NEXT: [[NEXT_GEP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP6]]1241; INTER-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[NEXT_GEP]], align 161242; INTER-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[NEXT_GEP1]], align 161243; INTER-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[NEXT_GEP2]], align 161244; INTER-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[NEXT_GEP3]], align 161245; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41246; INTER-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1247; INTER-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]1248; INTER: [[MIDDLE_BLOCK]]:1249; INTER-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]1250; INTER-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]1251; INTER: [[SCALAR_PH]]:1252; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]1253; INTER-NEXT: [[BC_RESUME_VAL4:%.*]] = phi ptr [ [[TMP1]], %[[MIDDLE_BLOCK]] ], [ [[A]], %[[ENTRY]] ]1254; INTER-NEXT: br label %[[FOR_BODY:.*]]1255; INTER: [[FOR_BODY]]:1256; INTER-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]1257; INTER-NEXT: [[P:%.*]] = phi ptr [ [[UNNAMEDTMP1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL4]], %[[SCALAR_PH]] ]1258; INTER-NEXT: [[UNNAMEDTMP0:%.*]] = sitofp i32 1 to x86_fp801259; INTER-NEXT: store x86_fp80 [[UNNAMEDTMP0]], ptr [[P]], align 161260; INTER-NEXT: [[UNNAMEDTMP1]] = getelementptr inbounds x86_fp80, ptr [[P]], i32 11261; INTER-NEXT: [[I_NEXT]] = add i64 [[I]], 11262; INTER-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]1263; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP19:![0-9]+]]1264; INTER: [[FOR_END]]:1265; INTER-NEXT: ret void1266;1267entry:1268 br label %for.body1269 1270for.body:1271 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]1272 %p = phi ptr [%tmp1, %for.body], [%a, %entry]1273 %tmp0 = sitofp i32 1 to x86_fp801274 store x86_fp80 %tmp0, ptr %p, align 161275 %tmp1 = getelementptr inbounds x86_fp80, ptr %p, i32 11276 %i.next = add i64 %i, 11277 %cond = icmp slt i64 %i.next, %n1278 br i1 %cond, label %for.body, label %for.end1279 1280for.end:1281 ret void1282}1283 1284; Check multiple pointer induction variables where only one is recognized as1285; uniform and remains uniform after vectorization. The other pointer induction1286; variable is not recognized as uniform and is not uniform after vectorization1287; because it is stored to memory.1288 1289define i32 @pointer_iv_mixed(ptr %a, ptr %b, i64 %n) {1290; CHECK-LABEL: define i32 @pointer_iv_mixed(1291; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) {1292; CHECK-NEXT: [[ENTRY:.*]]:1293; CHECK-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1294; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX2]], 41295; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]1296; CHECK: [[VECTOR_MEMCHECK]]:1297; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1298; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[SMAX]], 31299; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP0]]1300; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[SMAX]], 21301; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP1]]1302; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP1]]1303; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]1304; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]1305; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]1306; CHECK: [[VECTOR_PH]]:1307; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX2]], 41308; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX2]], [[N_MOD_VF]]1309; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[N_VEC]], 41310; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP2]]1311; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[N_VEC]], 81312; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP4]]1313; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]1314; CHECK: [[VECTOR_BODY]]:1315; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1316; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[A]], %[[VECTOR_PH]] ], [ [[PTR_IND:%.*]], %[[VECTOR_BODY]] ]1317; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ]1318; CHECK-NEXT: [[VECTOR_GEP:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> <i64 0, i64 4, i64 8, i64 12>1319; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x ptr> [[VECTOR_GEP]], i32 01320; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 81321; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[OFFSET_IDX]]1322; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP6]], align 8, !alias.scope [[META20:![0-9]+]]1323; CHECK-NEXT: [[TMP7]] = add <4 x i32> [[WIDE_LOAD]], [[VEC_PHI]]1324; CHECK-NEXT: store <4 x ptr> [[VECTOR_GEP]], ptr [[NEXT_GEP]], align 8, !alias.scope [[META23:![0-9]+]], !noalias [[META20]]1325; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41326; CHECK-NEXT: [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i64 161327; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1328; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]1329; CHECK: [[MIDDLE_BLOCK]]:1330; CHECK-NEXT: [[TMP9:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP7]])1331; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX2]], [[N_VEC]]1332; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]1333; CHECK: [[SCALAR_PH]]:1334; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]1335; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[A]], %[[ENTRY]] ], [ [[A]], %[[VECTOR_MEMCHECK]] ]1336; CHECK-NEXT: [[BC_RESUME_VAL4:%.*]] = phi ptr [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[B]], %[[ENTRY]] ], [ [[B]], %[[VECTOR_MEMCHECK]] ]1337; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP9]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]1338; CHECK-NEXT: br label %[[FOR_BODY:.*]]1339; CHECK: [[FOR_BODY]]:1340; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]1341; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[UNNAMEDTMP3:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ]1342; CHECK-NEXT: [[Q:%.*]] = phi ptr [ [[UNNAMEDTMP4:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL4]], %[[SCALAR_PH]] ]1343; CHECK-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP2:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]1344; CHECK-NEXT: [[UNNAMEDTMP1:%.*]] = load i32, ptr [[P]], align 81345; CHECK-NEXT: [[UNNAMEDTMP2]] = add i32 [[UNNAMEDTMP1]], [[UNNAMEDTMP0]]1346; CHECK-NEXT: store ptr [[P]], ptr [[Q]], align 81347; CHECK-NEXT: [[UNNAMEDTMP3]] = getelementptr inbounds i32, ptr [[P]], i32 11348; CHECK-NEXT: [[UNNAMEDTMP4]] = getelementptr inbounds ptr, ptr [[Q]], i32 11349; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 11350; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]1351; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP26:![0-9]+]]1352; CHECK: [[FOR_END]]:1353; CHECK-NEXT: [[UNNAMEDTMP5:%.*]] = phi i32 [ [[UNNAMEDTMP2]], %[[FOR_BODY]] ], [ [[TMP9]], %[[MIDDLE_BLOCK]] ]1354; CHECK-NEXT: ret i32 [[UNNAMEDTMP5]]1355;1356; INTER-LABEL: define i32 @pointer_iv_mixed(1357; INTER-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) {1358; INTER-NEXT: [[ENTRY:.*]]:1359; INTER-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1360; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX2]], 41361; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]1362; INTER: [[VECTOR_MEMCHECK]]:1363; INTER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1364; INTER-NEXT: [[TMP0:%.*]] = shl i64 [[SMAX]], 31365; INTER-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP0]]1366; INTER-NEXT: [[TMP1:%.*]] = shl i64 [[SMAX]], 21367; INTER-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP1]]1368; INTER-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP1]]1369; INTER-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]1370; INTER-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]1371; INTER-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]1372; INTER: [[VECTOR_PH]]:1373; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX2]], 41374; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX2]], [[N_MOD_VF]]1375; INTER-NEXT: [[TMP2:%.*]] = mul i64 [[N_VEC]], 41376; INTER-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP2]]1377; INTER-NEXT: [[TMP4:%.*]] = mul i64 [[N_VEC]], 81378; INTER-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP4]]1379; INTER-NEXT: br label %[[VECTOR_BODY:.*]]1380; INTER: [[VECTOR_BODY]]:1381; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1382; INTER-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[A]], %[[VECTOR_PH]] ], [ [[PTR_IND:%.*]], %[[VECTOR_BODY]] ]1383; INTER-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ]1384; INTER-NEXT: [[VECTOR_GEP:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> <i64 0, i64 4, i64 8, i64 12>1385; INTER-NEXT: [[TMP6:%.*]] = extractelement <4 x ptr> [[VECTOR_GEP]], i32 01386; INTER-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 81387; INTER-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[OFFSET_IDX]]1388; INTER-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP6]], align 8, !alias.scope [[META20:![0-9]+]]1389; INTER-NEXT: [[TMP7]] = add <4 x i32> [[WIDE_LOAD]], [[VEC_PHI]]1390; INTER-NEXT: store <4 x ptr> [[VECTOR_GEP]], ptr [[NEXT_GEP]], align 8, !alias.scope [[META23:![0-9]+]], !noalias [[META20]]1391; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41392; INTER-NEXT: [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i64 161393; INTER-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1394; INTER-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]1395; INTER: [[MIDDLE_BLOCK]]:1396; INTER-NEXT: [[TMP9:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP7]])1397; INTER-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX2]], [[N_VEC]]1398; INTER-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]1399; INTER: [[SCALAR_PH]]:1400; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]1401; INTER-NEXT: [[BC_RESUME_VAL3:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[A]], %[[ENTRY]] ], [ [[A]], %[[VECTOR_MEMCHECK]] ]1402; INTER-NEXT: [[BC_RESUME_VAL4:%.*]] = phi ptr [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[B]], %[[ENTRY]] ], [ [[B]], %[[VECTOR_MEMCHECK]] ]1403; INTER-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP9]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]1404; INTER-NEXT: br label %[[FOR_BODY:.*]]1405; INTER: [[FOR_BODY]]:1406; INTER-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]1407; INTER-NEXT: [[P:%.*]] = phi ptr [ [[UNNAMEDTMP3:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ]1408; INTER-NEXT: [[Q:%.*]] = phi ptr [ [[UNNAMEDTMP4:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL4]], %[[SCALAR_PH]] ]1409; INTER-NEXT: [[UNNAMEDTMP0:%.*]] = phi i32 [ [[UNNAMEDTMP2:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]1410; INTER-NEXT: [[UNNAMEDTMP1:%.*]] = load i32, ptr [[P]], align 81411; INTER-NEXT: [[UNNAMEDTMP2]] = add i32 [[UNNAMEDTMP1]], [[UNNAMEDTMP0]]1412; INTER-NEXT: store ptr [[P]], ptr [[Q]], align 81413; INTER-NEXT: [[UNNAMEDTMP3]] = getelementptr inbounds i32, ptr [[P]], i32 11414; INTER-NEXT: [[UNNAMEDTMP4]] = getelementptr inbounds ptr, ptr [[Q]], i32 11415; INTER-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 11416; INTER-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]1417; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP26:![0-9]+]]1418; INTER: [[FOR_END]]:1419; INTER-NEXT: [[UNNAMEDTMP5:%.*]] = phi i32 [ [[UNNAMEDTMP2]], %[[FOR_BODY]] ], [ [[TMP9]], %[[MIDDLE_BLOCK]] ]1420; INTER-NEXT: ret i32 [[UNNAMEDTMP5]]1421;1422entry:1423 br label %for.body1424 1425for.body:1426 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]1427 %p = phi ptr [ %tmp3, %for.body ], [ %a, %entry ]1428 %q = phi ptr [ %tmp4, %for.body ], [ %b, %entry ]1429 %tmp0 = phi i32 [ %tmp2, %for.body ], [ 0, %entry ]1430 %tmp1 = load i32, ptr %p, align 81431 %tmp2 = add i32 %tmp1, %tmp01432 store ptr %p, ptr %q, align 81433 %tmp3 = getelementptr inbounds i32, ptr %p, i32 11434 %tmp4 = getelementptr inbounds ptr, ptr %q, i32 11435 %i.next = add nuw nsw i64 %i, 11436 %cond = icmp slt i64 %i.next, %n1437 br i1 %cond, label %for.body, label %for.end1438 1439for.end:1440 %tmp5 = phi i32 [ %tmp2, %for.body ]1441 ret i32 %tmp51442}1443 1444; Check that a pointer operand having a user other than a memory access is1445; recognized as uniform after vectorization. In this test case, %tmp0 is a1446; GEP that is used by a load and a getelementptr instruction (%tmp2). Once1447; %tmp2 is marked uniform, %tmp0 should be marked uniform as well.1448 1449define void @pointer_operand_geps_with_different_indexed_types(ptr %A, ptr %B, i64 %n) {1450; CHECK-LABEL: define void @pointer_operand_geps_with_different_indexed_types(1451; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) {1452; CHECK-NEXT: [[ENTRY:.*]]:1453; CHECK-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1454; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX2]], 41455; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]1456; CHECK: [[VECTOR_MEMCHECK]]:1457; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1458; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[SMAX]]1459; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[SMAX]], 31460; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[TMP6]], -41461; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP0]]1462; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[TMP1]]1463; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]1464; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]1465; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]1466; CHECK: [[VECTOR_PH]]:1467; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX2]], 41468; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX2]], [[N_MOD_VF]]1469; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]1470; CHECK: [[VECTOR_BODY]]:1471; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1472; CHECK-NEXT: [[INDEX:%.*]] = add i64 [[INDEX1]], 01473; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX1]], 11474; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[INDEX1]], 21475; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDEX1]], 31476; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[INDEX]]1477; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[TMP3]]1478; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[TMP4]]1479; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[TMP5]]1480; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 31481; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[TMP7]], i64 31482; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr [[TMP8]], i64 31483; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[TMP9]], i64 31484; CHECK-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP10]], align 1, !alias.scope [[META27:![0-9]+]]1485; CHECK-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP11]], align 1, !alias.scope [[META27]]1486; CHECK-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP12]], align 1, !alias.scope [[META27]]1487; CHECK-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP13]], align 1, !alias.scope [[META27]]1488; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i8> poison, i8 [[TMP14]], i32 01489; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i8> [[TMP18]], i8 [[TMP15]], i32 11490; CHECK-NEXT: [[TMP21:%.*]] = insertelement <4 x i8> [[TMP19]], i8 [[TMP16]], i32 21491; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i8> [[TMP21]], i8 [[TMP17]], i32 31492; CHECK-NEXT: [[TMP22:%.*]] = load i8, ptr [[TMP2]], align 1, !alias.scope [[META27]]1493; CHECK-NEXT: [[TMP23:%.*]] = load i8, ptr [[TMP7]], align 1, !alias.scope [[META27]]1494; CHECK-NEXT: [[TMP24:%.*]] = load i8, ptr [[TMP8]], align 1, !alias.scope [[META27]]1495; CHECK-NEXT: [[TMP25:%.*]] = load i8, ptr [[TMP9]], align 1, !alias.scope [[META27]]1496; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x i8> poison, i8 [[TMP22]], i32 01497; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i8> [[TMP26]], i8 [[TMP23]], i32 11498; CHECK-NEXT: [[TMP32:%.*]] = insertelement <4 x i8> [[TMP27]], i8 [[TMP24]], i32 21499; CHECK-NEXT: [[TMP28:%.*]] = insertelement <4 x i8> [[TMP32]], i8 [[TMP25]], i32 31500; CHECK-NEXT: [[TMP29:%.*]] = xor <4 x i8> [[TMP20]], [[TMP28]]1501; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]]1502; CHECK-NEXT: store <4 x i8> [[TMP29]], ptr [[TMP30]], align 1, !alias.scope [[META30:![0-9]+]], !noalias [[META27]]1503; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX1]], 41504; CHECK-NEXT: [[TMP31:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1505; CHECK-NEXT: br i1 [[TMP31]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]]1506; CHECK: [[MIDDLE_BLOCK]]:1507; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX2]], [[N_VEC]]1508; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]1509; CHECK: [[SCALAR_PH]]:1510; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]1511; CHECK-NEXT: br label %[[FOR_BODY:.*]]1512; CHECK: [[FOR_BODY]]:1513; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[I_NEXT:%.*]], %[[FOR_BODY]] ]1514; CHECK-NEXT: [[UNNAMEDTMP0:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[I]]1515; CHECK-NEXT: [[UNNAMEDTMP2:%.*]] = getelementptr inbounds i8, ptr [[UNNAMEDTMP0]], i64 31516; CHECK-NEXT: [[UNNAMEDTMP3:%.*]] = load i8, ptr [[UNNAMEDTMP2]], align 11517; CHECK-NEXT: [[UNNAMEDTMP4:%.*]] = load i8, ptr [[UNNAMEDTMP0]], align 11518; CHECK-NEXT: [[UNNAMEDTMP5:%.*]] = xor i8 [[UNNAMEDTMP3]], [[UNNAMEDTMP4]]1519; CHECK-NEXT: [[UNNAMEDTMP6:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[I]]1520; CHECK-NEXT: store i8 [[UNNAMEDTMP5]], ptr [[UNNAMEDTMP6]], align 11521; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 11522; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]1523; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP33:![0-9]+]]1524; CHECK: [[FOR_END]]:1525; CHECK-NEXT: ret void1526;1527; INTER-LABEL: define void @pointer_operand_geps_with_different_indexed_types(1528; INTER-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) {1529; INTER-NEXT: [[ENTRY:.*]]:1530; INTER-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1531; INTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i64 [[SMAX2]], 41532; INTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]1533; INTER: [[VECTOR_MEMCHECK]]:1534; INTER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)1535; INTER-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[SMAX]]1536; INTER-NEXT: [[TMP8:%.*]] = shl i64 [[SMAX]], 31537; INTER-NEXT: [[TMP0:%.*]] = add i64 [[TMP8]], -41538; INTER-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP0]]1539; INTER-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[TMP1]]1540; INTER-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]1541; INTER-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]1542; INTER-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]1543; INTER: [[VECTOR_PH]]:1544; INTER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX2]], 41545; INTER-NEXT: [[TMP2:%.*]] = icmp eq i64 [[N_MOD_VF]], 01546; INTER-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i64 4, i64 [[N_MOD_VF]]1547; INTER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX2]], [[TMP3]]1548; INTER-NEXT: br label %[[VECTOR_BODY:.*]]1549; INTER: [[VECTOR_BODY]]:1550; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1551; INTER-NEXT: [[TMP4:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[INDEX]]1552; INTER-NEXT: [[WIDE_VEC:%.*]] = load <32 x i8>, ptr [[TMP4]], align 1, !alias.scope [[META27:![0-9]+]]1553; INTER-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <32 x i8> [[WIDE_VEC]], <32 x i8> poison, <4 x i32> <i32 0, i32 8, i32 16, i32 24>1554; INTER-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <32 x i8> [[WIDE_VEC]], <32 x i8> poison, <4 x i32> <i32 3, i32 11, i32 19, i32 27>1555; INTER-NEXT: [[TMP5:%.*]] = xor <4 x i8> [[STRIDED_VEC3]], [[STRIDED_VEC]]1556; INTER-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]]1557; INTER-NEXT: store <4 x i8> [[TMP5]], ptr [[TMP6]], align 1, !alias.scope [[META30:![0-9]+]], !noalias [[META27]]1558; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41559; INTER-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1560; INTER-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]]1561; INTER: [[MIDDLE_BLOCK]]:1562; INTER-NEXT: br label %[[SCALAR_PH]]1563; INTER: [[SCALAR_PH]]:1564; INTER-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]1565; INTER-NEXT: br label %[[FOR_BODY:.*]]1566; INTER: [[FOR_BODY]]:1567; INTER-NEXT: [[I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[I_NEXT:%.*]], %[[FOR_BODY]] ]1568; INTER-NEXT: [[UNNAMEDTMP0:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[I]]1569; INTER-NEXT: [[UNNAMEDTMP2:%.*]] = getelementptr inbounds i8, ptr [[UNNAMEDTMP0]], i64 31570; INTER-NEXT: [[UNNAMEDTMP3:%.*]] = load i8, ptr [[UNNAMEDTMP2]], align 11571; INTER-NEXT: [[UNNAMEDTMP4:%.*]] = load i8, ptr [[UNNAMEDTMP0]], align 11572; INTER-NEXT: [[UNNAMEDTMP5:%.*]] = xor i8 [[UNNAMEDTMP3]], [[UNNAMEDTMP4]]1573; INTER-NEXT: [[UNNAMEDTMP6:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[I]]1574; INTER-NEXT: store i8 [[UNNAMEDTMP5]], ptr [[UNNAMEDTMP6]], align 11575; INTER-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 11576; INTER-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]1577; INTER-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END:.*]], !llvm.loop [[LOOP33:![0-9]+]]1578; INTER: [[FOR_END]]:1579; INTER-NEXT: ret void1580;1581entry:1582 br label %for.body1583 1584for.body:1585 %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]1586 %tmp0 = getelementptr inbounds i64, ptr %A, i64 %i1587 %tmp2 = getelementptr inbounds i8, ptr %tmp0, i64 31588 %tmp3 = load i8, ptr %tmp2, align 11589 %tmp4 = load i8, ptr %tmp0, align 11590 %tmp5 = xor i8 %tmp3, %tmp41591 %tmp6 = getelementptr inbounds i8, ptr %B, i64 %i1592 store i8 %tmp5, ptr %tmp61593 %i.next = add nuw nsw i64 %i, 11594 %cond = icmp slt i64 %i.next, %n1595 br i1 %cond, label %for.body, label %for.end1596 1597for.end:1598 ret void1599}1600 1601define void @pr61396_pointer_used_as_both_stored_value_and_pointer_operand_by_store(ptr %ary) {1602; CHECK-LABEL: define void @pr61396_pointer_used_as_both_stored_value_and_pointer_operand_by_store(1603; CHECK-SAME: ptr [[ARY:%.*]]) {1604; CHECK-NEXT: [[ENTRY:.*:]]1605; CHECK-NEXT: br label %[[VECTOR_PH:.*]]1606; CHECK: [[VECTOR_PH]]:1607; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]1608; CHECK: [[VECTOR_BODY]]:1609; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1610; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]1611; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds ptr, ptr [[ARY]], <4 x i64> [[VEC_IND]]1612; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x ptr> [[TMP0]], i32 01613; CHECK-NEXT: store <4 x ptr> [[TMP0]], ptr [[TMP1]], align 81614; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41615; CHECK-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <4 x i64> [[VEC_IND]], splat (i64 4)1616; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], 102401617; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]1618; CHECK: [[MIDDLE_BLOCK]]:1619; CHECK-NEXT: br label %[[SCALAR_PH:.*]]1620; CHECK: [[SCALAR_PH]]:1621; CHECK-NEXT: br label %[[LOOP:.*]]1622; CHECK: [[LOOP]]:1623; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 10240, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]1624; CHECK-NEXT: [[CUR_PTR:%.*]] = getelementptr inbounds ptr, ptr [[ARY]], i64 [[IV]]1625; CHECK-NEXT: store ptr [[CUR_PTR]], ptr [[CUR_PTR]], align 81626; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 11627; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[IV]], 102401628; CHECK-NEXT: br i1 [[DONE]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP35:![0-9]+]]1629; CHECK: [[EXIT]]:1630; CHECK-NEXT: ret void1631;1632; INTER-LABEL: define void @pr61396_pointer_used_as_both_stored_value_and_pointer_operand_by_store(1633; INTER-SAME: ptr [[ARY:%.*]]) {1634; INTER-NEXT: [[ENTRY:.*:]]1635; INTER-NEXT: br label %[[VECTOR_PH:.*]]1636; INTER: [[VECTOR_PH]]:1637; INTER-NEXT: br label %[[VECTOR_BODY:.*]]1638; INTER: [[VECTOR_BODY]]:1639; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1640; INTER-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]1641; INTER-NEXT: [[TMP0:%.*]] = getelementptr inbounds ptr, ptr [[ARY]], <4 x i64> [[VEC_IND]]1642; INTER-NEXT: [[TMP1:%.*]] = extractelement <4 x ptr> [[TMP0]], i32 01643; INTER-NEXT: store <4 x ptr> [[TMP0]], ptr [[TMP1]], align 81644; INTER-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 41645; INTER-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <4 x i64> [[VEC_IND]], splat (i64 4)1646; INTER-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], 102401647; INTER-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]1648; INTER: [[MIDDLE_BLOCK]]:1649; INTER-NEXT: br label %[[SCALAR_PH:.*]]1650; INTER: [[SCALAR_PH]]:1651; INTER-NEXT: br label %[[LOOP:.*]]1652; INTER: [[LOOP]]:1653; INTER-NEXT: [[IV:%.*]] = phi i64 [ 10240, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]1654; INTER-NEXT: [[CUR_PTR:%.*]] = getelementptr inbounds ptr, ptr [[ARY]], i64 [[IV]]1655; INTER-NEXT: store ptr [[CUR_PTR]], ptr [[CUR_PTR]], align 81656; INTER-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 11657; INTER-NEXT: [[DONE:%.*]] = icmp eq i64 [[IV]], 102401658; INTER-NEXT: br i1 [[DONE]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP35:![0-9]+]]1659; INTER: [[EXIT]]:1660; INTER-NEXT: ret void1661;1662entry:1663 br label %loop1664 1665loop:1666 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]1667 %cur.ptr = getelementptr inbounds ptr, ptr %ary, i64 %iv1668 store ptr %cur.ptr, ptr %cur.ptr, align 81669 %iv.next = add nuw nsw i64 %iv, 11670 %done = icmp eq i64 %iv, 102401671 br i1 %done, label %exit, label %loop1672 1673exit:1674 ret void1675}1676