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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph:" --version 62; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=2 -S %s | FileCheck %s3 4define i8 @preserve_flags_when_cloning_trunc(i8 %start, ptr noalias %src, ptr noalias %dst) {5; CHECK-LABEL: define i8 @preserve_flags_when_cloning_trunc(6; CHECK-SAME: i8 [[START:%.*]], ptr noalias [[SRC:%.*]], ptr noalias [[DST:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: br label %[[VECTOR_PH:.*]]9; CHECK: [[VECTOR_PH]]:10; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> splat (i8 1), i8 [[START]], i32 011; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]12; CHECK: [[VECTOR_BODY]]:13; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]14; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i8> [ [[TMP0]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]15; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x i8> [ splat (i8 1), %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ]16; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[SRC]], align 417; CHECK-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP1]], 018; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[TMP10]], i64 019; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer20; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i1> [[TMP2]] to <4 x i16>21; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i16, ptr [[DST]], i64 [[INDEX]]22; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i16, ptr [[TMP4]], i64 423; CHECK-NEXT: store <4 x i16> [[TMP3]], ptr [[TMP4]], align 224; CHECK-NEXT: store <4 x i16> [[TMP3]], ptr [[TMP5]], align 225; CHECK-NEXT: [[TMP6]] = mul <4 x i8> [[VEC_PHI]], splat (i8 3)26; CHECK-NEXT: [[TMP7]] = mul <4 x i8> [[VEC_PHI1]], splat (i8 3)27; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 828; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 41629; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]30; CHECK: [[MIDDLE_BLOCK]]:31; CHECK-NEXT: [[BIN_RDX:%.*]] = mul <4 x i8> [[TMP7]], [[TMP6]]32; CHECK-NEXT: [[TMP9:%.*]] = call i8 @llvm.vector.reduce.mul.v4i8(<4 x i8> [[BIN_RDX]])33; CHECK-NEXT: br label %[[SCALAR_PH:.*]]34; CHECK: [[SCALAR_PH]]:35;36entry:37 br label %loop38 39loop:40 %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]41 %red = phi i8 [ %red.next, %loop ], [ %start, %entry ]42 %l = load i32, ptr %src, align 443 %cmp = icmp ne i32 %l, 044 %cmp.ext = zext i1 %cmp to i6445 %cmp.trunc = trunc i64 %cmp.ext to i1646 %gep.dst = getelementptr i16, ptr %dst, i64 %iv47 store i16 %cmp.trunc, ptr %gep.dst, align 248 %red.next = mul i8 %red, 349 %iv.next = add i64 %iv, 150 %ec = icmp ult i64 %iv, 41651 br i1 %ec, label %loop, label %exit52 53exit:54 ret i8 %red.next55}56 57 58define void @preserve_flags_narrowing_extends_and_truncs(ptr noalias %A, ptr noalias %B, ptr noalias %C) {59; CHECK-LABEL: define void @preserve_flags_narrowing_extends_and_truncs(60; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) {61; CHECK-NEXT: [[ENTRY:.*:]]62; CHECK-NEXT: br label %[[VECTOR_PH:.*]]63; CHECK: [[VECTOR_PH]]:64; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]65; CHECK: [[VECTOR_BODY]]:66; CHECK-NEXT: br i1 true, label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]67; CHECK: [[PRED_LOAD_IF]]:68; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 069; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[TMP0]], align 170; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> poison, i8 [[TMP1]], i32 071; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]72; CHECK: [[PRED_LOAD_CONTINUE]]:73; CHECK-NEXT: [[TMP3:%.*]] = phi <4 x i8> [ poison, %[[VECTOR_BODY]] ], [ [[TMP2]], %[[PRED_LOAD_IF]] ]74; CHECK-NEXT: br i1 true, label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2:.*]]75; CHECK: [[PRED_LOAD_IF1]]:76; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 177; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 178; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i8> [[TMP3]], i8 [[TMP5]], i32 179; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]80; CHECK: [[PRED_LOAD_CONTINUE2]]:81; CHECK-NEXT: [[TMP7:%.*]] = phi <4 x i8> [ [[TMP3]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP6]], %[[PRED_LOAD_IF1]] ]82; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF3:.*]], label %[[PRED_LOAD_CONTINUE4:.*]]83; CHECK: [[PRED_LOAD_IF3]]:84; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 285; CHECK-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP8]], align 186; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i8> [[TMP7]], i8 [[TMP9]], i32 287; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE4]]88; CHECK: [[PRED_LOAD_CONTINUE4]]:89; CHECK-NEXT: [[TMP11:%.*]] = phi <4 x i8> [ [[TMP7]], %[[PRED_LOAD_CONTINUE2]] ], [ [[TMP10]], %[[PRED_LOAD_IF3]] ]90; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF5:.*]], label %[[PRED_LOAD_CONTINUE6:.*]]91; CHECK: [[PRED_LOAD_IF5]]:92; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 393; CHECK-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 194; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i8> [[TMP11]], i8 [[TMP13]], i32 395; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE6]]96; CHECK: [[PRED_LOAD_CONTINUE6]]:97; CHECK-NEXT: [[TMP15:%.*]] = phi <4 x i8> [ [[TMP11]], %[[PRED_LOAD_CONTINUE4]] ], [ [[TMP14]], %[[PRED_LOAD_IF5]] ]98; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF7:.*]], label %[[PRED_LOAD_CONTINUE8:.*]]99; CHECK: [[PRED_LOAD_IF7]]:100; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 4101; CHECK-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP16]], align 1102; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i8> poison, i8 [[TMP17]], i32 0103; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE8]]104; CHECK: [[PRED_LOAD_CONTINUE8]]:105; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i8> [ poison, %[[PRED_LOAD_CONTINUE6]] ], [ [[TMP18]], %[[PRED_LOAD_IF7]] ]106; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF9:.*]], label %[[PRED_LOAD_CONTINUE10:.*]]107; CHECK: [[PRED_LOAD_IF9]]:108; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 5109; CHECK-NEXT: [[TMP21:%.*]] = load i8, ptr [[TMP20]], align 1110; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i8> [[TMP19]], i8 [[TMP21]], i32 1111; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE10]]112; CHECK: [[PRED_LOAD_CONTINUE10]]:113; CHECK-NEXT: [[TMP23:%.*]] = phi <4 x i8> [ [[TMP19]], %[[PRED_LOAD_CONTINUE8]] ], [ [[TMP22]], %[[PRED_LOAD_IF9]] ]114; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF11:.*]], label %[[PRED_LOAD_CONTINUE12:.*]]115; CHECK: [[PRED_LOAD_IF11]]:116; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 6117; CHECK-NEXT: [[TMP25:%.*]] = load i8, ptr [[TMP24]], align 1118; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x i8> [[TMP23]], i8 [[TMP25]], i32 2119; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE12]]120; CHECK: [[PRED_LOAD_CONTINUE12]]:121; CHECK-NEXT: [[TMP27:%.*]] = phi <4 x i8> [ [[TMP23]], %[[PRED_LOAD_CONTINUE10]] ], [ [[TMP26]], %[[PRED_LOAD_IF11]] ]122; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF13:.*]], label %[[PRED_LOAD_CONTINUE14:.*]]123; CHECK: [[PRED_LOAD_IF13]]:124; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 7125; CHECK-NEXT: [[TMP29:%.*]] = load i8, ptr [[TMP28]], align 1126; CHECK-NEXT: [[TMP30:%.*]] = insertelement <4 x i8> [[TMP27]], i8 [[TMP29]], i32 3127; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE14]]128; CHECK: [[PRED_LOAD_CONTINUE14]]:129; CHECK-NEXT: [[TMP31:%.*]] = phi <4 x i8> [ [[TMP27]], %[[PRED_LOAD_CONTINUE12]] ], [ [[TMP30]], %[[PRED_LOAD_IF13]] ]130; CHECK-NEXT: [[TMP32:%.*]] = zext <4 x i8> [[TMP15]] to <4 x i64>131; CHECK-NEXT: [[TMP33:%.*]] = zext <4 x i8> [[TMP31]] to <4 x i64>132; CHECK-NEXT: br i1 true, label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]133; CHECK: [[PRED_STORE_IF]]:134; CHECK-NEXT: [[TMP34:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 0135; CHECK-NEXT: [[TMP35:%.*]] = extractelement <4 x i64> [[TMP32]], i32 0136; CHECK-NEXT: store i64 [[TMP35]], ptr [[TMP34]], align 4137; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]138; CHECK: [[PRED_STORE_CONTINUE]]:139; CHECK-NEXT: br i1 true, label %[[PRED_STORE_IF15:.*]], label %[[PRED_STORE_CONTINUE16:.*]]140; CHECK: [[PRED_STORE_IF15]]:141; CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 1142; CHECK-NEXT: [[TMP37:%.*]] = extractelement <4 x i64> [[TMP32]], i32 1143; CHECK-NEXT: store i64 [[TMP37]], ptr [[TMP36]], align 4144; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE16]]145; CHECK: [[PRED_STORE_CONTINUE16]]:146; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF17:.*]], label %[[PRED_STORE_CONTINUE18:.*]]147; CHECK: [[PRED_STORE_IF17]]:148; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 2149; CHECK-NEXT: [[TMP39:%.*]] = extractelement <4 x i64> [[TMP32]], i32 2150; CHECK-NEXT: store i64 [[TMP39]], ptr [[TMP38]], align 4151; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE18]]152; CHECK: [[PRED_STORE_CONTINUE18]]:153; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF19:.*]], label %[[PRED_STORE_CONTINUE20:.*]]154; CHECK: [[PRED_STORE_IF19]]:155; CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 3156; CHECK-NEXT: [[TMP41:%.*]] = extractelement <4 x i64> [[TMP32]], i32 3157; CHECK-NEXT: store i64 [[TMP41]], ptr [[TMP40]], align 4158; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE20]]159; CHECK: [[PRED_STORE_CONTINUE20]]:160; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF21:.*]], label %[[PRED_STORE_CONTINUE22:.*]]161; CHECK: [[PRED_STORE_IF21]]:162; CHECK-NEXT: [[TMP42:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 4163; CHECK-NEXT: [[TMP43:%.*]] = extractelement <4 x i64> [[TMP33]], i32 0164; CHECK-NEXT: store i64 [[TMP43]], ptr [[TMP42]], align 4165; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE22]]166; CHECK: [[PRED_STORE_CONTINUE22]]:167; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF23:.*]], label %[[PRED_STORE_CONTINUE24:.*]]168; CHECK: [[PRED_STORE_IF23]]:169; CHECK-NEXT: [[TMP44:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 5170; CHECK-NEXT: [[TMP45:%.*]] = extractelement <4 x i64> [[TMP33]], i32 1171; CHECK-NEXT: store i64 [[TMP45]], ptr [[TMP44]], align 4172; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE24]]173; CHECK: [[PRED_STORE_CONTINUE24]]:174; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF25:.*]], label %[[PRED_STORE_CONTINUE26:.*]]175; CHECK: [[PRED_STORE_IF25]]:176; CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 6177; CHECK-NEXT: [[TMP47:%.*]] = extractelement <4 x i64> [[TMP33]], i32 2178; CHECK-NEXT: store i64 [[TMP47]], ptr [[TMP46]], align 4179; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE26]]180; CHECK: [[PRED_STORE_CONTINUE26]]:181; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF27:.*]], label %[[PRED_STORE_CONTINUE28:.*]]182; CHECK: [[PRED_STORE_IF27]]:183; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 7184; CHECK-NEXT: [[TMP49:%.*]] = extractelement <4 x i64> [[TMP33]], i32 3185; CHECK-NEXT: store i64 [[TMP49]], ptr [[TMP48]], align 4186; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE28]]187; CHECK: [[PRED_STORE_CONTINUE28]]:188; CHECK-NEXT: [[TMP50:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 0189; CHECK-NEXT: [[TMP51:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 1190; CHECK-NEXT: [[TMP52:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 2191; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 3192; CHECK-NEXT: [[TMP54:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP50]], i32 0193; CHECK-NEXT: [[TMP55:%.*]] = insertelement <4 x ptr> [[TMP54]], ptr [[TMP51]], i32 1194; CHECK-NEXT: [[TMP56:%.*]] = insertelement <4 x ptr> [[TMP55]], ptr [[TMP52]], i32 2195; CHECK-NEXT: [[TMP57:%.*]] = insertelement <4 x ptr> [[TMP56]], ptr [[TMP53]], i32 3196; CHECK-NEXT: [[TMP58:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 4197; CHECK-NEXT: [[TMP59:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 5198; CHECK-NEXT: [[TMP60:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 6199; CHECK-NEXT: [[TMP61:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 7200; CHECK-NEXT: [[TMP62:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP58]], i32 0201; CHECK-NEXT: [[TMP63:%.*]] = insertelement <4 x ptr> [[TMP62]], ptr [[TMP59]], i32 1202; CHECK-NEXT: [[TMP64:%.*]] = insertelement <4 x ptr> [[TMP63]], ptr [[TMP60]], i32 2203; CHECK-NEXT: [[TMP65:%.*]] = insertelement <4 x ptr> [[TMP64]], ptr [[TMP61]], i32 3204; CHECK-NEXT: br i1 true, label %[[PRED_LOAD_IF29:.*]], label %[[PRED_LOAD_CONTINUE30:.*]]205; CHECK: [[PRED_LOAD_IF29]]:206; CHECK-NEXT: [[TMP66:%.*]] = load i8, ptr [[TMP50]], align 1207; CHECK-NEXT: [[TMP67:%.*]] = insertelement <4 x i8> poison, i8 [[TMP66]], i32 0208; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE30]]209; CHECK: [[PRED_LOAD_CONTINUE30]]:210; CHECK-NEXT: [[TMP68:%.*]] = phi <4 x i8> [ poison, %[[PRED_STORE_CONTINUE28]] ], [ [[TMP67]], %[[PRED_LOAD_IF29]] ]211; CHECK-NEXT: br i1 true, label %[[PRED_LOAD_IF31:.*]], label %[[PRED_LOAD_CONTINUE32:.*]]212; CHECK: [[PRED_LOAD_IF31]]:213; CHECK-NEXT: [[TMP69:%.*]] = load i8, ptr [[TMP51]], align 1214; CHECK-NEXT: [[TMP70:%.*]] = insertelement <4 x i8> [[TMP68]], i8 [[TMP69]], i32 1215; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE32]]216; CHECK: [[PRED_LOAD_CONTINUE32]]:217; CHECK-NEXT: [[TMP71:%.*]] = phi <4 x i8> [ [[TMP68]], %[[PRED_LOAD_CONTINUE30]] ], [ [[TMP70]], %[[PRED_LOAD_IF31]] ]218; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF33:.*]], label %[[PRED_LOAD_CONTINUE34:.*]]219; CHECK: [[PRED_LOAD_IF33]]:220; CHECK-NEXT: [[TMP72:%.*]] = load i8, ptr [[TMP52]], align 1221; CHECK-NEXT: [[TMP73:%.*]] = insertelement <4 x i8> [[TMP71]], i8 [[TMP72]], i32 2222; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE34]]223; CHECK: [[PRED_LOAD_CONTINUE34]]:224; CHECK-NEXT: [[TMP74:%.*]] = phi <4 x i8> [ [[TMP71]], %[[PRED_LOAD_CONTINUE32]] ], [ [[TMP73]], %[[PRED_LOAD_IF33]] ]225; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF35:.*]], label %[[PRED_LOAD_CONTINUE36:.*]]226; CHECK: [[PRED_LOAD_IF35]]:227; CHECK-NEXT: [[TMP75:%.*]] = load i8, ptr [[TMP53]], align 1228; CHECK-NEXT: [[TMP76:%.*]] = insertelement <4 x i8> [[TMP74]], i8 [[TMP75]], i32 3229; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE36]]230; CHECK: [[PRED_LOAD_CONTINUE36]]:231; CHECK-NEXT: [[TMP77:%.*]] = phi <4 x i8> [ [[TMP74]], %[[PRED_LOAD_CONTINUE34]] ], [ [[TMP76]], %[[PRED_LOAD_IF35]] ]232; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF37:.*]], label %[[PRED_LOAD_CONTINUE38:.*]]233; CHECK: [[PRED_LOAD_IF37]]:234; CHECK-NEXT: [[TMP78:%.*]] = load i8, ptr [[TMP58]], align 1235; CHECK-NEXT: [[TMP79:%.*]] = insertelement <4 x i8> poison, i8 [[TMP78]], i32 0236; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE38]]237; CHECK: [[PRED_LOAD_CONTINUE38]]:238; CHECK-NEXT: [[TMP80:%.*]] = phi <4 x i8> [ poison, %[[PRED_LOAD_CONTINUE36]] ], [ [[TMP79]], %[[PRED_LOAD_IF37]] ]239; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF39:.*]], label %[[PRED_LOAD_CONTINUE40:.*]]240; CHECK: [[PRED_LOAD_IF39]]:241; CHECK-NEXT: [[TMP81:%.*]] = load i8, ptr [[TMP59]], align 1242; CHECK-NEXT: [[TMP82:%.*]] = insertelement <4 x i8> [[TMP80]], i8 [[TMP81]], i32 1243; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE40]]244; CHECK: [[PRED_LOAD_CONTINUE40]]:245; CHECK-NEXT: [[TMP83:%.*]] = phi <4 x i8> [ [[TMP80]], %[[PRED_LOAD_CONTINUE38]] ], [ [[TMP82]], %[[PRED_LOAD_IF39]] ]246; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF41:.*]], label %[[PRED_LOAD_CONTINUE42:.*]]247; CHECK: [[PRED_LOAD_IF41]]:248; CHECK-NEXT: [[TMP84:%.*]] = load i8, ptr [[TMP60]], align 1249; CHECK-NEXT: [[TMP85:%.*]] = insertelement <4 x i8> [[TMP83]], i8 [[TMP84]], i32 2250; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE42]]251; CHECK: [[PRED_LOAD_CONTINUE42]]:252; CHECK-NEXT: [[TMP86:%.*]] = phi <4 x i8> [ [[TMP83]], %[[PRED_LOAD_CONTINUE40]] ], [ [[TMP85]], %[[PRED_LOAD_IF41]] ]253; CHECK-NEXT: br i1 false, label %[[PRED_LOAD_IF43:.*]], label %[[PRED_LOAD_CONTINUE44:.*]]254; CHECK: [[PRED_LOAD_IF43]]:255; CHECK-NEXT: [[TMP87:%.*]] = load i8, ptr [[TMP61]], align 1256; CHECK-NEXT: [[TMP88:%.*]] = insertelement <4 x i8> [[TMP86]], i8 [[TMP87]], i32 3257; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE44]]258; CHECK: [[PRED_LOAD_CONTINUE44]]:259; CHECK-NEXT: [[TMP89:%.*]] = phi <4 x i8> [ [[TMP86]], %[[PRED_LOAD_CONTINUE42]] ], [ [[TMP88]], %[[PRED_LOAD_IF43]] ]260; CHECK-NEXT: [[TMP90:%.*]] = trunc <4 x i8> [[TMP77]] to <4 x i1>261; CHECK-NEXT: [[TMP91:%.*]] = trunc <4 x i8> [[TMP89]] to <4 x i1>262; CHECK-NEXT: [[TMP92:%.*]] = and <4 x i1> [[TMP90]], splat (i1 true)263; CHECK-NEXT: [[TMP93:%.*]] = and <4 x i1> [[TMP91]], splat (i1 true)264; CHECK-NEXT: [[TMP94:%.*]] = select <4 x i1> [[TMP90]], <4 x float> splat (float 1.000000e+00), <4 x float> zeroinitializer265; CHECK-NEXT: [[TMP95:%.*]] = select <4 x i1> [[TMP91]], <4 x float> splat (float 1.000000e+00), <4 x float> zeroinitializer266; CHECK-NEXT: [[TMP96:%.*]] = select <4 x i1> [[TMP92]], <4 x float> splat (float 3.000000e+00), <4 x float> [[TMP94]]267; CHECK-NEXT: [[TMP97:%.*]] = select <4 x i1> [[TMP93]], <4 x float> splat (float 3.000000e+00), <4 x float> [[TMP95]]268; CHECK-NEXT: [[TMP98:%.*]] = bitcast <4 x float> [[TMP96]] to <4 x i32>269; CHECK-NEXT: [[TMP99:%.*]] = bitcast <4 x float> [[TMP97]] to <4 x i32>270; CHECK-NEXT: [[TMP100:%.*]] = trunc <4 x i32> [[TMP98]] to <4 x i8>271; CHECK-NEXT: [[TMP101:%.*]] = trunc <4 x i32> [[TMP99]] to <4 x i8>272; CHECK-NEXT: br i1 true, label %[[PRED_STORE_IF45:.*]], label %[[PRED_STORE_CONTINUE46:.*]]273; CHECK: [[PRED_STORE_IF45]]:274; CHECK-NEXT: [[TMP102:%.*]] = extractelement <4 x i8> [[TMP100]], i32 0275; CHECK-NEXT: store i8 [[TMP102]], ptr [[TMP50]], align 1276; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE46]]277; CHECK: [[PRED_STORE_CONTINUE46]]:278; CHECK-NEXT: br i1 true, label %[[PRED_STORE_IF47:.*]], label %[[PRED_STORE_CONTINUE48:.*]]279; CHECK: [[PRED_STORE_IF47]]:280; CHECK-NEXT: [[TMP103:%.*]] = extractelement <4 x i8> [[TMP100]], i32 1281; CHECK-NEXT: store i8 [[TMP103]], ptr [[TMP51]], align 1282; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE48]]283; CHECK: [[PRED_STORE_CONTINUE48]]:284; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF49:.*]], label %[[PRED_STORE_CONTINUE50:.*]]285; CHECK: [[PRED_STORE_IF49]]:286; CHECK-NEXT: [[TMP104:%.*]] = extractelement <4 x i8> [[TMP100]], i32 2287; CHECK-NEXT: store i8 [[TMP104]], ptr [[TMP52]], align 1288; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE50]]289; CHECK: [[PRED_STORE_CONTINUE50]]:290; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF51:.*]], label %[[PRED_STORE_CONTINUE52:.*]]291; CHECK: [[PRED_STORE_IF51]]:292; CHECK-NEXT: [[TMP105:%.*]] = extractelement <4 x i8> [[TMP100]], i32 3293; CHECK-NEXT: store i8 [[TMP105]], ptr [[TMP53]], align 1294; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE52]]295; CHECK: [[PRED_STORE_CONTINUE52]]:296; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF53:.*]], label %[[PRED_STORE_CONTINUE54:.*]]297; CHECK: [[PRED_STORE_IF53]]:298; CHECK-NEXT: [[TMP106:%.*]] = extractelement <4 x i8> [[TMP101]], i32 0299; CHECK-NEXT: store i8 [[TMP106]], ptr [[TMP58]], align 1300; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE54]]301; CHECK: [[PRED_STORE_CONTINUE54]]:302; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF55:.*]], label %[[PRED_STORE_CONTINUE56:.*]]303; CHECK: [[PRED_STORE_IF55]]:304; CHECK-NEXT: [[TMP107:%.*]] = extractelement <4 x i8> [[TMP101]], i32 1305; CHECK-NEXT: store i8 [[TMP107]], ptr [[TMP59]], align 1306; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE56]]307; CHECK: [[PRED_STORE_CONTINUE56]]:308; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF57:.*]], label %[[PRED_STORE_CONTINUE58:.*]]309; CHECK: [[PRED_STORE_IF57]]:310; CHECK-NEXT: [[TMP108:%.*]] = extractelement <4 x i8> [[TMP101]], i32 2311; CHECK-NEXT: store i8 [[TMP108]], ptr [[TMP60]], align 1312; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE58]]313; CHECK: [[PRED_STORE_CONTINUE58]]:314; CHECK-NEXT: br i1 false, label %[[PRED_STORE_IF59:.*]], label %[[PRED_STORE_CONTINUE60:.*]]315; CHECK: [[PRED_STORE_IF59]]:316; CHECK-NEXT: [[TMP109:%.*]] = extractelement <4 x i8> [[TMP101]], i32 3317; CHECK-NEXT: store i8 [[TMP109]], ptr [[TMP61]], align 1318; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE60]]319; CHECK: [[PRED_STORE_CONTINUE60]]:320; CHECK-NEXT: br label %[[MIDDLE_BLOCK:.*]]321; CHECK: [[MIDDLE_BLOCK]]:322; CHECK-NEXT: br label %[[EXIT:.*]]323; CHECK: [[EXIT]]:324; CHECK-NEXT: ret void325;326entry:327 br label %loop328 329loop:330 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]331 %gep.A = getelementptr inbounds i8, ptr %A, i64 %iv332 %l = load i8, ptr %gep.A333 %l.ext = zext i8 %l to i64334 %gep.C = getelementptr inbounds i8, ptr %C, i64 %iv335 store i64 %l.ext, ptr %gep.C336 %gep.B = getelementptr inbounds i8, ptr %B, i64 %iv337 %l.1 = load i8, ptr %gep.B, align 1338 %masked = and i8 %l.1, 1339 %l.1.trunc = trunc i8 %l.1 to i1340 %sel.0 = select i1 %l.1.trunc, float 1.000000e+00, float 0.000000e+00341 %masked.trunc = trunc i8 %masked to i1342 %sel.1 = select i1 %masked.trunc, float 3.000000e+00, float %sel.0343 %bc = bitcast float %sel.1 to i32344 %bc.trunc = trunc i32 %bc to i8345 store i8 %bc.trunc, ptr %gep.B, align 1346 %iv.next = add i64 %iv, 1347 %ec = icmp eq i64 %iv, 1348 br i1 %ec, label %exit, label %loop349 350exit:351 ret void352}353 354define void @simplified_cast_preserves_irflag_type(ptr noalias %p, ptr noalias %q, ptr noalias %r) {355; CHECK-LABEL: define void @simplified_cast_preserves_irflag_type(356; CHECK-SAME: ptr noalias [[P:%.*]], ptr noalias [[Q:%.*]], ptr noalias [[R:%.*]]) {357; CHECK-NEXT: [[ENTRY:.*:]]358; CHECK-NEXT: br label %[[VECTOR_PH:.*]]359; CHECK: [[VECTOR_PH]]:360; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]361; CHECK: [[VECTOR_BODY]]:362; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]363; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[P]], align 1364; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i8> poison, i8 [[TMP0]], i64 0365; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT]], <4 x i8> poison, <4 x i32> zeroinitializer366; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT]] to <4 x i16>367; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i16> [[TMP1]], i32 3368; CHECK-NEXT: store i16 [[TMP2]], ptr [[Q]], align 2369; CHECK-NEXT: store i16 [[TMP2]], ptr [[R]], align 2370; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8371; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 48372; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]373; CHECK: [[MIDDLE_BLOCK]]:374; CHECK-NEXT: br label %[[SCALAR_PH:.*]]375; CHECK: [[SCALAR_PH]]:376;377entry:378 br label %loop379 380loop:381 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]382 %x = load i8, ptr %p383 %x.i32 = zext i8 %x to i32384 %trunc = trunc i32 %x.i32 to i16385 store i16 %trunc, ptr %q386 %x.i16 = zext i8 %x to i16387 store i16 %x.i16, ptr %r388 %iv.next = add i64 %iv, 2389 %ec = icmp eq i64 %iv.next, 100390 br i1 %ec, label %exit, label %loop391 392exit:393 ret void394}395