164 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 62; RUN: opt -p loop-vectorize -force-vector-width=2 -force-widen-divrem-via-safe-divisor=false -S %s | FileCheck %s3 4define void @multiple_vppredinstphi_with_same_predicate(ptr %A, i32 %d) {5; CHECK-LABEL: define void @multiple_vppredinstphi_with_same_predicate(6; CHECK-SAME: ptr [[A:%.*]], i32 [[D:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: br label %[[VECTOR_PH:.*]]9; CHECK: [[VECTOR_PH]]:10; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]11; CHECK: [[VECTOR_BODY]]:12; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_SDIV_CONTINUE2:.*]] ]13; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[INDEX]]14; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 415; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], zeroinitializer16; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i1> [[TMP1]], i32 017; CHECK-NEXT: br i1 [[TMP2]], label %[[PRED_SDIV_IF:.*]], label %[[PRED_SDIV_CONTINUE:.*]]18; CHECK: [[PRED_SDIV_IF]]:19; CHECK-NEXT: [[TMP3:%.*]] = sdiv i32 -10, [[D]]20; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i32 021; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE]]22; CHECK: [[PRED_SDIV_CONTINUE]]:23; CHECK-NEXT: [[TMP5:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP4]], %[[PRED_SDIV_IF]] ]24; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i1> [[TMP1]], i32 125; CHECK-NEXT: br i1 [[TMP6]], label %[[PRED_SDIV_IF1:.*]], label %[[PRED_SDIV_CONTINUE2]]26; CHECK: [[PRED_SDIV_IF1]]:27; CHECK-NEXT: [[TMP7:%.*]] = sdiv i32 -10, [[D]]28; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP7]], i32 129; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE2]]30; CHECK: [[PRED_SDIV_CONTINUE2]]:31; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ [[TMP5]], %[[PRED_SDIV_CONTINUE]] ], [ [[TMP8]], %[[PRED_SDIV_IF1]] ]32; CHECK-NEXT: [[TMP10:%.*]] = add <2 x i32> [[TMP9]], [[TMP9]]33; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[TMP10]], <2 x i32> zeroinitializer34; CHECK-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP0]], align 435; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 236; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[INDEX_NEXT]], 10037; CHECK-NEXT: br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]38; CHECK: [[MIDDLE_BLOCK]]:39; CHECK-NEXT: br label %[[EXIT:.*]]40; CHECK: [[EXIT]]:41; CHECK-NEXT: ret void42;43entry:44 br label %loop.header45 46loop.header:47 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]48 %gep.A = getelementptr inbounds i32, ptr %A, i32 %iv49 %l = load i32, ptr %gep.A50 %c = icmp sgt i32 %l, 051 br i1 %c, label %then, label %loop.latch52 53then:54 %div.0 = sdiv i32 -10, %d55 %div.1 = sdiv i32 -10, %d56 %add = add i32 %div.1, %div.057 br label %loop.latch58 59loop.latch:60 %merge = phi i32 [ %add, %then ], [ 0, %loop.header ]61 store i32 %merge, ptr %gep.A62 %iv.next = add i32 %iv, 163 %ec = icmp eq i32 %iv.next, 10064 br i1 %ec, label %exit, label %loop.header65 66exit:67 ret void68}69 70define void @multiple_vppredinstphi_with_different_predicate(ptr %A, i32 %d) {71; CHECK-LABEL: define void @multiple_vppredinstphi_with_different_predicate(72; CHECK-SAME: ptr [[A:%.*]], i32 [[D:%.*]]) {73; CHECK-NEXT: [[ENTRY:.*:]]74; CHECK-NEXT: br label %[[VECTOR_PH:.*]]75; CHECK: [[VECTOR_PH]]:76; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]77; CHECK: [[VECTOR_BODY]]:78; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_SDIV_CONTINUE6:.*]] ]79; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[INDEX]]80; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 481; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], zeroinitializer82; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i1> [[TMP1]], i32 083; CHECK-NEXT: br i1 [[TMP2]], label %[[PRED_SDIV_IF:.*]], label %[[PRED_SDIV_CONTINUE:.*]]84; CHECK: [[PRED_SDIV_IF]]:85; CHECK-NEXT: [[TMP3:%.*]] = sdiv i32 -10, [[D]]86; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i32 087; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE]]88; CHECK: [[PRED_SDIV_CONTINUE]]:89; CHECK-NEXT: [[TMP5:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP4]], %[[PRED_SDIV_IF]] ]90; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i1> [[TMP1]], i32 191; CHECK-NEXT: br i1 [[TMP6]], label %[[PRED_SDIV_IF1:.*]], label %[[PRED_SDIV_CONTINUE2:.*]]92; CHECK: [[PRED_SDIV_IF1]]:93; CHECK-NEXT: [[TMP7:%.*]] = sdiv i32 -10, [[D]]94; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP7]], i32 195; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE2]]96; CHECK: [[PRED_SDIV_CONTINUE2]]:97; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ [[TMP5]], %[[PRED_SDIV_CONTINUE]] ], [ [[TMP8]], %[[PRED_SDIV_IF1]] ]98; CHECK-NEXT: [[TMP10:%.*]] = xor <2 x i1> [[TMP1]], splat (i1 true)99; CHECK-NEXT: [[TMP11:%.*]] = or <2 x i1> [[TMP1]], [[TMP10]]100; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[TMP9]], <2 x i32> zeroinitializer101; CHECK-NEXT: [[TMP12:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], splat (i32 20)102; CHECK-NEXT: [[TMP13:%.*]] = select <2 x i1> [[TMP11]], <2 x i1> [[TMP12]], <2 x i1> zeroinitializer103; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x i1> [[TMP13]], i32 0104; CHECK-NEXT: br i1 [[TMP14]], label %[[PRED_SDIV_IF3:.*]], label %[[PRED_SDIV_CONTINUE4:.*]]105; CHECK: [[PRED_SDIV_IF3]]:106; CHECK-NEXT: [[TMP15:%.*]] = sdiv i32 -10, [[D]]107; CHECK-NEXT: [[TMP16:%.*]] = insertelement <2 x i32> poison, i32 [[TMP15]], i32 0108; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE4]]109; CHECK: [[PRED_SDIV_CONTINUE4]]:110; CHECK-NEXT: [[TMP17:%.*]] = phi <2 x i32> [ poison, %[[PRED_SDIV_CONTINUE2]] ], [ [[TMP16]], %[[PRED_SDIV_IF3]] ]111; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x i1> [[TMP13]], i32 1112; CHECK-NEXT: br i1 [[TMP18]], label %[[PRED_SDIV_IF5:.*]], label %[[PRED_SDIV_CONTINUE6]]113; CHECK: [[PRED_SDIV_IF5]]:114; CHECK-NEXT: [[TMP19:%.*]] = sdiv i32 -10, [[D]]115; CHECK-NEXT: [[TMP20:%.*]] = insertelement <2 x i32> [[TMP17]], i32 [[TMP19]], i32 1116; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE6]]117; CHECK: [[PRED_SDIV_CONTINUE6]]:118; CHECK-NEXT: [[TMP21:%.*]] = phi <2 x i32> [ [[TMP17]], %[[PRED_SDIV_CONTINUE4]] ], [ [[TMP20]], %[[PRED_SDIV_IF5]] ]119; CHECK-NEXT: [[PREDPHI7:%.*]] = select <2 x i1> [[TMP12]], <2 x i32> [[TMP21]], <2 x i32> zeroinitializer120; CHECK-NEXT: [[TMP22:%.*]] = add <2 x i32> [[PREDPHI]], [[PREDPHI7]]121; CHECK-NEXT: store <2 x i32> [[TMP22]], ptr [[TMP0]], align 4122; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2123; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100124; CHECK-NEXT: br i1 [[TMP23]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]125; CHECK: [[MIDDLE_BLOCK]]:126; CHECK-NEXT: br label %[[EXIT:.*]]127; CHECK: [[EXIT]]:128; CHECK-NEXT: ret void129;130entry:131 br label %loop.header132 133loop.header:134 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]135 %gep.A = getelementptr inbounds i32, ptr %A, i32 %iv136 %l = load i32, ptr %gep.A137 %c.0 = icmp sgt i32 %l, 0138 br i1 %c.0, label %then.0, label %continue139 140then.0:141 %div.0 = sdiv i32 -10, %d142 br label %continue143 144continue:145 %merge.0 = phi i32 [ %div.0, %then.0 ], [ 0, %loop.header ]146 %c.1 = icmp sgt i32 %l, 20147 br i1 %c.1, label %then.1, label %loop.latch148 149then.1:150 %div.1 = sdiv i32 -10, %d151 br label %loop.latch152 153loop.latch:154 %merge.1 = phi i32 [ %div.1, %then.1 ], [ 0, %continue ]155 %add = add i32 %merge.0, %merge.1156 store i32 %add, ptr %gep.A157 %iv.next = add i32 %iv, 1158 %ec = icmp eq i32 %iv.next, 100159 br i1 %ec, label %exit, label %loop.header160 161exit:162 ret void163}164