197 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt < %s -force-vector-width=2 -force-vector-interleave=2 -passes=loop-vectorize -S | FileCheck %s3 4target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"5 6;7; This test ensures that we don't generate trivially dead instructions prior to8; instruction simplification. We don't need to generate instructions9; corresponding to the original induction variable update or branch condition,10; since we rewrite the loop structure.11;12define i64 @dead_instructions_01(ptr %a, i64 %n) {13; CHECK-LABEL: define i64 @dead_instructions_01(14; CHECK-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {15; CHECK-NEXT: [[ENTRY:.*]]:16; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)17; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 418; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]19; CHECK: [[VECTOR_PH]]:20; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 421; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]22; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]23; CHECK: [[VECTOR_BODY]]:24; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]25; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i64> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]26; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <2 x i64> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ]27; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[INDEX]]28; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i64, ptr [[TMP2]], i64 229; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP2]], align 830; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <2 x i64>, ptr [[TMP5]], align 831; CHECK-NEXT: [[TMP6]] = add <2 x i64> [[WIDE_LOAD]], [[VEC_PHI]]32; CHECK-NEXT: [[TMP7]] = add <2 x i64> [[WIDE_LOAD2]], [[VEC_PHI1]]33; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 434; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]35; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]36; CHECK: [[MIDDLE_BLOCK]]:37; CHECK-NEXT: [[BIN_RDX:%.*]] = add <2 x i64> [[TMP7]], [[TMP6]]38; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> [[BIN_RDX]])39; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]40; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]]41; CHECK: [[SCALAR_PH]]:42; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]43; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ [[TMP9]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]44; CHECK-NEXT: br label %[[FOR_BODY:.*]]45; CHECK: [[FOR_BODY]]:46; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]47; CHECK-NEXT: [[R:%.*]] = phi i64 [ [[TMP6:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]48; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[I]]49; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP2]], align 850; CHECK-NEXT: [[TMP6]] = add i64 [[TMP5]], [[R]]51; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 152; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]53; CHECK-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP3:![0-9]+]]54; CHECK: [[FOR_END]]:55; CHECK-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP6]], %[[FOR_BODY]] ], [ [[TMP9]], %[[MIDDLE_BLOCK]] ]56; CHECK-NEXT: ret i64 [[TMP7]]57;58entry:59 br label %for.body60 61for.body:62 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]63 %r = phi i64 [ %tmp2, %for.body ], [ 0, %entry ]64 %tmp0 = getelementptr inbounds i64, ptr %a, i64 %i65 %tmp1 = load i64, ptr %tmp0, align 866 %tmp2 = add i64 %tmp1, %r67 %i.next = add nuw nsw i64 %i, 168 %cond = icmp slt i64 %i.next, %n69 br i1 %cond, label %for.body, label %for.end70 71for.end:72 %tmp3 = phi i64 [ %tmp2, %for.body ]73 ret i64 %tmp374}75 76 77;78; This test ensures that the primary induction is not considered dead when79; acting as the 'add' of another induction, and otherwise feeding only its own80; 'add' (recognized earlier as 'dead'), when the tail of the loop is folded by81; masking. Such masking uses the primary induction.82;83define void @pr47390(ptr %a) {84; CHECK-LABEL: define void @pr47390(85; CHECK-SAME: ptr [[A:%.*]]) {86; CHECK-NEXT: [[ENTRY:.*:]]87; CHECK-NEXT: br label %[[VECTOR_PH:.*]]88; CHECK: [[VECTOR_PH]]:89; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]90; CHECK: [[VECTOR_BODY]]:91; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]92; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 493; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[INDEX_NEXT]], 894; CHECK-NEXT: br i1 [[TMP0]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]95; CHECK: [[MIDDLE_BLOCK]]:96; CHECK-NEXT: br label %[[EXIT:.*]]97; CHECK: [[EXIT]]:98; CHECK-NEXT: ret void99;100entry:101 br label %loop102 103exit:104 ret void105 106loop:107 %primary = phi i32 [ 0, %entry ], [ %primary_add, %loop ]108 %use_primary = phi i32 [ -1, %entry ], [ %primary, %loop ]109 %secondary = phi i32 [ 1, %entry ], [ %secondary_add, %loop ]110 %primary_add = add i32 %primary, 1111 %secondary_add = add i32 %secondary, 1112 %gep = getelementptr inbounds i32, ptr %a, i32 %secondary113 %load = load i32, ptr %gep, align 8114 %cmp = icmp eq i32 %secondary, 5115 br i1 %cmp, label %exit, label %loop116}117 118; Test with a dead load and dead vector poiner.119define void @dead_load_and_vector_pointer(ptr %a, ptr %b) {120; CHECK-LABEL: define void @dead_load_and_vector_pointer(121; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) {122; CHECK-NEXT: [[ENTRY:.*:]]123; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]124; CHECK: [[VECTOR_MEMCHECK]]:125; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 516126; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 516127; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]128; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]129; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]130; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]131; CHECK: [[VECTOR_PH]]:132; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]133; CHECK: [[VECTOR_BODY]]:134; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]135; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[INDEX]]136; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 2137; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 8, !alias.scope [[META5:![0-9]+]], !noalias [[META8:![0-9]+]]138; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <2 x i32>, ptr [[TMP1]], align 8, !alias.scope [[META5]], !noalias [[META8]]139; CHECK-NEXT: [[TMP6:%.*]] = add <2 x i32> [[WIDE_LOAD]], splat (i32 1)140; CHECK-NEXT: [[TMP7:%.*]] = add <2 x i32> [[WIDE_LOAD2]], splat (i32 1)141; CHECK-NEXT: store <2 x i32> [[TMP6]], ptr [[TMP2]], align 4, !alias.scope [[META5]], !noalias [[META8]]142; CHECK-NEXT: store <2 x i32> [[TMP7]], ptr [[TMP1]], align 4, !alias.scope [[META5]], !noalias [[META8]]143; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4144; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[INDEX_NEXT]], 128145; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]146; CHECK: [[MIDDLE_BLOCK]]:147; CHECK-NEXT: br label %[[SCALAR_PH]]148; CHECK: [[SCALAR_PH]]:149; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 128, %[[MIDDLE_BLOCK]] ], [ 0, %[[VECTOR_MEMCHECK]] ]150; CHECK-NEXT: br label %[[LOOP:.*]]151; CHECK: [[EXIT:.*]]:152; CHECK-NEXT: ret void153; CHECK: [[LOOP]]:154; CHECK-NEXT: [[PRIMARY:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[PRIMARY_ADD:%.*]], %[[LOOP]] ]155; CHECK-NEXT: [[PRIMARY_ADD]] = add i32 [[PRIMARY]], 1156; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[PRIMARY]]157; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[GEP]], align 8158; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LOAD]], 1159; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP]], align 4160; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[PRIMARY]]161; CHECK-NEXT: [[LOAD2:%.*]] = load i32, ptr [[GEP_B]], align 4162; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PRIMARY]], 128163; CHECK-NEXT: br i1 [[CMP]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP11:![0-9]+]]164;165entry:166 br label %loop167 168exit:169 ret void170 171loop:172 %primary = phi i32 [ 0, %entry ], [ %primary_add, %loop ]173 %primary_add = add i32 %primary, 1174 %gep = getelementptr inbounds i32, ptr %a, i32 %primary175 %load = load i32, ptr %gep, align 8176 %add = add i32 %load, 1177 store i32 %add, ptr %gep178 %gep.b = getelementptr inbounds i32, ptr %b, i32 %primary179 %load2 = load i32, ptr %gep.b180 %cmp = icmp eq i32 %primary, 128181 br i1 %cmp, label %exit, label %loop182}183;.184; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}185; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}186; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}187; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}188; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}189; CHECK: [[META5]] = !{[[META6:![0-9]+]]}190; CHECK: [[META6]] = distinct !{[[META6]], [[META7:![0-9]+]]}191; CHECK: [[META7]] = distinct !{[[META7]], !"LVerDomain"}192; CHECK: [[META8]] = !{[[META9:![0-9]+]]}193; CHECK: [[META9]] = distinct !{[[META9]], [[META7]]}194; CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}195; CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]]}196;.197