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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=3 -force-vector-width=2 -S | FileCheck %s3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"5 6; Make sure the loop is vectorized and unrolled under -Os without folding its7; tail based on its trip-count being provably divisible by chosen VFxIC.8 9define dso_local void @constTC(ptr noalias nocapture %A) optsize {10; CHECK-LABEL: @constTC(11; CHECK-NEXT: entry:12; CHECK-NEXT: br label [[VECTOR_PH:%.*]]13; CHECK: vector.ph:14; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]15; CHECK: vector.body:16; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]17; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]]18; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 219; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 420; CHECK-NEXT: store <2 x i32> splat (i32 13), ptr [[TMP3]], align 121; CHECK-NEXT: store <2 x i32> splat (i32 13), ptr [[TMP7]], align 122; CHECK-NEXT: store <2 x i32> splat (i32 13), ptr [[TMP8]], align 123; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 624; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[INDEX_NEXT]], 180025; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]26; CHECK: middle.block:27; CHECK-NEXT: br label [[LOOP:%.*]]28; CHECK: exit:29; CHECK-NEXT: ret void30;31entry:32 br label %loop33 34loop:35 %riv = phi i32 [ 0, %entry ], [ %rivPlus1, %loop ]36 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %riv37 store i32 13, ptr %arrayidx, align 138 %rivPlus1 = add nuw nsw i32 %riv, 139 %cond = icmp eq i32 %rivPlus1, 180040 br i1 %cond, label %exit, label %loop41 42exit:43 ret void44}45