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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=loop-vectorize -force-vector-width=4 -S | FileCheck %s3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"5 6; Make sure the loop is vectorized under -Os without folding its tail based on7; its trip-count's lower bits known to be zero.8 9define dso_local void @alignTC(ptr noalias nocapture %A, i32 %n) optsize {10; CHECK-LABEL: @alignTC(11; CHECK-NEXT: entry:12; CHECK-NEXT: [[ALIGNEDTC:%.*]] = and i32 [[N:%.*]], -813; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[ALIGNEDTC]], 414; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]15; CHECK: vector.ph:16; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[ALIGNEDTC]], 417; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[ALIGNEDTC]], [[N_MOD_VF]]18; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]19; CHECK: vector.body:20; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]21; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]]22; CHECK-NEXT: store <4 x i32> splat (i32 13), ptr [[TMP1]], align 123; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 424; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]25; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]26; CHECK: middle.block:27; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[ALIGNEDTC]], [[N_VEC]]28; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]29; CHECK: scalar.ph:30; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]31; CHECK-NEXT: br label [[LOOP:%.*]]32; CHECK: loop:33; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [[LOOP]] ]34; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[RIV]]35; CHECK-NEXT: store i32 13, ptr [[ARRAYIDX]], align 136; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 137; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], [[ALIGNEDTC]]38; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]39; CHECK: exit:40; CHECK-NEXT: ret void41;42entry:43 %alignedTC = and i32 %n, -844 br label %loop45 46loop:47 %riv = phi i32 [ 0, %entry ], [ %rivPlus1, %loop ]48 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %riv49 store i32 13, ptr %arrayidx, align 150 %rivPlus1 = add nuw nsw i32 %riv, 151 %cond = icmp eq i32 %rivPlus1, %alignedTC52 br i1 %cond, label %exit, label %loop53 54exit:55 ret void56}57 58; Make sure the loop is vectorized under -Os without folding its tail based on59; its trip-count's lower bits assumed to be zero.60 61define dso_local void @assumeAlignedTC(ptr noalias nocapture %A, i32 %p, i32 %q) optsize {62; CHECK-LABEL: @assumeAlignedTC(63; CHECK-NEXT: entry:64; CHECK-NEXT: [[AND1:%.*]] = and i32 [[P:%.*]], 365; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[AND1]], 066; CHECK-NEXT: br i1 [[CMP1]], label [[GUARDED:%.*]], label [[EXIT:%.*]]67; CHECK: guarded:68; CHECK-NEXT: [[REM:%.*]] = urem i32 [[Q:%.*]], 869; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[REM]], 070; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP2]])71; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[P]], [[Q]]72; CHECK-NEXT: [[N:%.*]] = select i1 [[GT]], i32 [[P]], i32 [[Q]]73; CHECK-NEXT: [[CMP110:%.*]] = icmp sgt i32 [[N]], 074; CHECK-NEXT: br i1 [[CMP110]], label [[LOOP_PREHEADER:%.*]], label [[EXIT]]75; CHECK: loop.preheader:76; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 477; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]78; CHECK: vector.ph:79; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 480; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]81; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]82; CHECK: vector.body:83; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]84; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]]85; CHECK-NEXT: store <4 x i32> splat (i32 13), ptr [[TMP1]], align 186; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 487; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]88; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]89; CHECK: middle.block:90; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]91; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]]92; CHECK: scalar.ph:93; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ]94; CHECK-NEXT: br label [[LOOP:%.*]]95; CHECK: loop:96; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[RIVPLUS1:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]97; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[RIV]]98; CHECK-NEXT: store i32 13, ptr [[ARRAYIDX]], align 199; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1100; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], [[N]]101; CHECK-NEXT: br i1 [[COND]], label [[EXIT_LOOPEXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]102; CHECK: exit.loopexit:103; CHECK-NEXT: br label [[EXIT]]104; CHECK: exit:105; CHECK-NEXT: ret void106;107entry:108 %and1 = and i32 %p, 3109 %cmp1 = icmp eq i32 %and1, 0110 br i1 %cmp1, label %guarded, label %exit111 112guarded:113 %rem = urem i32 %q, 8114 %cmp2 = icmp eq i32 %rem, 0115 tail call void @llvm.assume(i1 %cmp2)116 %gt = icmp sgt i32 %p, %q117 %n = select i1 %gt, i32 %p, i32 %q118 %cmp110 = icmp sgt i32 %n, 0119 br i1 %cmp110, label %loop, label %exit120 121loop:122 %riv = phi i32 [ 0, %guarded ], [ %rivPlus1, %loop ]123 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %riv124 store i32 13, ptr %arrayidx, align 1125 %rivPlus1 = add nuw nsw i32 %riv, 1126 %cond = icmp eq i32 %rivPlus1, %n127 br i1 %cond, label %exit, label %loop128 129exit:130 ret void131}132 133; Make sure the loop's tail is folded when vectorized under -Os based on its trip-count's134; not being provably divisible by chosen VF.135 136define dso_local void @cannotProveAlignedTC(ptr noalias nocapture %A, i32 %p, i32 %q) optsize {137; CHECK-LABEL: @cannotProveAlignedTC(138; CHECK-NEXT: entry:139; CHECK-NEXT: [[AND1:%.*]] = and i32 [[P:%.*]], 3140; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[AND1]], 0141; CHECK-NEXT: br i1 [[CMP1]], label [[GUARDED:%.*]], label [[EXIT:%.*]]142; CHECK: guarded:143; CHECK-NEXT: [[REM:%.*]] = urem i32 [[Q:%.*]], 3144; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[REM]], 0145; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP2]])146; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[P]], [[Q]]147; CHECK-NEXT: [[N:%.*]] = select i1 [[GT]], i32 [[P]], i32 [[Q]]148; CHECK-NEXT: [[CMP110:%.*]] = icmp sgt i32 [[N]], 0149; CHECK-NEXT: br i1 [[CMP110]], label [[LOOP_PREHEADER:%.*]], label [[EXIT]]150; CHECK: loop.preheader:151; CHECK-NEXT: br label [[VECTOR_PH:%.*]]152; CHECK: vector.ph:153; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 3154; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N_RND_UP]], 4155; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N_RND_UP]], [[N_MOD_VF]]156; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i32 [[N]], 1157; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0158; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer159; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]160; CHECK: vector.body:161; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ]162; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ]163; CHECK-NEXT: [[TMP0:%.*]] = icmp ule <4 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]]164; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0165; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]166; CHECK: pred.store.if:167; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[INDEX]], 0168; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP2]]169; CHECK-NEXT: store i32 13, ptr [[TMP3]], align 1170; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]]171; CHECK: pred.store.continue:172; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1173; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]]174; CHECK: pred.store.if1:175; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 1176; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP5]]177; CHECK-NEXT: store i32 13, ptr [[TMP6]], align 1178; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]]179; CHECK: pred.store.continue2:180; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2181; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]]182; CHECK: pred.store.if3:183; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[INDEX]], 2184; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP8]]185; CHECK-NEXT: store i32 13, ptr [[TMP9]], align 1186; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]]187; CHECK: pred.store.continue4:188; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3189; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]]190; CHECK: pred.store.if5:191; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[INDEX]], 3192; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP11]]193; CHECK-NEXT: store i32 13, ptr [[TMP12]], align 1194; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]]195; CHECK: pred.store.continue6:196; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4197; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)198; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]199; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]200; CHECK: middle.block:201; CHECK-NEXT: br label [[LOOP:%.*]]202; CHECK: exit.loopexit:203; CHECK-NEXT: br label [[EXIT]]204; CHECK: exit:205; CHECK-NEXT: ret void206;207entry:208 %and1 = and i32 %p, 3209 %cmp1 = icmp eq i32 %and1, 0210 br i1 %cmp1, label %guarded, label %exit211 212guarded:213 %rem = urem i32 %q, 3214 %cmp2 = icmp eq i32 %rem, 0215 tail call void @llvm.assume(i1 %cmp2)216 %gt = icmp sgt i32 %p, %q217 %n = select i1 %gt, i32 %p, i32 %q218 %cmp110 = icmp sgt i32 %n, 0219 br i1 %cmp110, label %loop, label %exit220 221loop:222 %riv = phi i32 [ 0, %guarded ], [ %rivPlus1, %loop ]223 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %riv224 store i32 13, ptr %arrayidx, align 1225 %rivPlus1 = add nuw nsw i32 %riv, 1226 %cond = icmp eq i32 %rivPlus1, %n227 br i1 %cond, label %exit, label %loop228 229exit:230 ret void231}232 233declare void @llvm.assume(i1 noundef) nofree nosync nounwind willreturn234