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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -p loop-vectorize -force-vector-width=4 -enable-epilogue-vectorization -epilogue-vectorization-force-VF=4 -S %s | FileCheck %s3 4target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"5 6define void @trunc_iv_steps_with_epilogue(ptr %A, i64 %N) {7; CHECK-LABEL: define void @trunc_iv_steps_with_epilogue(8; CHECK-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) {9; CHECK-NEXT: iter.check:10; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], 111; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 412; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]13; CHECK: vector.scevcheck:14; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[N]] to i3215; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 016; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i64 [[N]], 429496729517; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP2]], [[TMP3]]18; CHECK-NEXT: br i1 [[TMP4]], label [[VEC_EPILOG_SCALAR_PH]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]19; CHECK: vector.main.loop.iter.check:20; CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[TMP0]], 421; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]22; CHECK: vector.ph:23; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 424; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]25; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]26; CHECK: vector.body:27; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]28; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[INDEX]] to i3229; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[A]], i32 [[TMP5]]30; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr [[TMP7]], align 131; CHECK-NEXT: [[TMP9:%.*]] = add <4 x i8> [[WIDE_LOAD]], splat (i8 2)32; CHECK-NEXT: store <4 x i8> [[TMP9]], ptr [[TMP7]], align 133; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 434; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]35; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]36; CHECK: middle.block:37; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]38; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]]39; CHECK: vec.epilog.iter.check:40; CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[N_MOD_VF]], 441; CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label [[VEC_EPILOG_SCALAR_PH]], label [[VEC_EPILOG_PH]], !prof [[PROF3:![0-9]+]]42; CHECK: vec.epilog.ph:43; CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ]44; CHECK-NEXT: [[N_MOD_VF2:%.*]] = urem i64 [[TMP0]], 445; CHECK-NEXT: [[N_VEC3:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF2]]46; CHECK-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]]47; CHECK: vec.epilog.vector.body:48; CHECK-NEXT: [[INDEX5:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT7:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ]49; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[INDEX5]] to i3250; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[A]], i32 [[TMP11]]51; CHECK-NEXT: [[WIDE_LOAD6:%.*]] = load <4 x i8>, ptr [[TMP13]], align 152; CHECK-NEXT: [[TMP15:%.*]] = add <4 x i8> [[WIDE_LOAD6]], splat (i8 2)53; CHECK-NEXT: store <4 x i8> [[TMP15]], ptr [[TMP13]], align 154; CHECK-NEXT: [[INDEX_NEXT7]] = add nuw i64 [[INDEX5]], 455; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT7]], [[N_VEC3]]56; CHECK-NEXT: br i1 [[TMP16]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]57; CHECK: vec.epilog.middle.block:58; CHECK-NEXT: [[CMP_N4:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC3]]59; CHECK-NEXT: br i1 [[CMP_N4]], label [[EXIT]], label [[VEC_EPILOG_SCALAR_PH]]60; CHECK: vec.epilog.scalar.ph:61; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC3]], [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[ITER_CHECK:%.*]] ]62; CHECK-NEXT: br label [[LOOP:%.*]]63; CHECK: loop:64; CHECK-NEXT: [[IV_I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]65; CHECK-NEXT: [[T_IV:%.*]] = trunc i64 [[IV_I]] to i3266; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[A]], i32 [[T_IV]]67; CHECK-NEXT: [[L:%.*]] = load i8, ptr [[GEP]], align 168; CHECK-NEXT: [[ADD:%.*]] = add i8 [[L]], 269; CHECK-NEXT: store i8 [[ADD]], ptr [[GEP]], align 170; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV_I]], 171; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_I]], [[N]]72; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]73; CHECK: exit:74; CHECK-NEXT: ret void75;76entry:77 br label %loop78 79loop:80 %iv.i = phi i64 [ 0, %entry ], [ %iv.next, %loop ]81 %t.iv = trunc i64 %iv.i to i3282 %gep = getelementptr i8, ptr %A, i32 %t.iv83 %l = load i8, ptr %gep, align 184 %add = add i8 %l, 285 store i8 %add, ptr %gep86 %iv.next = add i64 %iv.i, 187 %ec = icmp eq i64 %iv.i, %N88 br i1 %ec, label %exit, label %loop89 90exit:91 ret void92}93;.94; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}95; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}96; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}97; CHECK: [[PROF3]] = !{!"branch_weights", i32 4, i32 0}98; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}99; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]]}100;.101