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1; RUN: opt < %s -passes=loop-vectorize -enable-vplan-native-path -debug-only=loop-vectorize --disable-output -S 2>&1 | FileCheck %s2; REQUIRES: asserts3 4; Verify that outer loops annotated only with the expected explicit5; vectorization hints are collected for vectorization instead of inner loops.6 7; Root C/C++ source code for all the test cases8; void foo(int *a, int *b, int N, int M)9; {10; int i, j;11; #pragma clang loop vectorize(enable)12; for (i = 0; i < N; i++) {13; for (j = 0; j < M; j++) {14; a[i*M+j] = bptr b[i*M+j];15; }16; }17; }18 19; Case 1: Annotated outer loop WITH vector width information must be collected.20 21; CHECK-LABEL: vector_width22; CHECK: LV: Loop hints: force=enabled width=4 interleave=023; CHECK: LV: We can vectorize this outer loop!24; CHECK: LV: Using user VF 4 to build VPlans.25; CHECK-NOT: LV: Loop hints: force=?26; CHECK-NOT: LV: Found a loop: inner.body27 28target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"29 30define void @vector_width(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {31entry:32 %cmp32 = icmp sgt i32 %N, 033 br i1 %cmp32, label %outer.ph, label %for.end1534 35outer.ph: ; preds = %entry36 %cmp230 = icmp sgt i32 %M, 037 %0 = sext i32 %M to i6438 %wide.trip.count = zext i32 %M to i6439 %wide.trip.count38 = zext i32 %N to i6440 br label %outer.body41 42outer.body: ; preds = %outer.inc, %outer.ph43 %indvars.iv35 = phi i64 [ 0, %outer.ph ], [ %indvars.iv.next36, %outer.inc ]44 br i1 %cmp230, label %inner.ph, label %outer.inc45 46inner.ph: ; preds = %outer.body47 %1 = mul nsw i64 %indvars.iv35, %048 br label %inner.body49 50inner.body: ; preds = %inner.body, %inner.ph51 %indvars.iv = phi i64 [ 0, %inner.ph ], [ %indvars.iv.next, %inner.body ]52 %2 = add nsw i64 %indvars.iv, %153 %arrayidx = getelementptr inbounds i32, ptr %b, i64 %254 %3 = load i32, ptr %arrayidx, align 4, !tbaa !255 %mul8 = mul nsw i32 %3, %356 %arrayidx12 = getelementptr inbounds i32, ptr %a, i64 %257 store i32 %mul8, ptr %arrayidx12, align 4, !tbaa !258 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 159 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count60 br i1 %exitcond, label %outer.inc, label %inner.body61 62outer.inc: ; preds = %inner.body, %outer.body63 %indvars.iv.next36 = add nuw nsw i64 %indvars.iv35, 164 %exitcond39 = icmp eq i64 %indvars.iv.next36, %wide.trip.count3865 br i1 %exitcond39, label %for.end15, label %outer.body, !llvm.loop !666 67for.end15: ; preds = %outer.inc, %entry68 ret void69}70 71; Case 2: Annotated outer loop WITHOUT vector width information must be collected.72 73; CHECK-LABEL: case274; CHECK: LV: Loop hints: force=enabled width=0 interleave=075; CHECK: LV: We can vectorize this outer loop!76; CHECK: LV: Using VF 1 to build VPlans.77 78define void @case2(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {79entry:80 %cmp32 = icmp sgt i32 %N, 081 br i1 %cmp32, label %outer.ph, label %for.end1582 83outer.ph: ; preds = %entry84 %cmp230 = icmp sgt i32 %M, 085 %0 = sext i32 %M to i6486 %wide.trip.count = zext i32 %M to i6487 %wide.trip.count38 = zext i32 %N to i6488 br label %outer.body89 90outer.body: ; preds = %outer.inc, %outer.ph91 %indvars.iv35 = phi i64 [ 0, %outer.ph ], [ %indvars.iv.next36, %outer.inc ]92 br i1 %cmp230, label %inner.ph, label %outer.inc93 94inner.ph: ; preds = %outer.body95 %1 = mul nsw i64 %indvars.iv35, %096 br label %inner.body97 98inner.body: ; preds = %inner.body, %inner.ph99 %indvars.iv = phi i64 [ 0, %inner.ph ], [ %indvars.iv.next, %inner.body ]100 %2 = add nsw i64 %indvars.iv, %1101 %arrayidx = getelementptr inbounds i32, ptr %b, i64 %2102 %3 = load i32, ptr %arrayidx, align 4, !tbaa !2103 %mul8 = mul nsw i32 %3, %3104 %arrayidx12 = getelementptr inbounds i32, ptr %a, i64 %2105 store i32 %mul8, ptr %arrayidx12, align 4, !tbaa !2106 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1107 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count108 br i1 %exitcond, label %outer.inc, label %inner.body109 110outer.inc: ; preds = %inner.body, %outer.body111 %indvars.iv.next36 = add nuw nsw i64 %indvars.iv35, 1112 %exitcond39 = icmp eq i64 %indvars.iv.next36, %wide.trip.count38113 br i1 %exitcond39, label %for.end15, label %outer.body, !llvm.loop !9114 115for.end15: ; preds = %outer.inc, %entry116 ret void117}118 119; Case 3: Annotated outer loop WITH vector width and interleave information120; doesn't have to be collected.121 122; CHECK-LABEL: case3123; CHECK-NOT: LV: Loop hints: force=enabled124; CHECK-NOT: LV: We can vectorize this outer loop!125; CHECK: LV: Loop hints: force=?126; CHECK: LV: Found a loop: inner.body127 128define void @case3(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {129entry:130 %cmp32 = icmp sgt i32 %N, 0131 br i1 %cmp32, label %outer.ph, label %for.end15132 133outer.ph: ; preds = %entry134 %cmp230 = icmp sgt i32 %M, 0135 %0 = sext i32 %M to i64136 %wide.trip.count = zext i32 %M to i64137 %wide.trip.count38 = zext i32 %N to i64138 br label %outer.body139 140outer.body: ; preds = %outer.inc, %outer.ph141 %indvars.iv35 = phi i64 [ 0, %outer.ph ], [ %indvars.iv.next36, %outer.inc ]142 br i1 %cmp230, label %inner.ph, label %outer.inc143 144inner.ph: ; preds = %outer.body145 %1 = mul nsw i64 %indvars.iv35, %0146 br label %inner.body147 148inner.body: ; preds = %inner.body, %inner.ph149 %indvars.iv = phi i64 [ 0, %inner.ph ], [ %indvars.iv.next, %inner.body ]150 %2 = add nsw i64 %indvars.iv, %1151 %arrayidx = getelementptr inbounds i32, ptr %b, i64 %2152 %3 = load i32, ptr %arrayidx, align 4, !tbaa !2153 %mul8 = mul nsw i32 %3, %3154 %arrayidx12 = getelementptr inbounds i32, ptr %a, i64 %2155 store i32 %mul8, ptr %arrayidx12, align 4, !tbaa !2156 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1157 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count158 br i1 %exitcond, label %outer.inc, label %inner.body159 160outer.inc: ; preds = %inner.body, %outer.body161 %indvars.iv.next36 = add nuw nsw i64 %indvars.iv35, 1162 %exitcond39 = icmp eq i64 %indvars.iv.next36, %wide.trip.count38163 br i1 %exitcond39, label %for.end15, label %outer.body, !llvm.loop !11164 165for.end15: ; preds = %outer.inc, %entry166 ret void167}168 169; Case 4: Outer loop without any explicit vectorization annotation doesn't have170; to be collected.171 172; CHECK-LABEL: case4173; CHECK-NOT: LV: Loop hints: force=enabled174; CHECK-NOT: LV: We can vectorize this outer loop!175; CHECK: LV: Loop hints: force=?176; CHECK: LV: Found a loop: inner.body177 178define void @case4(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {179entry:180 %cmp32 = icmp sgt i32 %N, 0181 br i1 %cmp32, label %outer.ph, label %for.end15182 183outer.ph: ; preds = %entry184 %cmp230 = icmp sgt i32 %M, 0185 %0 = sext i32 %M to i64186 %wide.trip.count = zext i32 %M to i64187 %wide.trip.count38 = zext i32 %N to i64188 br label %outer.body189 190outer.body: ; preds = %outer.inc, %outer.ph191 %indvars.iv35 = phi i64 [ 0, %outer.ph ], [ %indvars.iv.next36, %outer.inc ]192 br i1 %cmp230, label %inner.ph, label %outer.inc193 194inner.ph: ; preds = %outer.body195 %1 = mul nsw i64 %indvars.iv35, %0196 br label %inner.body197 198inner.body: ; preds = %inner.body, %inner.ph199 %indvars.iv = phi i64 [ 0, %inner.ph ], [ %indvars.iv.next, %inner.body ]200 %2 = add nsw i64 %indvars.iv, %1201 %arrayidx = getelementptr inbounds i32, ptr %b, i64 %2202 %3 = load i32, ptr %arrayidx, align 4, !tbaa !2203 %mul8 = mul nsw i32 %3, %3204 %arrayidx12 = getelementptr inbounds i32, ptr %a, i64 %2205 store i32 %mul8, ptr %arrayidx12, align 4, !tbaa !2206 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1207 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count208 br i1 %exitcond, label %outer.inc, label %inner.body209 210outer.inc: ; preds = %inner.body, %outer.body211 %indvars.iv.next36 = add nuw nsw i64 %indvars.iv35, 1212 %exitcond39 = icmp eq i64 %indvars.iv.next36, %wide.trip.count38213 br i1 %exitcond39, label %for.end15, label %outer.body214 215for.end15: ; preds = %outer.inc, %entry216 ret void217}218 219!llvm.module.flags = !{!0}220!llvm.ident = !{!1}221 222!0 = !{i32 1, !"wchar_size", i32 4}223!1 = !{!"clang version 6.0.0"}224!2 = !{!3, !3, i64 0}225!3 = !{!"int", !4, i64 0}226!4 = !{!"omnipotent char", !5, i64 0}227!5 = !{!"Simple C/C++ TBAA"}228; Case 1229!6 = distinct !{!6, !7, !8}230!7 = !{!"llvm.loop.vectorize.width", i32 4}231!8 = !{!"llvm.loop.vectorize.enable", i1 true}232; Case 2233!9 = distinct !{!9, !8}234; Case 3235!10 = !{!"llvm.loop.interleave.count", i32 2}236!11 = distinct !{!11, !7, !10, !8}237