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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "loop:" --version 62; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=3 -S %s | FileCheck --check-prefix=IC3 %s3; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=4 -S %s | FileCheck --check-prefix=IC4 %s4; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=5 -S %s | FileCheck --check-prefix=IC5 %s5 6define float @fmaxnum(ptr %src, i64 %n) {7; IC3-LABEL: define float @fmaxnum(8; IC3-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {9; IC3-NEXT: [[ENTRY:.*]]:10; IC3-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 1211; IC3-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]12; IC3: [[VECTOR_PH]]:13; IC3-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 1214; IC3-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]15; IC3-NEXT: br label %[[VECTOR_BODY:.*]]16; IC3: [[VECTOR_BODY]]:17; IC3-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]18; IC3-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]19; IC3-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP4:%.*]], %[[VECTOR_BODY]] ]20; IC3-NEXT: [[VEC_PHI2:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]21; IC3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[INDEX]]22; IC3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw float, ptr [[TMP0]], i64 423; IC3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw float, ptr [[TMP0]], i64 824; IC3-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 425; IC3-NEXT: [[WIDE_LOAD3:%.*]] = load <4 x float>, ptr [[TMP1]], align 426; IC3-NEXT: [[WIDE_LOAD4:%.*]] = load <4 x float>, ptr [[TMP2]], align 427; IC3-NEXT: [[TMP3]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI]], <4 x float> [[WIDE_LOAD]])28; IC3-NEXT: [[TMP4]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI1]], <4 x float> [[WIDE_LOAD3]])29; IC3-NEXT: [[TMP5]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI2]], <4 x float> [[WIDE_LOAD4]])30; IC3-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 1231; IC3-NEXT: [[TMP8:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD4]], [[WIDE_LOAD4]]32; IC3-NEXT: [[TMP7:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD3]]33; IC3-NEXT: [[TMP10:%.*]] = freeze <4 x i1> [[TMP7]]34; IC3-NEXT: [[TMP12:%.*]] = freeze <4 x i1> [[TMP8]]35; IC3-NEXT: [[TMP13:%.*]] = or <4 x i1> [[TMP10]], [[TMP12]]36; IC3-NEXT: [[TMP14:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP13]])37; IC3-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]38; IC3-NEXT: [[TMP16:%.*]] = or i1 [[TMP14]], [[TMP15]]39; IC3-NEXT: br i1 [[TMP16]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]40; IC3: [[MIDDLE_BLOCK]]:41; IC3-NEXT: [[TMP17:%.*]] = select i1 [[TMP14]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP3]]42; IC3-NEXT: [[TMP18:%.*]] = select i1 [[TMP14]], <4 x float> [[VEC_PHI1]], <4 x float> [[TMP4]]43; IC3-NEXT: [[TMP19:%.*]] = select i1 [[TMP14]], <4 x float> [[VEC_PHI2]], <4 x float> [[TMP5]]44; IC3-NEXT: [[TMP20:%.*]] = select i1 [[TMP14]], i64 [[INDEX]], i64 [[N_VEC]]45; IC3-NEXT: [[RDX_MINMAX:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[TMP17]], <4 x float> [[TMP18]])46; IC3-NEXT: [[RDX_MINMAX5:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[RDX_MINMAX]], <4 x float> [[TMP19]])47; IC3-NEXT: [[TMP21:%.*]] = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[RDX_MINMAX5]])48; IC3-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]49; IC3-NEXT: [[TMP22:%.*]] = xor i1 [[TMP14]], true50; IC3-NEXT: [[TMP23:%.*]] = and i1 [[CMP_N]], [[TMP22]]51; IC3-NEXT: br i1 [[TMP23]], [[EXIT:label %.*]], label %[[SCALAR_PH]]52; IC3: [[SCALAR_PH]]:53; IC3-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP20]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]54; IC3-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP21]], %[[MIDDLE_BLOCK]] ], [ -1.000000e+07, %[[ENTRY]] ]55; IC3-NEXT: br label %[[LOOP:.*]]56; IC3: [[LOOP]]:57;58; IC4-LABEL: define float @fmaxnum(59; IC4-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {60; IC4-NEXT: [[ENTRY:.*]]:61; IC4-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 1662; IC4-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]63; IC4: [[VECTOR_PH]]:64; IC4-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 1665; IC4-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]66; IC4-NEXT: br label %[[VECTOR_BODY:.*]]67; IC4: [[VECTOR_BODY]]:68; IC4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]69; IC4-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP4:%.*]], %[[VECTOR_BODY]] ]70; IC4-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]71; IC4-NEXT: [[VEC_PHI2:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]72; IC4-NEXT: [[VEC_PHI3:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ]73; IC4-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[INDEX]]74; IC4-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw float, ptr [[TMP0]], i64 475; IC4-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw float, ptr [[TMP0]], i64 876; IC4-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP0]], i64 1277; IC4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 478; IC4-NEXT: [[WIDE_LOAD4:%.*]] = load <4 x float>, ptr [[TMP1]], align 479; IC4-NEXT: [[WIDE_LOAD5:%.*]] = load <4 x float>, ptr [[TMP2]], align 480; IC4-NEXT: [[WIDE_LOAD6:%.*]] = load <4 x float>, ptr [[TMP3]], align 481; IC4-NEXT: [[TMP4]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI]], <4 x float> [[WIDE_LOAD]])82; IC4-NEXT: [[TMP5]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI1]], <4 x float> [[WIDE_LOAD4]])83; IC4-NEXT: [[TMP6]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI2]], <4 x float> [[WIDE_LOAD5]])84; IC4-NEXT: [[TMP7]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI3]], <4 x float> [[WIDE_LOAD6]])85; IC4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 1686; IC4-NEXT: [[TMP24:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD4]]87; IC4-NEXT: [[TMP25:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD5]], [[WIDE_LOAD6]]88; IC4-NEXT: [[TMP26:%.*]] = freeze <4 x i1> [[TMP24]]89; IC4-NEXT: [[TMP28:%.*]] = freeze <4 x i1> [[TMP25]]90; IC4-NEXT: [[TMP29:%.*]] = or <4 x i1> [[TMP26]], [[TMP28]]91; IC4-NEXT: [[TMP13:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP29]])92; IC4-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]93; IC4-NEXT: [[TMP15:%.*]] = or i1 [[TMP13]], [[TMP14]]94; IC4-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]95; IC4: [[MIDDLE_BLOCK]]:96; IC4-NEXT: [[TMP16:%.*]] = select i1 [[TMP13]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP4]]97; IC4-NEXT: [[TMP17:%.*]] = select i1 [[TMP13]], <4 x float> [[VEC_PHI1]], <4 x float> [[TMP5]]98; IC4-NEXT: [[TMP18:%.*]] = select i1 [[TMP13]], <4 x float> [[VEC_PHI2]], <4 x float> [[TMP6]]99; IC4-NEXT: [[TMP19:%.*]] = select i1 [[TMP13]], <4 x float> [[VEC_PHI3]], <4 x float> [[TMP7]]100; IC4-NEXT: [[TMP20:%.*]] = select i1 [[TMP13]], i64 [[INDEX]], i64 [[N_VEC]]101; IC4-NEXT: [[RDX_MINMAX:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[TMP16]], <4 x float> [[TMP17]])102; IC4-NEXT: [[RDX_MINMAX7:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[RDX_MINMAX]], <4 x float> [[TMP18]])103; IC4-NEXT: [[RDX_MINMAX8:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[RDX_MINMAX7]], <4 x float> [[TMP19]])104; IC4-NEXT: [[TMP21:%.*]] = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[RDX_MINMAX8]])105; IC4-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]106; IC4-NEXT: [[TMP22:%.*]] = xor i1 [[TMP13]], true107; IC4-NEXT: [[TMP23:%.*]] = and i1 [[CMP_N]], [[TMP22]]108; IC4-NEXT: br i1 [[TMP23]], [[EXIT:label %.*]], label %[[SCALAR_PH]]109; IC4: [[SCALAR_PH]]:110; IC4-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP20]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]111; IC4-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP21]], %[[MIDDLE_BLOCK]] ], [ -1.000000e+07, %[[ENTRY]] ]112; IC4-NEXT: br label %[[LOOP:.*]]113; IC4: [[LOOP]]:114;115; IC5-LABEL: define float @fmaxnum(116; IC5-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {117; IC5-NEXT: [[ENTRY:.*]]:118; IC5-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 20119; IC5-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]120; IC5: [[VECTOR_PH]]:121; IC5-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 20122; IC5-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]123; IC5-NEXT: br label %[[VECTOR_BODY:.*]]124; IC5: [[VECTOR_BODY]]:125; IC5-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]126; IC5-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]127; IC5-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]128; IC5-NEXT: [[VEC_PHI2:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ]129; IC5-NEXT: [[VEC_PHI3:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ]130; IC5-NEXT: [[VEC_PHI4:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP9:%.*]], %[[VECTOR_BODY]] ]131; IC5-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[INDEX]]132; IC5-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw float, ptr [[TMP0]], i64 4133; IC5-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw float, ptr [[TMP0]], i64 8134; IC5-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP0]], i64 12135; IC5-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw float, ptr [[TMP0]], i64 16136; IC5-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 4137; IC5-NEXT: [[WIDE_LOAD5:%.*]] = load <4 x float>, ptr [[TMP1]], align 4138; IC5-NEXT: [[WIDE_LOAD6:%.*]] = load <4 x float>, ptr [[TMP2]], align 4139; IC5-NEXT: [[WIDE_LOAD7:%.*]] = load <4 x float>, ptr [[TMP3]], align 4140; IC5-NEXT: [[WIDE_LOAD8:%.*]] = load <4 x float>, ptr [[TMP4]], align 4141; IC5-NEXT: [[TMP5]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI]], <4 x float> [[WIDE_LOAD]])142; IC5-NEXT: [[TMP6]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI1]], <4 x float> [[WIDE_LOAD5]])143; IC5-NEXT: [[TMP7]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI2]], <4 x float> [[WIDE_LOAD6]])144; IC5-NEXT: [[TMP8]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI3]], <4 x float> [[WIDE_LOAD7]])145; IC5-NEXT: [[TMP9]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI4]], <4 x float> [[WIDE_LOAD8]])146; IC5-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 20147; IC5-NEXT: [[TMP14:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD8]], [[WIDE_LOAD8]]148; IC5-NEXT: [[TMP12:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD5]]149; IC5-NEXT: [[TMP13:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD6]], [[WIDE_LOAD7]]150; IC5-NEXT: [[TMP18:%.*]] = freeze <4 x i1> [[TMP12]]151; IC5-NEXT: [[TMP20:%.*]] = freeze <4 x i1> [[TMP13]]152; IC5-NEXT: [[TMP21:%.*]] = or <4 x i1> [[TMP18]], [[TMP20]]153; IC5-NEXT: [[TMP22:%.*]] = freeze <4 x i1> [[TMP14]]154; IC5-NEXT: [[TMP23:%.*]] = or <4 x i1> [[TMP21]], [[TMP22]]155; IC5-NEXT: [[TMP24:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP23]])156; IC5-NEXT: [[TMP25:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]157; IC5-NEXT: [[TMP26:%.*]] = or i1 [[TMP24]], [[TMP25]]158; IC5-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]159; IC5: [[MIDDLE_BLOCK]]:160; IC5-NEXT: [[TMP27:%.*]] = select i1 [[TMP24]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP5]]161; IC5-NEXT: [[TMP28:%.*]] = select i1 [[TMP24]], <4 x float> [[VEC_PHI1]], <4 x float> [[TMP6]]162; IC5-NEXT: [[TMP29:%.*]] = select i1 [[TMP24]], <4 x float> [[VEC_PHI2]], <4 x float> [[TMP7]]163; IC5-NEXT: [[TMP30:%.*]] = select i1 [[TMP24]], <4 x float> [[VEC_PHI3]], <4 x float> [[TMP8]]164; IC5-NEXT: [[TMP31:%.*]] = select i1 [[TMP24]], <4 x float> [[VEC_PHI4]], <4 x float> [[TMP9]]165; IC5-NEXT: [[TMP32:%.*]] = select i1 [[TMP24]], i64 [[INDEX]], i64 [[N_VEC]]166; IC5-NEXT: [[RDX_MINMAX:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[TMP27]], <4 x float> [[TMP28]])167; IC5-NEXT: [[RDX_MINMAX9:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[RDX_MINMAX]], <4 x float> [[TMP29]])168; IC5-NEXT: [[RDX_MINMAX10:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[RDX_MINMAX9]], <4 x float> [[TMP30]])169; IC5-NEXT: [[RDX_MINMAX11:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[RDX_MINMAX10]], <4 x float> [[TMP31]])170; IC5-NEXT: [[TMP33:%.*]] = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[RDX_MINMAX11]])171; IC5-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]172; IC5-NEXT: [[TMP34:%.*]] = xor i1 [[TMP24]], true173; IC5-NEXT: [[TMP35:%.*]] = and i1 [[CMP_N]], [[TMP34]]174; IC5-NEXT: br i1 [[TMP35]], [[EXIT:label %.*]], label %[[SCALAR_PH]]175; IC5: [[SCALAR_PH]]:176; IC5-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP32]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]177; IC5-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP33]], %[[MIDDLE_BLOCK]] ], [ -1.000000e+07, %[[ENTRY]] ]178; IC5-NEXT: br label %[[LOOP:.*]]179; IC5: [[LOOP]]:180;181entry:182 br label %loop183 184loop:185 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]186 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]187 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv188 %l = load float, ptr %gep.src, align 4189 %max.next = call float @llvm.maxnum.f32(float %max, float %l)190 %iv.next = add nuw nsw i64 %iv, 1191 %ec = icmp eq i64 %iv.next, %n192 br i1 %ec, label %exit, label %loop193 194exit:195 ret float %max.next196}197