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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN:opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s3 4; For %for.1, we are fine initially, because the previous value %for.1.next dominates the5; user of %for.1. But for %for.2, we have to sink the user (%for.1.next) past the previous6; value %for.2.next. This however breaks the condition we have for %for.1. We cannot fix7; both first order recurrences and cannot vectorize the loop.8define i32 @c(i32 %N) {9; CHECK-LABEL: @c(10; CHECK-NEXT: entry:11; CHECK-NEXT: br label [[FOR_BODY:%.*]]12; CHECK: for.body:13; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [ 10, [[ENTRY:%.*]] ]14; CHECK-NEXT: [[FOR_1:%.*]] = phi i32 [ [[FOR_1_NEXT:%.*]], [[FOR_BODY]] ], [ 20, [[ENTRY]] ]15; CHECK-NEXT: [[FOR_2:%.*]] = phi i32 [ [[FOR_2_NEXT:%.*]], [[FOR_BODY]] ], [ 11, [[ENTRY]] ]16; CHECK-NEXT: [[FOR_1_NEXT]] = add nsw i32 [[FOR_2]], 117; CHECK-NEXT: [[FOR_2_NEXT]] = shl i32 [[FOR_1]], 2418; CHECK-NEXT: [[INC]] = add nsw i32 [[IV]], 119; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[N:%.*]]20; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND1_FOR_END_CRIT_EDGE:%.*]], label [[FOR_BODY]]21; CHECK: for.cond1.for.end_crit_edge:22; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[FOR_1_NEXT]], [[FOR_BODY]] ]23; CHECK-NEXT: [[SEXT_LCSSA:%.*]] = phi i32 [ [[FOR_2_NEXT]], [[FOR_BODY]] ]24; CHECK-NEXT: [[RES:%.*]] = add i32 [[ADD_LCSSA]], [[SEXT_LCSSA]]25; CHECK-NEXT: ret i32 [[RES]]26;27entry:28 br label %for.body29 30for.body: ; preds = %for.body.preheader, %for.body31 %iv = phi i32 [ %inc, %for.body ], [ 10, %entry ]32 %for.1 = phi i32 [ %for.1.next, %for.body ], [ 20, %entry ]33 %for.2 = phi i32 [ %for.2.next, %for.body ], [ 11, %entry ]34 %for.1.next = add nsw i32 %for.2, 135 %for.2.next = shl i32 %for.1, 2436 %inc = add nsw i32 %iv, 137 %exitcond = icmp eq i32 %inc, %N38 br i1 %exitcond, label %for.cond1.for.end_crit_edge, label %for.body39 40for.cond1.for.end_crit_edge: ; preds = %for.body41 %add.lcssa = phi i32 [ %for.1.next, %for.body ]42 %sext.lcssa = phi i32 [ %for.2.next, %for.body ]43 %res = add i32 %add.lcssa, %sext.lcssa44 ret i32 %res45}46 47 48; The 'previous' instruction of %for.2 is in a separate block.49; PR54195.50define void @multiple_recurrences_with_previous_in_different_block(i32 %a, i8 %b, ptr %ptr) {51; CHECK-LABEL: @multiple_recurrences_with_previous_in_different_block(52; CHECK-NEXT: entry:53; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]54; CHECK: loop.header:55; CHECK-NEXT: [[FOR_1:%.*]] = phi i8 [ 10, [[ENTRY:%.*]] ], [ [[FOR_1_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]56; CHECK-NEXT: [[FOR_2:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[FOR_2_NEXT:%.*]], [[LOOP_LATCH]] ]57; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH]] ]58; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[FOR_1]] to i6459; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 [[CONV]], [[FOR_2]]60; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 161; CHECK-NEXT: [[FOR_1_NEXT]] = xor i8 [[B:%.*]], 662; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 100063; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP_LATCH]]64; CHECK: loop.latch:65; CHECK-NEXT: [[PTR_GEP:%.*]] = getelementptr inbounds i64, ptr [[PTR:%.*]], i64 [[IV]]66; CHECK-NEXT: store i64 [[SUB]], ptr [[PTR_GEP]], align 467; CHECK-NEXT: [[FOR_2_NEXT]] = zext i32 [[A:%.*]] to i6468; CHECK-NEXT: br label [[LOOP_HEADER]]69; CHECK: exit:70; CHECK-NEXT: ret void71;72entry:73 br label %loop.header74 75loop.header:76 %for.1 = phi i8 [ 10, %entry ], [ %for.1.next, %loop.latch ]77 %for.2 = phi i64 [0, %entry ], [ %for.2.next, %loop.latch ]78 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]79 %conv = sext i8 %for.1 to i6480 %sub = sub nsw i64 %conv, %for.281 %iv.next = add nuw i64 %iv, 182 %for.1.next = xor i8 %b, 683 %exitcond = icmp eq i64 %iv, 100084 br i1 %exitcond, label %exit, label %loop.latch85 86loop.latch:87 %ptr.gep = getelementptr inbounds i64, ptr %ptr, i64 %iv88 store i64 %sub, ptr %ptr.gep89 %for.2.next = zext i32 %a to i6490 br label %loop.header91 92exit:93 ret void94}95 96define void @test_pr54223_sink_after_insertion_order(ptr noalias %a, ptr noalias %b, ptr noalias %dst) {97; CHECK-LABEL: @test_pr54223_sink_after_insertion_order(98; CHECK-NEXT: entry:99; CHECK-NEXT: br label [[VECTOR_PH:%.*]]100; CHECK: vector.ph:101; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]102; CHECK: vector.body:103; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]104; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x float> [ <float poison, float poison, float poison, float 0.000000e+00>, [[VECTOR_PH]] ], [ [[BROADCAST_SPLAT:%.*]], [[VECTOR_BODY]] ]105; CHECK-NEXT: [[VECTOR_RECUR1:%.*]] = phi <4 x float> [ <float poison, float poison, float poison, float 0.000000e+00>, [[VECTOR_PH]] ], [ [[BROADCAST_SPLAT3:%.*]], [[VECTOR_BODY]] ]106; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, ptr [[DST:%.*]], i64 [[INDEX]]107; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[A:%.*]], align 4108; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP2]], i64 0109; CHECK-NEXT: [[BROADCAST_SPLAT]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer110; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[VECTOR_RECUR]], <4 x float> [[BROADCAST_SPLAT]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>111; CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[B:%.*]], align 4112; CHECK-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[TMP4]], i64 0113; CHECK-NEXT: [[BROADCAST_SPLAT3]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT2]], <4 x float> poison, <4 x i32> zeroinitializer114; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x float> [[VECTOR_RECUR1]], <4 x float> [[BROADCAST_SPLAT3]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>115; CHECK-NEXT: [[TMP6:%.*]] = fneg <4 x float> [[TMP5]]116; CHECK-NEXT: [[TMP7:%.*]] = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x float> zeroinitializer)117; CHECK-NEXT: store <4 x float> [[TMP7]], ptr [[TMP1]], align 4118; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4119; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10000120; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]121; CHECK: middle.block:122; CHECK-NEXT: br label [[LOOP:%.*]]123; CHECK: exit:124; CHECK-NEXT: ret void125;126entry:127 br label %loop128 129loop:130 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]131 %for.1 = phi float [ 0.0, %entry ], [ %for.1.next, %loop ]132 %for.2 = phi float [ 0.0, %entry ], [ %for.2.next, %loop ]133 %neg = fneg float %for.2134 %muladd = call float @llvm.fmuladd.f32(float %for.1, float %neg, float 0.000000e+00)135 %dst.gep = getelementptr inbounds float, ptr %dst, i64 %iv136 %iv.next = add nuw nsw i64 %iv, 1137 %for.1.next = load float, ptr %a, align 4138 %for.2.next = load float, ptr %b, align 4139 store float %muladd, ptr %dst.gep140 %exitcond.not = icmp eq i64 %iv.next, 10000141 br i1 %exitcond.not, label %exit, label %loop142 143exit:144 ret void145}146 147declare float @llvm.fmuladd.f32(float, float, float) #1148 149define void @test_pr54227(ptr noalias %a, ptr noalias %b) {150; CHECK-LABEL: @test_pr54227(151; CHECK-NEXT: entry:152; CHECK-NEXT: br label [[LOOP:%.*]]153; CHECK: loop:154; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]155; CHECK-NEXT: [[AND17:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[AND1:%.*]], [[LOOP]] ]156; CHECK-NEXT: [[F_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[MUL:%.*]], [[LOOP]] ]157; CHECK-NEXT: [[E_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[LOOP]] ]158; CHECK-NEXT: [[AND:%.*]] = and i32 [[AND17]], 255159; CHECK-NEXT: [[OR:%.*]] = or i32 [[AND]], [[E_0]]160; CHECK-NEXT: [[AND1]] = and i32 [[E_0]], [[F_0]]161; CHECK-NEXT: [[MUL]] = shl nsw i32 [[OR]], 1162; CHECK-NEXT: [[ADD]] = or i32 [[AND1]], 1163; CHECK-NEXT: [[A_GEP:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IV]]164; CHECK-NEXT: store i32 [[ADD]], ptr [[A_GEP]], align 4165; CHECK-NEXT: [[B_GEP:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]166; CHECK-NEXT: store i32 [[MUL]], ptr [[B_GEP]], align 4167; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1168; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1000169; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP]]170; CHECK: exit:171; CHECK-NEXT: ret void172;173entry:174 br label %loop175 176loop:177 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]178 %and17 = phi i32 [ 0, %entry ], [ %and1, %loop ]179 %f.0 = phi i32 [ 0, %entry ], [ %mul, %loop ]180 %e.0 = phi i32 [ 0, %entry ], [ %add, %loop ]181 %and = and i32 %and17, 255182 %or = or i32 %and, %e.0183 %and1 = and i32 %e.0, %f.0184 %mul = shl nsw i32 %or, 1185 %add = or i32 %and1, 1186 %a.gep = getelementptr inbounds i32, ptr %a, i64 %iv187 store i32 %add, ptr %a.gep, align 4188 %b.gep = getelementptr inbounds i32, ptr %a, i64 %iv189 store i32 %mul, ptr %b.gep, align 4190 %iv.next = add nuw i64 %iv, 1191 %exitcond = icmp eq i64 %iv, 1000192 br i1 %exitcond, label %exit, label %loop193 194exit:195 ret void196}197 198define void @test_pr54233_for_depend_on_each_other(ptr noalias %a, ptr noalias %b) {199; CHECK-LABEL: @test_pr54233_for_depend_on_each_other(200; CHECK-NEXT: entry:201; CHECK-NEXT: br label [[VECTOR_PH:%.*]]202; CHECK: vector.ph:203; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]204; CHECK: vector.body:205; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]206; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 0>, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ]207; CHECK-NEXT: [[VECTOR_RECUR1:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 0>, [[VECTOR_PH]] ], [ [[BROADCAST_SPLAT:%.*]], [[VECTOR_BODY]] ]208; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B:%.*]], align 4209; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i64 0210; CHECK-NEXT: [[BROADCAST_SPLAT]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer211; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR1]], <4 x i32> [[BROADCAST_SPLAT]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>212; CHECK-NEXT: [[TMP3:%.*]] = or <4 x i32> [[TMP2]], splat (i32 10)213; CHECK-NEXT: [[TMP4]] = xor <4 x i32> splat (i32 12), [[TMP2]]214; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[TMP4]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>215; CHECK-NEXT: [[TMP6:%.*]] = shl <4 x i32> [[TMP2]], [[TMP5]]216; CHECK-NEXT: [[TMP7:%.*]] = xor <4 x i32> [[TMP6]], splat (i32 255)217; CHECK-NEXT: [[TMP8:%.*]] = and <4 x i32> [[TMP7]], [[TMP3]]218; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDEX]]219; CHECK-NEXT: store <4 x i32> [[TMP8]], ptr [[TMP9]], align 4220; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4221; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000222; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]223; CHECK: middle.block:224; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[TMP4]], i32 3225; CHECK-NEXT: br label [[SCALAR_PH:%.*]]226; CHECK: scalar.ph:227; CHECK-NEXT: br label [[LOOP:%.*]]228; CHECK: loop:229; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1000, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]230; CHECK-NEXT: [[SCALAR_RECUR:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], [[SCALAR_PH]] ], [ [[FOR_1_NEXT:%.*]], [[LOOP]] ]231; CHECK-NEXT: [[SCALAR_RECUR4:%.*]] = phi i32 [ [[TMP1]], [[SCALAR_PH]] ], [ [[FOR_2_NEXT:%.*]], [[LOOP]] ]232; CHECK-NEXT: [[OR:%.*]] = or i32 [[SCALAR_RECUR4]], 10233; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[SCALAR_RECUR4]], [[SCALAR_RECUR]]234; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[SHL]], 255235; CHECK-NEXT: [[AND:%.*]] = and i32 [[XOR]], [[OR]]236; CHECK-NEXT: [[FOR_1_NEXT]] = xor i32 12, [[SCALAR_RECUR4]]237; CHECK-NEXT: [[FOR_2_NEXT]] = load i32, ptr [[B]], align 4238; CHECK-NEXT: [[A_GEP:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]239; CHECK-NEXT: store i32 [[AND]], ptr [[A_GEP]], align 4240; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1241; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1000242; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP4:![0-9]+]]243; CHECK: exit:244; CHECK-NEXT: ret void245;246entry:247 br label %loop248 249loop:250 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]251 %for.1 = phi i32 [ 0, %entry ], [ %for.1.next, %loop ]252 %for.2 = phi i32 [ 0, %entry ], [ %for.2.next, %loop ]253 %or = or i32 %for.2, 10254 %shl = shl i32 %for.2, %for.1255 %xor = xor i32 %shl, 255256 %and = and i32 %xor, %or257 %for.1.next = xor i32 12, %for.2258 %for.2.next = load i32, ptr %b259 %a.gep = getelementptr inbounds i32, ptr %a, i64 %iv260 store i32 %and, ptr %a.gep, align 4261 %iv.next = add nuw i64 %iv, 1262 %exitcond = icmp eq i64 %iv, 1000263 br i1 %exitcond, label %exit, label %loop264 265exit:266 ret void267}268 269define void @pr54218(ptr %dst, ptr noalias %d) {270; CHECK-LABEL: @pr54218(271; CHECK-NEXT: entry:272; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]273; CHECK: loop.header:274; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]275; CHECK-NEXT: [[FOR_1:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[FOR_1_NEXT:%.*]], [[LOOP_LATCH]] ]276; CHECK-NEXT: [[P:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[P_NEXT:%.*]], [[LOOP_LATCH]] ]277; CHECK-NEXT: [[C_1:%.*]] = icmp eq i32 [[FOR_1]], 0278; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C_1]], i8 [[P]], i8 0279; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1000280; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP_LATCH]]281; CHECK: loop.latch:282; CHECK-NEXT: [[FOR_1_NEXT]] = load i32, ptr [[D:%.*]], align 4283; CHECK-NEXT: [[P_NEXT]] = add i8 [[SEL]], -1284; CHECK-NEXT: [[DST_GEP:%.*]] = getelementptr inbounds i8, ptr [[DST:%.*]], i64 [[IV]]285; CHECK-NEXT: store i8 [[SEL]], ptr [[DST_GEP]], align 1286; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1287; CHECK-NEXT: br label [[LOOP_HEADER]]288; CHECK: exit:289; CHECK-NEXT: ret void290;291entry:292 br label %loop.header293 294loop.header:295 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]296 %for.1 = phi i32 [ 0, %entry ], [ %for.1.next, %loop.latch ]297 %p = phi i8 [ 0, %entry ], [ %p.next, %loop.latch ]298 %c.1 = icmp eq i32 %for.1, 0299 %sel = select i1 %c.1, i8 %p, i8 0300 %exitcond = icmp eq i64 %iv, 1000301 br i1 %exitcond, label %exit, label %loop.latch302 303loop.latch:304 %for.1.next = load i32, ptr %d, align 4305 %p.next = add i8 %sel, -1306 %dst.gep = getelementptr inbounds i8, ptr %dst, i64 %iv307 store i8 %sel, ptr %dst.gep308 %iv.next = add nuw i64 %iv, 1309 br label %loop.header310 311exit:312 ret void313}314 315define void @pr54254_fors_depend_on_each_other(ptr %dst) {316; CHECK-LABEL: @pr54254_fors_depend_on_each_other(317; CHECK-NEXT: entry:318; CHECK-NEXT: br label [[LOOP:%.*]]319; CHECK: loop:320; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]321; CHECK-NEXT: [[D_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[XOR:%.*]], [[LOOP]] ]322; CHECK-NEXT: [[C_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[REM_NEXT:%.*]], [[LOOP]] ]323; CHECK-NEXT: [[F_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[XOR1:%.*]], [[LOOP]] ]324; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[D_0]], -1325; CHECK-NEXT: [[REM:%.*]] = srem i32 [[F_0]], [[NEG]]326; CHECK-NEXT: [[XOR]] = xor i32 [[C_0]], 1327; CHECK-NEXT: [[XOR1]] = xor i32 [[REM]], 1328; CHECK-NEXT: [[DST_GEP:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i64 [[IV]]329; CHECK-NEXT: [[REM_NEXT]] = add i32 [[REM]], 10330; CHECK-NEXT: store i32 [[REM]], ptr [[DST_GEP]], align 4331; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1332; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1000333; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP]]334; CHECK: exit:335; CHECK-NEXT: ret void336;337entry:338 br label %loop339 340loop:341 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]342 %d.0 = phi i32 [ 0, %entry ], [ %xor, %loop ]343 %c.0 = phi i32 [ 0, %entry ], [ %rem.next, %loop ]344 %f.0 = phi i32 [ 0, %entry ], [ %xor1, %loop ]345 %neg = xor i32 %d.0, -1346 %rem = srem i32 %f.0, %neg347 %xor = xor i32 %c.0, 1348 %xor1 = xor i32 %rem, 1349 %dst.gep = getelementptr inbounds i32, ptr %dst, i64 %iv350 %rem.next = add i32 %rem, 10351 store i32 %rem, ptr %dst.gep352 %iv.next = add nuw i64 %iv, 1353 %exitcond = icmp eq i64 %iv, 1000354 br i1 %exitcond, label %exit, label %loop355 356exit:357 ret void358}359 360; Similar to the test cases for https://github.com/llvm/llvm-project/issues/106523.361; The previous truncation (%trunc) gets vectorized (rather than folded into an362; IV) and hoisted along with its AND operand above the user 'or'.363define void @hoist_previous_value_and_operand(ptr %dst, i64 %mask) {364; CHECK-LABEL: @hoist_previous_value_and_operand(365; CHECK-NEXT: bb:366; CHECK-NEXT: br label [[VECTOR_PH:%.*]]367; CHECK: vector.ph:368; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[MASK:%.*]], i64 0369; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer370; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]371; CHECK: vector.body:372; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]373; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 1, i64 2, i64 3, i64 4>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]374; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 1>, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ]375; CHECK-NEXT: [[VECTOR_RECUR1:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 0>, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ]376; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]377; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i64 [[OFFSET_IDX]]378; CHECK-NEXT: [[TMP3:%.*]] = and <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]379; CHECK-NEXT: [[TMP4]] = trunc <4 x i64> [[TMP3]] to <4 x i32>380; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[TMP4]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>381; CHECK-NEXT: [[TMP6]] = or <4 x i32> [[TMP5]], splat (i32 3)382; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR1]], <4 x i32> [[TMP6]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>383; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[TMP1]], align 4384; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4385; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4)386; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 336387; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]388; CHECK: middle.block:389; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[TMP4]], i32 3390; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT2:%.*]] = extractelement <4 x i32> [[TMP6]], i32 3391; CHECK-NEXT: br label [[SCALAR_PH:%.*]]392; CHECK: scalar.ph:393; CHECK-NEXT: br label [[LOOP:%.*]]394; CHECK: loop:395; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 337, [[SCALAR_PH]] ], [ [[ADD:%.*]], [[LOOP]] ]396; CHECK-NEXT: [[FOR_1:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], [[SCALAR_PH]] ], [ [[TRUNC:%.*]], [[LOOP]] ]397; CHECK-NEXT: [[FOR_2:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT2]], [[SCALAR_PH]] ], [ [[OR:%.*]], [[LOOP]] ]398; CHECK-NEXT: [[OR]] = or i32 [[FOR_1]], 3399; CHECK-NEXT: [[ADD]] = add i64 [[IV]], 1400; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[IV]]401; CHECK-NEXT: store i32 [[FOR_2]], ptr [[GEP]], align 4402; CHECK-NEXT: [[ICMP:%.*]] = icmp ult i64 [[IV]], 337403; CHECK-NEXT: [[A:%.*]] = and i64 [[IV]], [[MASK]]404; CHECK-NEXT: [[TRUNC]] = trunc i64 [[A]] to i32405; CHECK-NEXT: br i1 [[ICMP]], label [[LOOP]], label [[EXIT:%.*]], !llvm.loop [[LOOP6:![0-9]+]]406; CHECK: exit:407; CHECK-NEXT: ret void408;409bb:410 br label %loop411 412loop:413 %iv = phi i64 [ 1, %bb ], [ %add, %loop ]414 %for.1 = phi i32 [ 1, %bb ], [ %trunc, %loop ]415 %for.2 = phi i32 [ 0, %bb ], [ %or, %loop ]416 %or = or i32 %for.1, 3417 %add = add i64 %iv, 1418 %gep = getelementptr inbounds i32, ptr %dst, i64 %iv419 store i32 %for.2, ptr %gep, align 4420 %icmp = icmp ult i64 %iv, 337421 %a = and i64 %iv, %mask422 %trunc = trunc i64 %a to i32423 br i1 %icmp, label %loop, label %exit424 425exit:426 ret void427}428 429define void @hoist_previous_value_and_operand_load(ptr %dst) {430; CHECK-LABEL: @hoist_previous_value_and_operand_load(431; CHECK-NEXT: entry:432; CHECK-NEXT: br label [[LOOP:%.*]]433; CHECK: loop:434; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[LOOP]] ]435; CHECK-NEXT: [[FOR_1:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[LOAD:%.*]], [[LOOP]] ]436; CHECK-NEXT: [[FOR_2:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[OR:%.*]], [[LOOP]] ]437; CHECK-NEXT: [[OR]] = or i32 [[FOR_1]], 3438; CHECK-NEXT: [[ADD]] = add i64 [[IV]], 1439; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i64 [[IV]]440; CHECK-NEXT: store i32 [[FOR_2]], ptr [[GEP]], align 4441; CHECK-NEXT: [[ICMP:%.*]] = icmp ult i64 [[IV]], 337442; CHECK-NEXT: [[LOAD]] = load i32, ptr [[DST]], align 4443; CHECK-NEXT: br i1 [[ICMP]], label [[LOOP]], label [[EXIT:%.*]]444; CHECK: exit:445; CHECK-NEXT: ret void446;447entry:448 br label %loop449 450loop:451 %iv = phi i64 [ 1, %entry ], [ %add, %loop ]452 %for.1 = phi i32 [ 1, %entry ], [ %load, %loop ]453 %for.2 = phi i32 [ 0, %entry ], [ %or, %loop ]454 %or = or i32 %for.1, 3455 %add = add i64 %iv, 1456 %gep = getelementptr inbounds i32, ptr %dst, i64 %iv457 store i32 %for.2, ptr %gep458 %icmp = icmp ult i64 %iv, 337459 %load = load i32, ptr %dst460 br i1 %icmp, label %loop, label %exit461 462exit:463 ret void464}465 466define void @hoist_previous_value_and_operand_assume(ptr %dst) {467; CHECK-LABEL: @hoist_previous_value_and_operand_assume(468; CHECK-NEXT: entry:469; CHECK-NEXT: br label [[LOOP:%.*]]470; CHECK: loop:471; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[LOOP]] ]472; CHECK-NEXT: [[FOR_1:%.*]] = phi i1 [ true, [[ENTRY]] ], [ [[TRUNC:%.*]], [[LOOP]] ]473; CHECK-NEXT: [[FOR_2:%.*]] = phi i1 [ false, [[ENTRY]] ], [ [[OR:%.*]], [[LOOP]] ]474; CHECK-NEXT: [[OR]] = or i1 [[FOR_1]], true475; CHECK-NEXT: [[ADD]] = add i64 [[IV]], 1476; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i64 [[IV]]477; CHECK-NEXT: store i1 [[FOR_2]], ptr [[GEP]], align 1478; CHECK-NEXT: [[ICMP:%.*]] = icmp ult i64 [[IV]], 337479; CHECK-NEXT: call void @llvm.assume(i1 [[FOR_1]])480; CHECK-NEXT: [[TRUNC]] = trunc i64 [[IV]] to i1481; CHECK-NEXT: br i1 [[ICMP]], label [[LOOP]], label [[EXIT:%.*]]482; CHECK: exit:483; CHECK-NEXT: ret void484;485entry:486 br label %loop487 488loop:489 %iv = phi i64 [ 1, %entry ], [ %add, %loop ]490 %for.1 = phi i1 [ 1, %entry ], [ %trunc, %loop ]491 %for.2 = phi i1 [ 0, %entry ], [ %or, %loop ]492 %or = or i1 %for.1, 3493 %add = add i64 %iv, 1494 %gep = getelementptr inbounds i32, ptr %dst, i64 %iv495 store i1 %for.2, ptr %gep496 %icmp = icmp ult i64 %iv, 337497 call void @llvm.assume(i1 %for.1)498 %trunc = trunc i64 %iv to i1499 br i1 %icmp, label %loop, label %exit500 501exit:502 ret void503}504