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1; REQUIRES: asserts2; RUN: opt < %s -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -force-widen-divrem-via-safe-divisor=0 -disable-output -debug-only=loop-vectorize 2>&1 | FileCheck %s3 4target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"5 6; Test cases for PR50009, which require sinking a replicate-region due to a7; first-order recurrence.8 9define void @sink_replicate_region_1(i32 %x, ptr %ptr, ptr noalias %dst) optsize {10; CHECK-LABEL: sink_replicate_region_111; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {12; CHECK-NEXT: Live-in vp<[[VF:%.+]]> = VF13; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF14; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count15; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count16; CHECK-NEXT: Live-in ir<20001> = original trip-count17; CHECK-EMPTY:18; CHECK-NEXT: ir-bb<entry>:19; CHECK-NEXT: Successor(s): scalar.ph, vector.ph20; CHECK-EMPTY:21; CHECK-NEXT: vector.ph:22; CHECK-NEXT: Successor(s): vector loop23; CHECK-EMPTY:24; CHECK-NEXT: <x1> vector loop: {25; CHECK-NEXT: vector.body:26; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION27; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%0> = phi ir<0>, ir<%conv>28; CHECK-NEXT: ir<%iv> = WIDEN-INDUCTION ir<0>, ir<1>, vp<[[VF]]>29; CHECK-NEXT: vp<[[STEPS:%.]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>30; CHECK-NEXT: EMIT vp<[[MASK:%.+]]> = icmp ule ir<%iv>, vp<[[BTC]]>31; CHECK-NEXT: Successor(s): pred.load32; CHECK-EMPTY:33; CHECK-NEXT: <xVFxUF> pred.load: {34; CHECK-NEXT: pred.load.entry:35; CHECK-NEXT: BRANCH-ON-MASK vp<[[MASK]]>36; CHECK-NEXT: Successor(s): pred.load.if, pred.load.continue37; CHECK-EMPTY:38; CHECK-NEXT: pred.load.if:39; CHECK-NEXT: REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]>40; CHECK-NEXT: REPLICATE ir<%lv> = load ir<%gep> (S->V)41; CHECK-NEXT: Successor(s): pred.load.continue42; CHECK-EMPTY:43; CHECK-NEXT: pred.load.continue:44; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PRED1:%.+]]> = ir<%lv>45; CHECK-NEXT: No successors46; CHECK-NEXT: }47; CHECK-NEXT: Successor(s): loop.048; CHECK-EMPTY:49; CHECK-NEXT: loop.0:50; CHECK-NEXT: WIDEN-CAST ir<%conv> = sext vp<[[PRED1]]> to i3251; CHECK-NEXT: EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%0>, ir<%conv>52; CHECK-NEXT: WIDEN ir<%rem> = srem vp<[[SPLICE]]>, ir<%x>53; CHECK-NEXT: WIDEN ir<%add> = add ir<%conv>, ir<%rem>54; CHECK-NEXT: Successor(s): pred.store55; CHECK-EMPTY:56; CHECK-NEXT: <xVFxUF> pred.store: {57; CHECK-NEXT: pred.store.entry:58; CHECK-NEXT: BRANCH-ON-MASK vp<[[MASK]]>59; CHECK-NEXT: Successor(s): pred.store.if, pred.store.continue60; CHECK-EMPTY:61; CHECK-NEXT: pred.store.if:62; CHECK-NEXT: REPLICATE ir<%gep.dst> = getelementptr ir<%dst>, vp<[[STEPS]]>63; CHECK-NEXT: REPLICATE store ir<%add>, ir<%gep.dst>64; CHECK-NEXT: Successor(s): pred.store.continue65; CHECK-EMPTY:66; CHECK-NEXT: pred.store.continue:67; CHECK-NEXT: No successors68; CHECK-NEXT: }69; CHECK-NEXT: Successor(s): loop.170; CHECK-EMPTY:71; CHECK-NEXT: loop.1:72; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>73; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>74; CHECK-NEXT: No successors75; CHECK-NEXT: }76; CHECK-NEXT: Successor(s): middle.block77; CHECK-EMPTY:78; CHECK-NEXT: middle.block:79; CHECK-NEXT: Successor(s): ir-bb<exit>80; CHECK-EMPTY:81; CHECK-NEXT: ir-bb<exit>82; CHECK-NEXT: No successors83;84entry:85 br label %loop86 87loop:88 %0 = phi i32 [ 0, %entry ], [ %conv, %loop ]89 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]90 %rem = srem i32 %0, %x91 %gep = getelementptr i8, ptr %ptr, i32 %iv92 %lv = load i8, ptr %gep93 %conv = sext i8 %lv to i3294 %add = add i32 %conv, %rem95 %gep.dst = getelementptr i32, ptr %dst, i32 %iv96 store i32 %add, ptr %gep.dst97 %iv.next = add nsw i32 %iv, 198 %ec = icmp eq i32 %iv.next, 2000199 br i1 %ec, label %exit, label %loop100 101exit:102 ret void103}104 105define void @sink_replicate_region_2(i32 %x, i8 %y, ptr %ptr, i32 %z) optsize {106; CHECK-LABEL: sink_replicate_region_2107; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {108; CHECK-NEXT: Live-in vp<[[VF:%.+]]> = VF109; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF110; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count111; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count112; CHECK-NEXT: Live-in ir<20001> = original trip-count113; CHECK-EMPTY:114; CHECK-NEXT: ir-bb<entry>:115; CHECK-NEXT: Successor(s): scalar.ph, vector.ph116; CHECK-EMPTY:117; CHECK-NEXT: vector.ph:118; CHECK-NEXT: WIDEN-CAST ir<%recur.next> = sext ir<%y> to i32119; CHECK-NEXT: Successor(s): vector loop120; CHECK-EMPTY:121; CHECK-NEXT: <x1> vector loop: {122; CHECK-NEXT: vector.body:123; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION124; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%recur> = phi ir<0>, ir<%recur.next>125; CHECK-NEXT: ir<%iv> = WIDEN-INDUCTION ir<0>, ir<1>, vp<[[VF]]>126; CHECK-NEXT: EMIT vp<[[MASK:%.+]]> = icmp ule ir<%iv>, vp<[[BTC]]>127; CHECK-NEXT: EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%recur>, ir<%recur.next>128; CHECK-NEXT: WIDEN ir<%cond> = icmp eq ir<%iv>, ir<%z>129; CHECK-NEXT: EMIT vp<[[AND:%.+]]> = logical-and vp<[[MASK]]>, ir<%cond>130; CHECK-NEXT: Successor(s): pred.store131; CHECK-EMPTY:132; CHECK-NEXT: <xVFxUF> pred.store: {133; CHECK-NEXT: pred.store.entry:134; CHECK-NEXT: BRANCH-ON-MASK vp<[[AND]]>135; CHECK-NEXT: Successor(s): pred.store.if, pred.store.continue136; CHECK-EMPTY:137; CHECK-NEXT: pred.store.if:138; CHECK-NEXT: REPLICATE ir<%rem> = srem vp<[[SPLICE]]>, ir<%x>139; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>140; CHECK-NEXT: REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]>141; CHECK-NEXT: REPLICATE ir<%add> = add ir<%rem>, ir<%recur.next>142; CHECK-NEXT: REPLICATE store ir<%add>, ir<%gep>143; CHECK-NEXT: Successor(s): pred.store.continue144; CHECK-EMPTY:145; CHECK-NEXT: pred.store.continue:146; CHECK-NEXT: No successors147; CHECK-NEXT: }148; CHECK-NEXT: Successor(s): if.1149; CHECK-EMPTY:150; CHECK-NEXT: if.1:151; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>152; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>153; CHECK-NEXT: No successors154; CHECK-NEXT: }155; CHECK-NEXT: Successor(s): middle.block156; CHECK-EMPTY:157; CHECK-NEXT: middle.block:158; CHECK-NEXT: Successor(s): ir-bb<exit>159; CHECK-EMPTY:160; CHECK-NEXT: ir-bb<exit>161; CHECK-NEXT: No successors162;163entry:164 br label %loop165 166loop:167 %recur = phi i32 [ 0, %entry ], [ %recur.next, %latch ]168 %iv = phi i32 [ 0, %entry ], [ %iv.next, %latch ]169 %recur.next = sext i8 %y to i32170 %cond = icmp eq i32 %iv, %z171 br i1 %cond, label %if, label %latch172 173if:174 %rem = srem i32 %recur, %x175 %add = add i32 %rem, %recur.next176 %gep = getelementptr i32, ptr %ptr, i32 %iv177 store i32 %add, ptr %gep178 br label %latch179 180latch:181 %iv.next = add nsw i32 %iv, 1182 %ec = icmp eq i32 %iv.next, 20001183 br i1 %ec, label %exit, label %loop184 185exit:186 ret void187}188 189define i32 @sink_replicate_region_3_reduction(i32 %x, i8 %y, ptr %ptr) optsize {190; CHECK-LABEL: sink_replicate_region_3_reduction191; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {192; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF193; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count194; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count195; CHECK-NEXT: Live-in ir<20001> = original trip-count196; CHECK-EMPTY:197; CHECK-NEXT: ir-bb<entry>:198; CHECK-NEXT: Successor(s): scalar.ph, vector.ph199; CHECK-EMPTY:200; CHECK-NEXT: vector.ph:201; CHECK-NEXT: EMIT vp<[[RDX_START:%.+]]> = reduction-start-vector ir<1234>, ir<-1>, ir<1>202; CHECK-NEXT: WIDEN-CAST ir<%recur.next> = sext ir<%y> to i32203; CHECK-NEXT: Successor(s): vector loop204; CHECK-EMPTY:205; CHECK-NEXT: <x1> vector loop: {206; CHECK-NEXT: vector.body:207; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION208; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%recur> = phi ir<0>, ir<%recur.next>209; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%and.red> = phi vp<[[RDX_START]]>, ir<%and.red.next>210; CHECK-NEXT: EMIT vp<[[WIDEN_CAN:%.+]]> = WIDEN-CANONICAL-INDUCTION vp<[[CAN_IV]]>211; CHECK-NEXT: EMIT vp<[[MASK:%.+]]> = icmp ule vp<[[WIDEN_CAN]]>, vp<[[BTC]]>212; CHECK-NEXT: EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%recur>, ir<%recur.next>213; CHECK-NEXT: WIDEN ir<%rem> = srem vp<[[SPLICE]]>, ir<%x>214; CHECK-NEXT: WIDEN ir<%add> = add ir<%rem>, ir<%recur.next>215; CHECK-NEXT: WIDEN ir<%and.red.next> = and ir<%and.red>, ir<%add>216; CHECK-NEXT: EMIT vp<[[SEL:%.+]]> = select vp<[[MASK]]>, ir<%and.red.next>, ir<%and.red>217; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>218; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>219; CHECK-NEXT: No successors220; CHECK-NEXT: }221; CHECK-NEXT: Successor(s): middle.block222; CHECK-EMPTY:223; CHECK-NEXT: middle.block:224; CHECK-NEXT: EMIT vp<[[RED_RES:%.+]]> = compute-reduction-result ir<%and.red>, vp<[[SEL]]>225; CHECK-NEXT: Successor(s): ir-bb<exit>226; CHECK-EMPTY:227; CHECK-NEXT: ir-bb<exit>228; CHECK-NEXT: IR %res = phi i32 [ %and.red.next, %loop ] (extra operand: vp<[[RED_RES]]> from middle.block)229; CHECK-NEXT: No successors230;231entry:232 br label %loop233 234loop:235 %recur = phi i32 [ 0, %entry ], [ %recur.next, %loop ]236 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]237 %and.red = phi i32 [ 1234, %entry ], [ %and.red.next, %loop ]238 %rem = srem i32 %recur, %x239 %recur.next = sext i8 %y to i32240 %add = add i32 %rem, %recur.next241 %and.red.next = and i32 %and.red, %add242 %iv.next = add nsw i32 %iv, 1243 %ec = icmp eq i32 %iv.next, 20001244 br i1 %ec, label %exit, label %loop245 246exit:247 %res = phi i32 [ %and.red.next, %loop ]248 ret i32 %res249}250 251; To sink the replicate region containing %rem, we need to split the block252; containing %conv at the end, because %conv is the last recipe in the block.253define void @sink_replicate_region_4_requires_split_at_end_of_block(i32 %x, ptr %ptr, ptr noalias %dst) optsize {254; CHECK-LABEL: sink_replicate_region_4_requires_split_at_end_of_block255; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {256; CHECK-NEXT: Live-in vp<[[VF:%.+]]> = VF257; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF258; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count259; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count260; CHECK-NEXT: Live-in ir<20001> = original trip-count261; CHECK-EMPTY:262; CHECK-NEXT: ir-bb<entry>:263; CHECK-NEXT: Successor(s): scalar.ph, vector.ph264; CHECK-EMPTY:265; CHECK-NEXT: vector.ph:266; CHECK-NEXT: Successor(s): vector loop267; CHECK-EMPTY:268; CHECK-NEXT: <x1> vector loop: {269; CHECK-NEXT: vector.body:270; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION271; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%0> = phi ir<0>, ir<%conv>272; CHECK-NEXT: ir<%iv> = WIDEN-INDUCTION ir<0>, ir<1>, vp<[[VF]]>273; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>274; CHECK-NEXT: EMIT vp<[[MASK:%.+]]> = icmp ule ir<%iv>, vp<[[BTC]]>275; CHECK-NEXT: REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]>276; CHECK-NEXT: Successor(s): pred.load277; CHECK-EMPTY:278; CHECK-NEXT: <xVFxUF> pred.load: {279; CHECK-NEXT: pred.load.entry:280; CHECK-NEXT: BRANCH-ON-MASK vp<[[MASK]]>281; CHECK-NEXT: Successor(s): pred.load.if, pred.load.continue282; CHECK-EMPTY:283; CHECK-NEXT: pred.load.if:284; CHECK-NEXT: REPLICATE ir<%lv> = load ir<%gep> (S->V)285; CHECK-NEXT: Successor(s): pred.load.continue286; CHECK-EMPTY:287; CHECK-NEXT: pred.load.continue:288; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%lv>289; CHECK-NEXT: No successors290; CHECK-NEXT: }291; CHECK-NEXT: Successor(s): loop.0292; CHECK-EMPTY:293; CHECK-NEXT: loop.0:294; CHECK-NEXT: WIDEN-CAST ir<%conv> = sext vp<[[PRED]]> to i32295; CHECK-NEXT: EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%0>, ir<%conv>296; CHECK-NEXT: WIDEN ir<%rem> = srem vp<[[SPLICE]]>, ir<%x>297; CHECK-NEXT: Successor(s): pred.load298; CHECK-EMPTY:299; CHECK: <xVFxUF> pred.load: {300; CHECK-NEXT: pred.load.entry:301; CHECK-NEXT: BRANCH-ON-MASK vp<[[MASK]]>302; CHECK-NEXT: Successor(s): pred.load.if, pred.load.continue303; CHECK-EMPTY:304; CHECK: pred.load.if:305; CHECK-NEXT: REPLICATE ir<%lv.2> = load ir<%gep> (S->V)306; CHECK-NEXT: Successor(s): pred.load.continue307; CHECK-EMPTY:308; CHECK: pred.load.continue:309; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<%9> = ir<%lv.2>310; CHECK-NEXT: No successors311; CHECK-NEXT: }312; CHECK-NEXT: Successor(s): loop.1313; CHECK-EMPTY:314; CHECK-NEXT: loop.1:315; CHECK-NEXT: WIDEN ir<%add.1> = add ir<%conv>, ir<%rem>316; CHECK-NEXT: WIDEN-CAST ir<%conv.lv.2> = sext vp<%9> to i32317; CHECK-NEXT: WIDEN ir<%add> = add ir<%add.1>, ir<%conv.lv.2>318; CHECK-NEXT: Successor(s): pred.store319; CHECK-EMPTY:320; CHECK-NEXT: <xVFxUF> pred.store: {321; CHECK-NEXT: pred.store.entry:322; CHECK-NEXT: BRANCH-ON-MASK vp<[[MASK]]>323; CHECK-NEXT: Successor(s): pred.store.if, pred.store.continue324; CHECK-EMPTY:325; CHECK-NEXT: pred.store.if:326; CHECK-NEXT: REPLICATE ir<%gep.dst> = getelementptr ir<%dst>, vp<[[STEPS]]>327; CHECK-NEXT: REPLICATE store ir<%add>, ir<%gep.dst>328; CHECK-NEXT: Successor(s): pred.store.continue329; CHECK-EMPTY:330; CHECK-NEXT: pred.store.continue:331; CHECK-NEXT: No successors332; CHECK-NEXT: }333; CHECK-NEXT: Successor(s): loop.2334; CHECK-EMPTY:335; CHECK: loop.2:336; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>337; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>338; CHECK-NEXT: No successors339; CHECK-NEXT: }340; CHECK-NEXT: Successor(s): middle.block341; CHECK-EMPTY:342; CHECK-NEXT: middle.block:343; CHECK-NEXT: Successor(s): ir-bb<exit>344; CHECK-EMPTY:345; CHECK-NEXT: ir-bb<exit>346; CHECK-NEXT: No successors347;348entry:349 br label %loop350 351loop:352 %0 = phi i32 [ 0, %entry ], [ %conv, %loop ]353 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]354 %gep = getelementptr i8, ptr %ptr, i32 %iv355 %rem = srem i32 %0, %x356 %lv = load i8, ptr %gep357 %conv = sext i8 %lv to i32358 %lv.2 = load i8, ptr %gep359 %add.1 = add i32 %conv, %rem360 %conv.lv.2 = sext i8 %lv.2 to i32361 %add = add i32 %add.1, %conv.lv.2362 %gep.dst = getelementptr i32, ptr %dst, i32 %iv363 store i32 %add, ptr %gep.dst364 %iv.next = add nsw i32 %iv, 1365 %ec = icmp eq i32 %iv.next, 20001366 br i1 %ec, label %exit, label %loop367 368exit:369 ret void370}371 372; Test case that requires sinking a recipe in a replicate region after another replicate region.373define void @sink_replicate_region_after_replicate_region(ptr %ptr, ptr noalias %dst.2, i32 %x, i8 %y) optsize {374; CHECK-LABEL: sink_replicate_region_after_replicate_region375; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {376; CHECK-NEXT: Live-in vp<[[VF:%.+]]> = VF377; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF378; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count379; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count380; CHECK-NEXT: vp<[[TC:%.+]]> = original trip-count381; CHECK-EMPTY:382; CHECK-NEXT: ir-bb<entry>:383; CHECK-NEXT: EMIT vp<[[TC]]> = EXPAND SCEV (1 smax (1 + (sext i8 %y to i32))<nsw>)384; CHECK-NEXT: Successor(s): scalar.ph, vector.ph385; CHECK-EMPTY:386; CHECK-NEXT: vector.ph:387; CHECK-NEXT: WIDEN-CAST ir<%recur.next> = sext ir<%y> to i32388; CHECK-NEXT: Successor(s): vector loop389; CHECK-EMPTY:390; CHECK-NEXT: <x1> vector loop: {391; CHECK-NEXT: vector.body:392; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION393; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%recur> = phi ir<0>, ir<%recur.next>394; CHECK-NEXT: ir<%iv> = WIDEN-INDUCTION ir<0>, ir<1>, vp<[[VF]]>395; CHECK-NEXT: EMIT vp<[[MASK:%.+]]> = icmp ule ir<%iv>, vp<[[BTC]]>396; CHECK-NEXT: EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%recur>, ir<%recur.next>397; CHECK-NEXT: WIDEN ir<%rem> = srem vp<[[SPLICE]]>, ir<%x>398; CHECK-NEXT: Successor(s): pred.store399; CHECK-EMPTY:400; CHECK-NEXT: <xVFxUF> pred.store: {401; CHECK-NEXT: pred.store.entry:402; CHECK-NEXT: BRANCH-ON-MASK vp<[[MASK]]>403; CHECK-NEXT: Successor(s): pred.store.if, pred.store.continue404; CHECK-EMPTY:405; CHECK-NEXT: pred.store.if:406; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>407; CHECK-NEXT: REPLICATE ir<%rem.div> = sdiv ir<20>, ir<%rem>408; CHECK-NEXT: REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]>409; CHECK-NEXT: REPLICATE store ir<%rem.div>, ir<%gep>410; CHECK-NEXT: REPLICATE ir<%gep.2> = getelementptr ir<%dst.2>, vp<[[STEPS]]>411; CHECK-NEXT: REPLICATE store ir<%rem.div>, ir<%gep.2>412; CHECK-NEXT: Successor(s): pred.store.continue413; CHECK-EMPTY:414; CHECK-NEXT: pred.store.continue:415; CHECK-NEXT: No successors416; CHECK-NEXT: }417; CHECK-NEXT: Successor(s): loop.2418; CHECK-EMPTY:419; CHECK-NEXT: loop.2:420; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>421; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>422; CHECK-NEXT: No successors423; CHECK-NEXT: }424; CHECK-NEXT: Successor(s): middle.block425; CHECK-EMPTY:426; CHECK-NEXT: middle.block:427; CHECK-NEXT: Successor(s): ir-bb<exit>428; CHECK-EMPTY:429; CHECK-NEXT: ir-bb<exit>430; CHECK-NEXT: No successors431;432entry:433 br label %loop434 435loop: ; preds = %loop, %entry436 %recur = phi i32 [ 0, %entry ], [ %recur.next, %loop ]437 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]438 %rem = srem i32 %recur, %x439 %rem.div = sdiv i32 20, %rem440 %recur.next = sext i8 %y to i32441 %gep = getelementptr i32, ptr %ptr, i32 %iv442 store i32 %rem.div, ptr %gep443 %gep.2 = getelementptr i32, ptr %dst.2, i32 %iv444 store i32 %rem.div, ptr %gep.2445 %iv.next = add nsw i32 %iv, 1446 %C = icmp sgt i32 %iv.next, %recur.next447 br i1 %C, label %exit, label %loop448 449exit: ; preds = %loop450 ret void451}452 453define void @need_new_block_after_sinking_pr56146(i32 %x, ptr %src, ptr noalias %dst) {454; CHECK-LABEL: need_new_block_after_sinking_pr56146455; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {456; CHECK-NEXT: Live-in vp<[[VF:%.+]]> = VF457; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF458; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count459; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count460; CHECK-NEXT: Live-in ir<3> = original trip-count461; CHECK-EMPTY:462; CHECK-NEXT: ir-bb<entry>:463; CHECK-NEXT: Successor(s): scalar.ph, vector.ph464; CHECK-EMPTY:465; CHECK-NEXT: vector.ph:466; CHECK-NEXT: Successor(s): vector loop467; CHECK-EMPTY:468; CHECK-NEXT: <x1> vector loop: {469; CHECK-NEXT: vector.body:470; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION471; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%.pn> = phi ir<0>, ir<[[L:%.+]]>472; CHECK-NEXT: vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<2> + vp<[[CAN_IV]]> * ir<1>473; CHECK-NEXT: EMIT vp<[[WIDE_IV:%.+]]> = WIDEN-CANONICAL-INDUCTION vp<[[CAN_IV]]>474; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp ule vp<[[WIDE_IV]]>, vp<[[BTC]]>475; CHECK-NEXT: CLONE ir<[[L]]> = load ir<%src>476; CHECK-NEXT: EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%.pn>, ir<[[L]]>477; CHECK-NEXT: WIDEN ir<%val> = sdiv vp<[[SPLICE]]>, ir<%x>478; CHECK-NEXT: Successor(s): pred.store479; CHECK-EMPTY:480; CHECK-NEXT: <xVFxUF> pred.store: {481; CHECK-NEXT: pred.store.entry:482; CHECK-NEXT: BRANCH-ON-MASK vp<[[CMP]]>483; CHECK-NEXT: Successor(s): pred.store.if, pred.store.continue484; CHECK-EMPTY:485; CHECK-NEXT: pred.store.if:486; CHECK-NEXT: vp<[[SCALAR_STEPS:%.+]]> = SCALAR-STEPS vp<[[DERIVED_IV]]>, ir<1>, vp<[[VF]]>487; CHECK-NEXT: REPLICATE ir<%gep.dst> = getelementptr ir<%dst>, vp<[[SCALAR_STEPS]]>488; CHECK-NEXT: REPLICATE store ir<%val>, ir<%gep.dst>489; CHECK-NEXT: Successor(s): pred.store.continue490; CHECK-EMPTY:491; CHECK-NEXT: pred.store.continue:492; CHECK-NEXT: No successors493; CHECK-NEXT: }494; CHECK-NEXT: Successor(s): loop.0495; CHECK-EMPTY:496; CHECK-NEXT: loop.0:497; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>498; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>499; CHECK-NEXT: No successors500; CHECK-NEXT: }501; CHECK-NEXT: Successor(s): middle.block502; CHECK-EMPTY:503; CHECK-NEXT: middle.block:504; CHECK-NEXT: Successor(s): ir-bb<exit>505; CHECK-EMPTY:506; CHECK-NEXT: ir-bb<exit>507; CHECK-NEXT: No successors508;509entry:510 br label %loop511 512loop:513 %iv = phi i64 [ 2, %entry ], [ %iv.next, %loop ]514 %.pn = phi i32 [ 0, %entry ], [ %l, %loop ]515 %val = sdiv i32 %.pn, %x516 %l = load i32, ptr %src, align 4517 %gep.dst = getelementptr i32, ptr %dst, i64 %iv518 store i32 %val, ptr %gep.dst519 %iv.next = add nuw nsw i64 %iv, 1520 %ec = icmp ugt i64 %iv, 3521 br i1 %ec, label %exit, label %loop522 523exit:524 ret void525}526