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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 52; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S | FileCheck %s3 4define void @flags1(i64 %n, ptr nocapture %A) {5; CHECK-LABEL: define void @flags1(6; CHECK-SAME: i64 [[N:%.*]], ptr captures(none) [[A:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*]]:8; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 49; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]10; CHECK: [[VECTOR_PH]]:11; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 412; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]13; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]14; CHECK: [[VECTOR_BODY]]:15; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]16; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDEX]]17; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 418; CHECK-NEXT: [[TMP1:%.*]] = mul nsw <4 x i32> [[WIDE_LOAD]], splat (i32 3)19; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP0]], align 420; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 421; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]22; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]23; CHECK: [[MIDDLE_BLOCK]]:24; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]25; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]26; CHECK: [[SCALAR_PH]]:27; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]28; CHECK-NEXT: br label %[[LOOP:.*]]29; CHECK: [[LOOP]]:30; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]31; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]32; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 433; CHECK-NEXT: [[TMP5:%.*]] = mul nsw i32 [[TMP4]], 334; CHECK-NEXT: store i32 [[TMP5]], ptr [[TMP3]], align 435; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 136; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]37; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]38; CHECK: [[EXIT]]:39; CHECK-NEXT: ret void40;41entry:42 br label %loop43 44loop:45 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]46 %2 = getelementptr inbounds i32, ptr %A, i64 %iv47 %3 = load i32, ptr %2, align 448 %4 = mul nsw i32 %3, 349 store i32 %4, ptr %2, align 450 %iv.next = add i64 %iv, 151 %ec = icmp eq i64 %iv.next, %n52 br i1 %ec, label %exit, label %loop53 54exit:55 ret void56}57 58define void @flags2(i64 %n, ptr %A) {59; CHECK-LABEL: define void @flags2(60; CHECK-SAME: i64 [[N:%.*]], ptr [[A:%.*]]) {61; CHECK-NEXT: [[ENTRY:.*]]:62; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 463; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]64; CHECK: [[VECTOR_PH]]:65; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 466; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]67; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]68; CHECK: [[VECTOR_BODY]]:69; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]70; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDEX]]71; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 472; CHECK-NEXT: [[TMP1:%.*]] = mul <4 x i32> [[WIDE_LOAD]], splat (i32 3)73; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP0]], align 474; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 475; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]76; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]77; CHECK: [[MIDDLE_BLOCK]]:78; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]79; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]80; CHECK: [[SCALAR_PH]]:81; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]82; CHECK-NEXT: br label %[[LOOP:.*]]83; CHECK: [[LOOP]]:84; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]85; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]86; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 487; CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[TMP4]], 388; CHECK-NEXT: store i32 [[TMP5]], ptr [[TMP3]], align 489; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 190; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]91; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]92; CHECK: [[EXIT]]:93; CHECK-NEXT: ret void94;95entry:96 br label %loop97 98loop:99 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]100 %2 = getelementptr inbounds i32, ptr %A, i64 %iv101 %3 = load i32, ptr %2, align 4102 %4 = mul i32 %3, 3103 store i32 %4, ptr %2, align 4104 %iv.next = add i64 %iv, 1105 %ec = icmp eq i64 %iv.next, %n106 br i1 %ec, label %exit, label %loop107 108exit:109 ret void110}111 112; Make sure we copy fast math flags and use them for the final reduction.113define float @fast_math(ptr noalias %s) {114; CHECK-LABEL: define float @fast_math(115; CHECK-SAME: ptr noalias [[S:%.*]]) {116; CHECK-NEXT: [[ENTRY:.*:]]117; CHECK-NEXT: br label %[[VECTOR_PH:.*]]118; CHECK: [[VECTOR_PH]]:119; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]120; CHECK: [[VECTOR_BODY]]:121; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]122; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP1:%.*]], %[[VECTOR_BODY]] ]123; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[S]], i64 [[INDEX]]124; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 4125; CHECK-NEXT: [[TMP1]] = fadd fast <4 x float> [[VEC_PHI]], [[WIDE_LOAD]]126; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4127; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256128; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]129; CHECK: [[MIDDLE_BLOCK]]:130; CHECK-NEXT: [[TMP3:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> [[TMP1]])131; CHECK-NEXT: br label %[[EXIT:.*]]132; CHECK: [[EXIT]]:133; CHECK-NEXT: ret float [[TMP3]]134;135entry:136 br label %loop137 138loop:139 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]140 %red = phi float [ 0.000000e+00, %entry ], [ %add, %loop ]141 %arrayidx = getelementptr inbounds float, ptr %s, i64 %iv142 %0 = load float, ptr %arrayidx, align 4143 %add = fadd fast float %red, %0144 %iv.next = add nuw nsw i64 %iv, 1145 %ec = icmp eq i64 %iv.next, 256146 br i1 %ec, label %exit, label %loop147 148exit:149 %add.lcssa = phi float [ %add, %loop ]150 ret float %add.lcssa151}152 153define void @gep_with_shared_nusw_and_others(i64 %n, ptr %A) {154; CHECK-LABEL: define void @gep_with_shared_nusw_and_others(155; CHECK-SAME: i64 [[N:%.*]], ptr [[A:%.*]]) {156; CHECK-NEXT: [[ENTRY:.*]]:157; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1158; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4159; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]160; CHECK: [[VECTOR_PH]]:161; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4162; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]163; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]164; CHECK: [[VECTOR_BODY]]:165; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]166; CHECK-NEXT: [[TMP1:%.*]] = getelementptr nusw float, ptr [[A]], i64 [[INDEX]]167; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP1]], align 4168; CHECK-NEXT: store <4 x float> [[WIDE_LOAD]], ptr [[TMP1]], align 4169; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4170; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]171; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]172; CHECK: [[MIDDLE_BLOCK]]:173; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]174; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]175; CHECK: [[SCALAR_PH]]:176; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]177; CHECK-NEXT: br label %[[LOOP:.*]]178; CHECK: [[LOOP]]:179; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]180; CHECK-NEXT: [[GEP_NUSW:%.*]] = getelementptr nusw float, ptr [[A]], i64 [[IV]]181; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_NUSW]], align 4182; CHECK-NEXT: [[GEP_NUSW_NUW:%.*]] = getelementptr nusw nuw float, ptr [[A]], i64 [[IV]]183; CHECK-NEXT: store float [[L]], ptr [[GEP_NUSW_NUW]], align 4184; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1185; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]]186; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP8:![0-9]+]]187; CHECK: [[EXIT]]:188; CHECK-NEXT: ret void189;190entry:191 br label %loop192 193loop:194 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]195 %gep.nusw = getelementptr nusw float, ptr %A, i64 %iv196 %l = load float, ptr %gep.nusw, align 4197 %gep.nusw.nuw = getelementptr nusw nuw float, ptr %A, i64 %iv198 store float %l, ptr %gep.nusw.nuw, align 4199 %iv.next = add i64 %iv, 1200 %ec = icmp eq i64 %iv, %n201 br i1 %ec, label %exit, label %loop202 203exit:204 ret void205}206 207define void @exact_on_first_shift(ptr noalias %A, ptr noalias %B) {208; CHECK-LABEL: define void @exact_on_first_shift(209; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {210; CHECK-NEXT: [[ENTRY:.*:]]211; CHECK-NEXT: br label %[[VECTOR_PH:.*]]212; CHECK: [[VECTOR_PH]]:213; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]214; CHECK: [[VECTOR_BODY]]:215; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]216; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]217; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4218; CHECK-NEXT: [[TMP2:%.*]] = lshr <4 x i32> [[WIDE_LOAD]], splat (i32 10)219; CHECK-NEXT: store <4 x i32> [[TMP2]], ptr [[TMP1]], align 4220; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]221; CHECK-NEXT: store <4 x i32> [[TMP2]], ptr [[TMP3]], align 4222; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4223; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128224; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]225; CHECK: [[MIDDLE_BLOCK]]:226; CHECK-NEXT: br label %[[SCALAR_PH:.*]]227; CHECK: [[SCALAR_PH]]:228; CHECK-NEXT: br label %[[LOOP:.*]]229; CHECK: [[LOOP]]:230; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 128, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]231; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]]232; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4233; CHECK-NEXT: [[LSHR_1:%.*]] = lshr exact i32 [[L_A]], 10234; CHECK-NEXT: store i32 [[LSHR_1]], ptr [[GEP_A]], align 4235; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr i32, ptr [[B]], i64 [[IV]]236; CHECK-NEXT: [[LSHR_2:%.*]] = lshr i32 [[L_A]], 10237; CHECK-NEXT: store i32 [[LSHR_2]], ptr [[GEP_B]], align 4238; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1239; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 128240; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP10:![0-9]+]]241; CHECK: [[EXIT]]:242; CHECK-NEXT: ret void243;244entry:245 br label %loop246 247loop:248 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]249 %gep.A = getelementptr i32, ptr %A, i64 %iv250 %l.A = load i32, ptr %gep.A, align 4251 %lshr.1 = lshr exact i32 %l.A, 10252 store i32 %lshr.1, ptr %gep.A, align 4253 %gep.B = getelementptr i32, ptr %B, i64 %iv254 %lshr.2 = lshr i32 %l.A, 10255 store i32 %lshr.2, ptr %gep.B, align 4256 %iv.next = add i64 %iv, 1257 %ec = icmp eq i64 %iv, 128258 br i1 %ec, label %exit, label %loop259 260exit:261 ret void262}263 264define void @exact_on_second_shift(ptr noalias %A, ptr noalias %B) {265; CHECK-LABEL: define void @exact_on_second_shift(266; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {267; CHECK-NEXT: [[ENTRY:.*:]]268; CHECK-NEXT: br label %[[VECTOR_PH:.*]]269; CHECK: [[VECTOR_PH]]:270; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]271; CHECK: [[VECTOR_BODY]]:272; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]273; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]274; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4275; CHECK-NEXT: [[TMP2:%.*]] = lshr <4 x i32> [[WIDE_LOAD]], splat (i32 10)276; CHECK-NEXT: store <4 x i32> [[TMP2]], ptr [[TMP1]], align 4277; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]278; CHECK-NEXT: store <4 x i32> [[TMP2]], ptr [[TMP3]], align 4279; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4280; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128281; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]282; CHECK: [[MIDDLE_BLOCK]]:283; CHECK-NEXT: br label %[[SCALAR_PH:.*]]284; CHECK: [[SCALAR_PH]]:285; CHECK-NEXT: br label %[[LOOP:.*]]286; CHECK: [[LOOP]]:287; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 128, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]288; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]]289; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4290; CHECK-NEXT: [[LSHR_1:%.*]] = lshr i32 [[L_A]], 10291; CHECK-NEXT: store i32 [[LSHR_1]], ptr [[GEP_A]], align 4292; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr i32, ptr [[B]], i64 [[IV]]293; CHECK-NEXT: [[LSHR_2:%.*]] = lshr exact i32 [[L_A]], 10294; CHECK-NEXT: store i32 [[LSHR_2]], ptr [[GEP_B]], align 4295; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1296; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 128297; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP12:![0-9]+]]298; CHECK: [[EXIT]]:299; CHECK-NEXT: ret void300;301entry:302 br label %loop303 304loop:305 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]306 %gep.A = getelementptr i32, ptr %A, i64 %iv307 %l.A = load i32, ptr %gep.A, align 4308 %lshr.1 = lshr i32 %l.A, 10309 store i32 %lshr.1, ptr %gep.A, align 4310 %gep.B = getelementptr i32, ptr %B, i64 %iv311 %lshr.2 = lshr exact i32 %l.A, 10312 store i32 %lshr.2, ptr %gep.B, align 4313 %iv.next = add i64 %iv, 1314 %ec = icmp eq i64 %iv, 128315 br i1 %ec, label %exit, label %loop316 317exit:318 ret void319}320 321define void @exact_on_both_shifts(ptr noalias %A, ptr noalias %B) {322; CHECK-LABEL: define void @exact_on_both_shifts(323; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {324; CHECK-NEXT: [[ENTRY:.*:]]325; CHECK-NEXT: br label %[[VECTOR_PH:.*]]326; CHECK: [[VECTOR_PH]]:327; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]328; CHECK: [[VECTOR_BODY]]:329; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]330; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]331; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4332; CHECK-NEXT: [[TMP1:%.*]] = lshr exact <4 x i32> [[WIDE_LOAD]], splat (i32 10)333; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP0]], align 4334; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]335; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP2]], align 4336; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4337; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128338; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]339; CHECK: [[MIDDLE_BLOCK]]:340; CHECK-NEXT: br label %[[SCALAR_PH:.*]]341; CHECK: [[SCALAR_PH]]:342; CHECK-NEXT: br label %[[LOOP:.*]]343; CHECK: [[LOOP]]:344; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 128, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]345; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]]346; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4347; CHECK-NEXT: [[LSHR_1:%.*]] = lshr exact i32 [[L_A]], 10348; CHECK-NEXT: store i32 [[LSHR_1]], ptr [[GEP_A]], align 4349; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr i32, ptr [[B]], i64 [[IV]]350; CHECK-NEXT: [[LSHR_2:%.*]] = lshr exact i32 [[L_A]], 10351; CHECK-NEXT: store i32 [[LSHR_2]], ptr [[GEP_B]], align 4352; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1353; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 128354; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP14:![0-9]+]]355; CHECK: [[EXIT]]:356; CHECK-NEXT: ret void357;358entry:359 br label %loop360 361loop:362 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]363 %gep.A = getelementptr i32, ptr %A, i64 %iv364 %l.A = load i32, ptr %gep.A, align 4365 %lshr.1 = lshr exact i32 %l.A, 10366 store i32 %lshr.1, ptr %gep.A, align 4367 %gep.B = getelementptr i32, ptr %B, i64 %iv368 %lshr.2 = lshr exact i32 %l.A, 10369 store i32 %lshr.2, ptr %gep.B, align 4370 %iv.next = add i64 %iv, 1371 %ec = icmp eq i64 %iv, 128372 br i1 %ec, label %exit, label %loop373 374exit:375 ret void376}377 378define void @disjoint_on_first_or(ptr noalias %A, ptr noalias %B) {379; CHECK-LABEL: define void @disjoint_on_first_or(380; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {381; CHECK-NEXT: [[ENTRY:.*:]]382; CHECK-NEXT: br label %[[VECTOR_PH:.*]]383; CHECK: [[VECTOR_PH]]:384; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]385; CHECK: [[VECTOR_BODY]]:386; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]387; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]388; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4389; CHECK-NEXT: [[TMP1:%.*]] = or <4 x i32> [[WIDE_LOAD]], splat (i32 10)390; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP0]], align 4391; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]392; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP2]], align 4393; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4394; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128395; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]396; CHECK: [[MIDDLE_BLOCK]]:397; CHECK-NEXT: br label %[[SCALAR_PH:.*]]398; CHECK: [[SCALAR_PH]]:399; CHECK-NEXT: br label %[[LOOP:.*]]400; CHECK: [[LOOP]]:401; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 128, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]402; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]]403; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4404; CHECK-NEXT: [[OR_1:%.*]] = or disjoint i32 [[L_A]], 10405; CHECK-NEXT: store i32 [[OR_1]], ptr [[GEP_A]], align 4406; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr i32, ptr [[B]], i64 [[IV]]407; CHECK-NEXT: [[OR_2:%.*]] = or i32 [[L_A]], 10408; CHECK-NEXT: store i32 [[OR_2]], ptr [[GEP_B]], align 4409; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1410; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 128411; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP16:![0-9]+]]412; CHECK: [[EXIT]]:413; CHECK-NEXT: ret void414;415entry:416 br label %loop417 418loop:419 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]420 %gep.A = getelementptr i32, ptr %A, i64 %iv421 %l.A = load i32, ptr %gep.A, align 4422 %or.1 = or disjoint i32 %l.A, 10423 store i32 %or.1, ptr %gep.A, align 4424 %gep.B = getelementptr i32, ptr %B, i64 %iv425 %or.2 = or i32 %l.A, 10426 store i32 %or.2, ptr %gep.B, align 4427 %iv.next = add i64 %iv, 1428 %ec = icmp eq i64 %iv, 128429 br i1 %ec, label %exit, label %loop430 431exit:432 ret void433}434 435define void @disjoint_on_second_or(ptr noalias %A, ptr noalias %B) {436; CHECK-LABEL: define void @disjoint_on_second_or(437; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {438; CHECK-NEXT: [[ENTRY:.*:]]439; CHECK-NEXT: br label %[[VECTOR_PH:.*]]440; CHECK: [[VECTOR_PH]]:441; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]442; CHECK: [[VECTOR_BODY]]:443; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]444; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]445; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4446; CHECK-NEXT: [[TMP1:%.*]] = or <4 x i32> [[WIDE_LOAD]], splat (i32 10)447; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP0]], align 4448; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]449; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP2]], align 4450; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4451; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128452; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]453; CHECK: [[MIDDLE_BLOCK]]:454; CHECK-NEXT: br label %[[SCALAR_PH:.*]]455; CHECK: [[SCALAR_PH]]:456; CHECK-NEXT: br label %[[LOOP:.*]]457; CHECK: [[LOOP]]:458; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 128, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]459; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]]460; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4461; CHECK-NEXT: [[OR_1:%.*]] = or i32 [[L_A]], 10462; CHECK-NEXT: store i32 [[OR_1]], ptr [[GEP_A]], align 4463; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr i32, ptr [[B]], i64 [[IV]]464; CHECK-NEXT: [[OR_2:%.*]] = or disjoint i32 [[L_A]], 10465; CHECK-NEXT: store i32 [[OR_2]], ptr [[GEP_B]], align 4466; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1467; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 128468; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP18:![0-9]+]]469; CHECK: [[EXIT]]:470; CHECK-NEXT: ret void471;472entry:473 br label %loop474 475loop:476 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]477 %gep.A = getelementptr i32, ptr %A, i64 %iv478 %l.A = load i32, ptr %gep.A, align 4479 %or.1 = or i32 %l.A, 10480 store i32 %or.1, ptr %gep.A, align 4481 %gep.B = getelementptr i32, ptr %B, i64 %iv482 %or.2 = or disjoint i32 %l.A, 10483 store i32 %or.2, ptr %gep.B, align 4484 %iv.next = add i64 %iv, 1485 %ec = icmp eq i64 %iv, 128486 br i1 %ec, label %exit, label %loop487 488exit:489 ret void490}491 492define void @disjoint_on_both_or(ptr noalias %A, ptr noalias %B) {493; CHECK-LABEL: define void @disjoint_on_both_or(494; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {495; CHECK-NEXT: [[ENTRY:.*:]]496; CHECK-NEXT: br label %[[VECTOR_PH:.*]]497; CHECK: [[VECTOR_PH]]:498; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]499; CHECK: [[VECTOR_BODY]]:500; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]501; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]502; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4503; CHECK-NEXT: [[TMP1:%.*]] = or disjoint <4 x i32> [[WIDE_LOAD]], splat (i32 10)504; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP0]], align 4505; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]506; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP2]], align 4507; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4508; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128509; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]510; CHECK: [[MIDDLE_BLOCK]]:511; CHECK-NEXT: br label %[[SCALAR_PH:.*]]512; CHECK: [[SCALAR_PH]]:513; CHECK-NEXT: br label %[[LOOP:.*]]514; CHECK: [[LOOP]]:515; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 128, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]516; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]]517; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4518; CHECK-NEXT: [[OR_1:%.*]] = or disjoint i32 [[L_A]], 10519; CHECK-NEXT: store i32 [[OR_1]], ptr [[GEP_A]], align 4520; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr i32, ptr [[B]], i64 [[IV]]521; CHECK-NEXT: [[OR_2:%.*]] = or disjoint i32 [[L_A]], 10522; CHECK-NEXT: store i32 [[OR_2]], ptr [[GEP_B]], align 4523; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1524; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 128525; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP20:![0-9]+]]526; CHECK: [[EXIT]]:527; CHECK-NEXT: ret void528;529entry:530 br label %loop531 532loop:533 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]534 %gep.A = getelementptr i32, ptr %A, i64 %iv535 %l.A = load i32, ptr %gep.A, align 4536 %or.1 = or disjoint i32 %l.A, 10537 store i32 %or.1, ptr %gep.A, align 4538 %gep.B = getelementptr i32, ptr %B, i64 %iv539 %or.2 = or disjoint i32 %l.A, 10540 store i32 %or.2, ptr %gep.B, align 4541 %iv.next = add i64 %iv, 1542 %ec = icmp eq i64 %iv, 128543 br i1 %ec, label %exit, label %loop544 545exit:546 ret void547}548 549define void @trunc_flags_no_common(ptr noalias %A, ptr noalias %B, ptr noalias %C) {550; CHECK-LABEL: define void @trunc_flags_no_common(551; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) {552; CHECK-NEXT: [[ENTRY:.*:]]553; CHECK-NEXT: br label %[[VECTOR_PH:.*]]554; CHECK: [[VECTOR_PH]]:555; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]556; CHECK: [[VECTOR_BODY]]:557; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]558; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]559; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4560; CHECK-NEXT: [[TMP1:%.*]] = trunc <4 x i32> [[WIDE_LOAD]] to <4 x i16>561; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i16, ptr [[B]], i64 [[INDEX]]562; CHECK-NEXT: store <4 x i16> [[TMP1]], ptr [[TMP2]], align 4563; CHECK-NEXT: store <4 x i16> [[TMP1]], ptr [[TMP2]], align 4564; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4565; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128566; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]567; CHECK: [[MIDDLE_BLOCK]]:568; CHECK-NEXT: br label %[[SCALAR_PH:.*]]569; CHECK: [[SCALAR_PH]]:570; CHECK-NEXT: br label %[[LOOP:.*]]571; CHECK: [[LOOP]]:572; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 128, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]573; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]]574; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4575; CHECK-NEXT: [[TRUNC_1:%.*]] = trunc nsw i32 [[L_A]] to i16576; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr i16, ptr [[B]], i64 [[IV]]577; CHECK-NEXT: store i16 [[TRUNC_1]], ptr [[GEP_B]], align 4578; CHECK-NEXT: [[TRUNC_2:%.*]] = trunc nuw i32 [[L_A]] to i16579; CHECK-NEXT: [[GEP_C:%.*]] = getelementptr i16, ptr [[C]], i64 [[IV]]580; CHECK-NEXT: store i16 [[TRUNC_2]], ptr [[GEP_B]], align 4581; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1582; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 128583; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP22:![0-9]+]]584; CHECK: [[EXIT]]:585; CHECK-NEXT: ret void586;587entry:588 br label %loop589 590loop:591 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]592 %gep.A = getelementptr i32, ptr %A, i64 %iv593 %l.A = load i32, ptr %gep.A, align 4594 %trunc.1 = trunc nsw i32 %l.A to i16595 %gep.B = getelementptr i16, ptr %B, i64 %iv596 store i16 %trunc.1, ptr %gep.B, align 4597 %trunc.2 = trunc nuw i32 %l.A to i16598 %gep.C = getelementptr i16, ptr %C, i64 %iv599 store i16 %trunc.2, ptr %gep.B, align 4600 %iv.next = add i64 %iv, 1601 %ec = icmp eq i64 %iv, 128602 br i1 %ec, label %exit, label %loop603 604exit:605 ret void606}607 608define void @trunc_flags_common(ptr noalias %A, ptr noalias %B, ptr noalias %C) {609; CHECK-LABEL: define void @trunc_flags_common(610; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) {611; CHECK-NEXT: [[ENTRY:.*:]]612; CHECK-NEXT: br label %[[VECTOR_PH:.*]]613; CHECK: [[VECTOR_PH]]:614; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]615; CHECK: [[VECTOR_BODY]]:616; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]617; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]618; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4619; CHECK-NEXT: [[TMP1:%.*]] = trunc nuw <4 x i32> [[WIDE_LOAD]] to <4 x i16>620; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i16, ptr [[B]], i64 [[INDEX]]621; CHECK-NEXT: store <4 x i16> [[TMP1]], ptr [[TMP2]], align 4622; CHECK-NEXT: store <4 x i16> [[TMP1]], ptr [[TMP2]], align 4623; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4624; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128625; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]]626; CHECK: [[MIDDLE_BLOCK]]:627; CHECK-NEXT: br label %[[SCALAR_PH:.*]]628; CHECK: [[SCALAR_PH]]:629; CHECK-NEXT: br label %[[LOOP:.*]]630; CHECK: [[LOOP]]:631; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 128, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]632; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]]633; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4634; CHECK-NEXT: [[TRUNC_1:%.*]] = trunc nuw i32 [[L_A]] to i16635; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr i16, ptr [[B]], i64 [[IV]]636; CHECK-NEXT: store i16 [[TRUNC_1]], ptr [[GEP_B]], align 4637; CHECK-NEXT: [[TRUNC_2:%.*]] = trunc nuw nsw i32 [[L_A]] to i16638; CHECK-NEXT: [[GEP_C:%.*]] = getelementptr i16, ptr [[C]], i64 [[IV]]639; CHECK-NEXT: store i16 [[TRUNC_2]], ptr [[GEP_B]], align 4640; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1641; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 128642; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP24:![0-9]+]]643; CHECK: [[EXIT]]:644; CHECK-NEXT: ret void645;646entry:647 br label %loop648 649loop:650 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]651 %gep.A = getelementptr i32, ptr %A, i64 %iv652 %l.A = load i32, ptr %gep.A, align 4653 %trunc.1 = trunc nuw i32 %l.A to i16654 %gep.B = getelementptr i16, ptr %B, i64 %iv655 store i16 %trunc.1, ptr %gep.B, align 4656 %trunc.2 = trunc nuw nsw i32 %l.A to i16657 %gep.C = getelementptr i16, ptr %C, i64 %iv658 store i16 %trunc.2, ptr %gep.B, align 4659 %iv.next = add i64 %iv, 1660 %ec = icmp eq i64 %iv, 128661 br i1 %ec, label %exit, label %loop662 663exit:664 ret void665}666