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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 52; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s3 4define float @fmax_ogt_with_select_1(ptr %src, i64 %n) {5; CHECK-LABEL: define float @fmax_ogt_with_select_1(6; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*]]:8; CHECK-NEXT: br label %[[LOOP:.*]]9; CHECK: [[LOOP]]:10; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]11; CHECK-NEXT: [[MAX:%.*]] = phi float [ -1.000000e+07, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]12; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]13; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 414; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[L]], [[MAX]]15; CHECK-NEXT: [[MAX_NEXT]] = select i1 [[CMP]], float [[L]], float [[MAX]]16; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 117; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]18; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]19; CHECK: [[EXIT]]:20; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ]21; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]22;23entry:24 br label %loop25 26loop:27 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]28 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]29 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv30 %l = load float, ptr %gep.src, align 431 %cmp = fcmp ogt float %l, %max32 %max.next = select i1 %cmp, float %l, float %max33 %iv.next = add nuw nsw i64 %iv, 134 %ec = icmp eq i64 %iv.next, %n35 br i1 %ec, label %exit, label %loop36 37exit:38 ret float %max.next39}40 41define float @fmax_ogt_with_select_2(ptr %src, i64 %n) {42; CHECK-LABEL: define float @fmax_ogt_with_select_2(43; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {44; CHECK-NEXT: [[ENTRY:.*]]:45; CHECK-NEXT: br label %[[LOOP:.*]]46; CHECK: [[LOOP]]:47; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]48; CHECK-NEXT: [[MAX:%.*]] = phi float [ -1.000000e+07, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]49; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]50; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 451; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[MAX]], [[L]]52; CHECK-NEXT: [[MAX_NEXT]] = select i1 [[CMP]], float [[MAX]], float [[L]]53; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 154; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]55; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]56; CHECK: [[EXIT]]:57; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ]58; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]59;60entry:61 br label %loop62 63loop:64 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]65 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]66 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv67 %l = load float, ptr %gep.src, align 468 %cmp = fcmp ogt float %max, %l69 %max.next = select i1 %cmp, float %max, float %l70 %iv.next = add nuw nsw i64 %iv, 171 %ec = icmp eq i64 %iv.next, %n72 br i1 %ec, label %exit, label %loop73 74exit:75 ret float %max.next76}77 78define float @fmax_olt_with_select_1(ptr %src, i64 %n) {79; CHECK-LABEL: define float @fmax_olt_with_select_1(80; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {81; CHECK-NEXT: [[ENTRY:.*]]:82; CHECK-NEXT: br label %[[LOOP:.*]]83; CHECK: [[LOOP]]:84; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]85; CHECK-NEXT: [[MAX:%.*]] = phi float [ -1.000000e+07, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]86; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]87; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 488; CHECK-NEXT: [[CMP:%.*]] = fcmp olt float [[L]], [[MAX]]89; CHECK-NEXT: [[MAX_NEXT]] = select i1 [[CMP]], float [[MAX]], float [[L]]90; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 191; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]92; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]93; CHECK: [[EXIT]]:94; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ]95; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]96;97entry:98 br label %loop99 100loop:101 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]102 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]103 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv104 %l = load float, ptr %gep.src, align 4105 %cmp = fcmp olt float %l, %max106 %max.next = select i1 %cmp, float %max, float %l107 %iv.next = add nuw nsw i64 %iv, 1108 %ec = icmp eq i64 %iv.next, %n109 br i1 %ec, label %exit, label %loop110 111exit:112 ret float %max.next113}114 115define float @fmax_olt_with_select_2(ptr %src, i64 %n) {116; CHECK-LABEL: define float @fmax_olt_with_select_2(117; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {118; CHECK-NEXT: [[ENTRY:.*]]:119; CHECK-NEXT: br label %[[LOOP:.*]]120; CHECK: [[LOOP]]:121; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]122; CHECK-NEXT: [[MAX:%.*]] = phi float [ -1.000000e+07, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]123; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]124; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4125; CHECK-NEXT: [[CMP:%.*]] = fcmp olt float [[MAX]], [[L]]126; CHECK-NEXT: [[MAX_NEXT]] = select i1 [[CMP]], float [[L]], float [[MAX]]127; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1128; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]129; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]130; CHECK: [[EXIT]]:131; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ]132; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]133;134entry:135 br label %loop136 137loop:138 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]139 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]140 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv141 %l = load float, ptr %gep.src, align 4142 %cmp = fcmp olt float %max, %l143 %max.next = select i1 %cmp, float %l, float %max144 %iv.next = add nuw nsw i64 %iv, 1145 %ec = icmp eq i64 %iv.next, %n146 br i1 %ec, label %exit, label %loop147 148exit:149 ret float %max.next150}151 152define float @fmax_ogt_with_select_store_result(ptr %src, ptr %dst, i64 %n) {153; CHECK-LABEL: define float @fmax_ogt_with_select_store_result(154; CHECK-SAME: ptr [[SRC:%.*]], ptr [[DST:%.*]], i64 [[N:%.*]]) {155; CHECK-NEXT: [[ENTRY:.*]]:156; CHECK-NEXT: br label %[[LOOP:.*]]157; CHECK: [[LOOP]]:158; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]159; CHECK-NEXT: [[MAX:%.*]] = phi float [ -1.000000e+07, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]160; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]161; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4162; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[L]], [[MAX]]163; CHECK-NEXT: [[MAX_NEXT]] = select i1 [[CMP]], float [[L]], float [[MAX]]164; CHECK-NEXT: store float [[MAX_NEXT]], ptr [[DST]], align 8165; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1166; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]167; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]168; CHECK: [[EXIT]]:169; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ]170; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]171;172entry:173 br label %loop174 175loop:176 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]177 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]178 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv179 %l = load float, ptr %gep.src, align 4180 %cmp = fcmp ogt float %l, %max181 %max.next = select i1 %cmp, float %l, float %max182 store float %max.next, ptr %dst, align 8183 %iv.next = add nuw nsw i64 %iv, 1184 %ec = icmp eq i64 %iv.next, %n185 br i1 %ec, label %exit, label %loop186 187exit:188 ret float %max.next189}190 191define float @fmaxnum_1(ptr %src, i64 %n) {192; CHECK-LABEL: define float @fmaxnum_1(193; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {194; CHECK-NEXT: [[ENTRY:.*]]:195; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 4196; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]197; CHECK: [[VECTOR_PH]]:198; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 4199; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]200; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]201; CHECK: [[VECTOR_BODY]]:202; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]203; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP4:%.*]], %[[VECTOR_BODY]] ]204; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]205; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[GEP_SRC]], align 4206; CHECK-NEXT: [[TMP4]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[WIDE_LOAD]], <4 x float> [[VEC_PHI]])207; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], 4208; CHECK-NEXT: [[TMP2:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD]]209; CHECK-NEXT: [[TMP10:%.*]] = freeze <4 x i1> [[TMP2]]210; CHECK-NEXT: [[TMP3:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP10]])211; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]212; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP3]], [[TMP5]]213; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]214; CHECK: [[MIDDLE_BLOCK]]:215; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP3]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP4]]216; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[TMP3]], i64 [[IV]], i64 [[N_VEC]]217; CHECK-NEXT: [[TMP8:%.*]] = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[TMP7]])218; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]219; CHECK-NEXT: [[TMP11:%.*]] = xor i1 [[TMP3]], true220; CHECK-NEXT: [[TMP12:%.*]] = and i1 [[CMP_N]], [[TMP11]]221; CHECK-NEXT: br i1 [[TMP12]], label %[[EXIT:.*]], label %[[SCALAR_PH]]222; CHECK: [[SCALAR_PH]]:223; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP9]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]224; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP8]], %[[MIDDLE_BLOCK]] ], [ -1.000000e+07, %[[ENTRY]] ]225; CHECK-NEXT: br label %[[LOOP:.*]]226; CHECK: [[LOOP]]:227; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]228; CHECK-NEXT: [[MAX:%.*]] = phi float [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]229; CHECK-NEXT: [[GEP_SRC1:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV1]]230; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC1]], align 4231; CHECK-NEXT: [[MAX_NEXT]] = call float @llvm.maxnum.f32(float [[L]], float [[MAX]])232; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1233; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]234; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]235; CHECK: [[EXIT]]:236; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ], [ [[TMP8]], %[[MIDDLE_BLOCK]] ]237; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]238;239entry:240 br label %loop241 242loop:243 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]244 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]245 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv246 %l = load float, ptr %gep.src, align 4247 %max.next = call float @llvm.maxnum.f32(float %l, float %max)248 %iv.next = add nuw nsw i64 %iv, 1249 %ec = icmp eq i64 %iv.next, %n250 br i1 %ec, label %exit, label %loop251 252exit:253 ret float %max.next254}255 256define float @fmaxnum_2(ptr %src, i64 %n) {257; CHECK-LABEL: define float @fmaxnum_2(258; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {259; CHECK-NEXT: [[ENTRY:.*]]:260; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 4261; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]262; CHECK: [[VECTOR_PH]]:263; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 4264; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]265; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]266; CHECK: [[VECTOR_BODY]]:267; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]268; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP4:%.*]], %[[VECTOR_BODY]] ]269; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]270; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[GEP_SRC]], align 4271; CHECK-NEXT: [[TMP4]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI]], <4 x float> [[WIDE_LOAD]])272; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], 4273; CHECK-NEXT: [[TMP2:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD]]274; CHECK-NEXT: [[TMP10:%.*]] = freeze <4 x i1> [[TMP2]]275; CHECK-NEXT: [[TMP3:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP10]])276; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]277; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP3]], [[TMP5]]278; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]279; CHECK: [[MIDDLE_BLOCK]]:280; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP3]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP4]]281; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[TMP3]], i64 [[IV]], i64 [[N_VEC]]282; CHECK-NEXT: [[TMP8:%.*]] = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[TMP7]])283; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]284; CHECK-NEXT: [[TMP11:%.*]] = xor i1 [[TMP3]], true285; CHECK-NEXT: [[TMP12:%.*]] = and i1 [[CMP_N]], [[TMP11]]286; CHECK-NEXT: br i1 [[TMP12]], label %[[EXIT:.*]], label %[[SCALAR_PH]]287; CHECK: [[SCALAR_PH]]:288; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP9]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]289; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP8]], %[[MIDDLE_BLOCK]] ], [ -1.000000e+07, %[[ENTRY]] ]290; CHECK-NEXT: br label %[[LOOP:.*]]291; CHECK: [[LOOP]]:292; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]293; CHECK-NEXT: [[MAX:%.*]] = phi float [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]294; CHECK-NEXT: [[GEP_SRC1:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV1]]295; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC1]], align 4296; CHECK-NEXT: [[MAX_NEXT]] = call float @llvm.maxnum.f32(float [[MAX]], float [[L]])297; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1298; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]299; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]300; CHECK: [[EXIT]]:301; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ], [ [[TMP8]], %[[MIDDLE_BLOCK]] ]302; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]303;304entry:305 br label %loop306 307loop:308 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]309 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]310 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv311 %l = load float, ptr %gep.src, align 4312 %max.next = call float @llvm.maxnum.f32(float %max, float %l)313 %iv.next = add nuw nsw i64 %iv, 1314 %ec = icmp eq i64 %iv.next, %n315 br i1 %ec, label %exit, label %loop316 317exit:318 ret float %max.next319}320 321define float @fmaxnum_induction_starts_at_10(ptr %src, i64 %n) {322; CHECK-LABEL: define float @fmaxnum_induction_starts_at_10(323; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {324; CHECK-NEXT: [[ENTRY:.*]]:325; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], -10326; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4327; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]328; CHECK: [[VECTOR_PH]]:329; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4330; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]331; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]332; CHECK: [[VECTOR_BODY]]:333; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]334; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]335; CHECK-NEXT: [[IV:%.*]] = add i64 10, [[INDEX]]336; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]337; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[GEP_SRC]], align 4338; CHECK-NEXT: [[TMP3]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[WIDE_LOAD]], <4 x float> [[VEC_PHI]])339; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4340; CHECK-NEXT: [[TMP5:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD]]341; CHECK-NEXT: [[TMP12:%.*]] = freeze <4 x i1> [[TMP5]]342; CHECK-NEXT: [[TMP6:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP12]])343; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]344; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP6]], [[TMP4]]345; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]346; CHECK: [[MIDDLE_BLOCK]]:347; CHECK-NEXT: [[TMP8:%.*]] = select i1 [[TMP6]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP3]]348; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[TMP6]], i64 [[INDEX]], i64 [[N_VEC]]349; CHECK-NEXT: [[TMP10:%.*]] = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[TMP8]])350; CHECK-NEXT: [[TMP11:%.*]] = add i64 10, [[TMP9]]351; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]352; CHECK-NEXT: [[TMP13:%.*]] = xor i1 [[TMP6]], true353; CHECK-NEXT: [[TMP14:%.*]] = and i1 [[CMP_N]], [[TMP13]]354; CHECK-NEXT: br i1 [[TMP14]], label %[[EXIT:.*]], label %[[SCALAR_PH]]355; CHECK: [[SCALAR_PH]]:356; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP11]], %[[MIDDLE_BLOCK]] ], [ 10, %[[ENTRY]] ]357; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ -1.000000e+07, %[[ENTRY]] ]358; CHECK-NEXT: br label %[[LOOP:.*]]359; CHECK: [[LOOP]]:360; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]361; CHECK-NEXT: [[MAX:%.*]] = phi float [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]362; CHECK-NEXT: [[GEP_SRC1:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV1]]363; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC1]], align 4364; CHECK-NEXT: [[MAX_NEXT]] = call float @llvm.maxnum.f32(float [[L]], float [[MAX]])365; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1366; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]367; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP7:![0-9]+]]368; CHECK: [[EXIT]]:369; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ], [ [[TMP10]], %[[MIDDLE_BLOCK]] ]370; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]371;372entry:373 br label %loop374 375loop:376 %iv = phi i64 [ 10, %entry ], [ %iv.next, %loop ]377 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]378 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv379 %l = load float, ptr %gep.src, align 4380 %max.next = call float @llvm.maxnum.f32(float %l, float %max)381 %iv.next = add nuw nsw i64 %iv, 1382 %ec = icmp eq i64 %iv.next, %n383 br i1 %ec, label %exit, label %loop384 385exit:386 ret float %max.next387}388 389define float @fmaxnum_induction_starts_at_value(ptr %src, i64 %start, i64 %n) {390; CHECK-LABEL: define float @fmaxnum_induction_starts_at_value(391; CHECK-SAME: ptr [[SRC:%.*]], i64 [[START:%.*]], i64 [[N:%.*]]) {392; CHECK-NEXT: [[ENTRY:.*]]:393; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[N]], [[START]]394; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4395; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]396; CHECK: [[VECTOR_PH]]:397; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4398; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]399; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]400; CHECK: [[VECTOR_BODY]]:401; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]402; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -1.000000e+07), %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]403; CHECK-NEXT: [[IV:%.*]] = add i64 [[START]], [[INDEX]]404; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]405; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[GEP_SRC]], align 4406; CHECK-NEXT: [[TMP3]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[WIDE_LOAD]], <4 x float> [[VEC_PHI]])407; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4408; CHECK-NEXT: [[TMP5:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD]]409; CHECK-NEXT: [[TMP12:%.*]] = freeze <4 x i1> [[TMP5]]410; CHECK-NEXT: [[TMP6:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP12]])411; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]412; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP6]], [[TMP4]]413; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]414; CHECK: [[MIDDLE_BLOCK]]:415; CHECK-NEXT: [[TMP8:%.*]] = select i1 [[TMP6]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP3]]416; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[TMP6]], i64 [[INDEX]], i64 [[N_VEC]]417; CHECK-NEXT: [[TMP10:%.*]] = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[TMP8]])418; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[START]], [[TMP9]]419; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]420; CHECK-NEXT: [[TMP13:%.*]] = xor i1 [[TMP6]], true421; CHECK-NEXT: [[TMP14:%.*]] = and i1 [[CMP_N]], [[TMP13]]422; CHECK-NEXT: br i1 [[TMP14]], label %[[EXIT:.*]], label %[[SCALAR_PH]]423; CHECK: [[SCALAR_PH]]:424; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP11]], %[[MIDDLE_BLOCK]] ], [ [[START]], %[[ENTRY]] ]425; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ -1.000000e+07, %[[ENTRY]] ]426; CHECK-NEXT: br label %[[LOOP:.*]]427; CHECK: [[LOOP]]:428; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]429; CHECK-NEXT: [[MAX:%.*]] = phi float [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]430; CHECK-NEXT: [[GEP_SRC1:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV1]]431; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC1]], align 4432; CHECK-NEXT: [[MAX_NEXT]] = call float @llvm.maxnum.f32(float [[L]], float [[MAX]])433; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1434; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]435; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP9:![0-9]+]]436; CHECK: [[EXIT]]:437; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ], [ [[TMP10]], %[[MIDDLE_BLOCK]] ]438; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]439;440entry:441 br label %loop442 443loop:444 %iv = phi i64 [ %start, %entry ], [ %iv.next, %loop ]445 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]446 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv447 %l = load float, ptr %gep.src, align 4448 %max.next = call float @llvm.maxnum.f32(float %l, float %max)449 %iv.next = add nuw nsw i64 %iv, 1450 %ec = icmp eq i64 %iv.next, %n451 br i1 %ec, label %exit, label %loop452 453exit:454 ret float %max.next455}456 457define float @fmaxnum_with_additional_add(ptr noalias %src, ptr noalias %src.2, i64 %n) {458; CHECK-LABEL: define float @fmaxnum_with_additional_add(459; CHECK-SAME: ptr noalias [[SRC:%.*]], ptr noalias [[SRC_2:%.*]], i64 [[N:%.*]]) {460; CHECK-NEXT: [[ENTRY:.*]]:461; CHECK-NEXT: br label %[[LOOP:.*]]462; CHECK: [[LOOP]]:463; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]464; CHECK-NEXT: [[MAX:%.*]] = phi float [ -1.000000e+07, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]465; CHECK-NEXT: [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]466; CHECK-NEXT: [[GEP_SRC_2:%.*]] = getelementptr inbounds nuw i32, ptr [[SRC_2]], i64 [[IV]]467; CHECK-NEXT: [[L_SRC_2:%.*]] = load i32, ptr [[GEP_SRC_2]], align 4468; CHECK-NEXT: [[SUM_NEXT]] = add i32 [[SUM]], [[L_SRC_2]]469; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]470; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4471; CHECK-NEXT: [[MAX_NEXT]] = call float @llvm.maxnum.f32(float [[L]], float [[MAX]])472; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1473; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]474; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]475; CHECK: [[EXIT]]:476; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]477; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ]478; CHECK-NEXT: store i32 [[SUM_NEXT_LCSSA]], ptr [[SRC_2]], align 4479; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]480;481entry:482 br label %loop483 484loop:485 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]486 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]487 %sum = phi i32 [ 0, %entry ], [ %sum.next, %loop ]488 %gep.src.2 = getelementptr inbounds nuw i32, ptr %src.2, i64 %iv489 %l.src.2 = load i32, ptr %gep.src.2, align 4490 %sum.next = add i32 %sum, %l.src.2491 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv492 %l = load float, ptr %gep.src, align 4493 %max.next = call float @llvm.maxnum.f32(float %l, float %max)494 %iv.next = add nuw nsw i64 %iv, 1495 %ec = icmp eq i64 %iv.next, %n496 br i1 %ec, label %exit, label %loop497 498exit:499 store i32 %sum.next, ptr %src.2500 ret float %max.next501}502 503define float @fmax_select_with_blend(ptr %A, ptr %B) {504; CHECK-LABEL: define float @fmax_select_with_blend(505; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) {506; CHECK-NEXT: [[ENTRY:.*]]:507; CHECK-NEXT: br label %[[LOOP:.*]]508; CHECK: [[LOOP]]:509; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]510; CHECK-NEXT: [[MAX:%.*]] = phi float [ 0.000000e+00, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP_LATCH]] ]511; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]512; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4513; CHECK-NEXT: [[C_1:%.*]] = icmp eq i32 [[L_A]], 0514; CHECK-NEXT: br i1 [[C_1]], label %[[LOOP_THEN:.*]], label %[[LOOP_LATCH]]515; CHECK: [[LOOP_THEN]]:516; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]517; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_B]], align 4518; CHECK-NEXT: [[C_2:%.*]] = fcmp ogt float [[MAX]], [[L]]519; CHECK-NEXT: [[MAX_SEL:%.*]] = select i1 [[C_2]], float [[MAX]], float [[L]]520; CHECK-NEXT: br label %[[LOOP_LATCH]]521; CHECK: [[LOOP_LATCH]]:522; CHECK-NEXT: [[MAX_NEXT]] = phi float [ [[MAX_SEL]], %[[LOOP_THEN]] ], [ [[MAX]], %[[LOOP]] ]523; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1524; CHECK-NEXT: [[EC:%.*]] = icmp ne i64 [[IV_NEXT]], 1000525; CHECK-NEXT: br i1 [[EC]], label %[[LOOP]], label %[[EXIT:.*]]526; CHECK: [[EXIT]]:527; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP_LATCH]] ]528; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]529;530entry:531 br label %loop532 533loop:534 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]535 %max = phi float [ 0.000000e+00, %entry ], [ %max.next, %loop.latch ]536 %gep.A = getelementptr inbounds i32, ptr %A, i64 %iv537 %l.A = load i32, ptr %gep.A538 %c.1 = icmp eq i32 %l.A, 0539 br i1 %c.1, label %loop.then, label %loop.latch540 541loop.then:542 %gep.B = getelementptr inbounds float, ptr %B, i64 %iv543 %l = load float, ptr %gep.B544 %c.2 = fcmp ogt float %max, %l545 %max.sel = select i1 %c.2, float %max, float %l546 br label %loop.latch547 548loop.latch:549 %max.next = phi float [ %max.sel, %loop.then ], [ %max, %loop ]550 %iv.next = add i64 %iv, 1551 %ec = icmp ne i64 %iv.next, 1000552 br i1 %ec, label %loop, label %exit553 554exit:555 ret float %max.next556}557 558define float @fmax_with_select_and_load_store(ptr %src, ptr noalias %dst, i64 %n) {559; CHECK-LABEL: define float @fmax_with_select_and_load_store(560; CHECK-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]], i64 [[N:%.*]]) {561; CHECK-NEXT: [[ENTRY:.*]]:562; CHECK-NEXT: br label %[[LOOP:.*]]563; CHECK: [[LOOP]]:564; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]565; CHECK-NEXT: [[MAX:%.*]] = phi float [ -1.000000e+07, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]566; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]567; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4568; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[L]], [[MAX]]569; CHECK-NEXT: [[IV_1:%.*]] = add i64 [[IV]], 1570; CHECK-NEXT: [[GEP_DST_1:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[IV_1]]571; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[GEP_DST_1]], align 4572; CHECK-NEXT: [[GEP_DST_0:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[IV]]573; CHECK-NEXT: store i32 [[L_2]], ptr [[GEP_DST_0]], align 4574; CHECK-NEXT: [[MAX_NEXT]] = select i1 [[CMP]], float [[L]], float [[MAX]]575; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1576; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]577; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]578; CHECK: [[EXIT]]:579; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ]580; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]581;582entry:583 br label %loop584 585loop:586 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]587 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]588 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv589 %l = load float, ptr %gep.src, align 4590 %cmp = fcmp ogt float %l, %max591 %iv.1 = add i64 %iv, 1592 %gep.dst.1 = getelementptr inbounds i32, ptr %dst, i64 %iv.1593 %l.2 = load i32, ptr %gep.dst.1594 %gep.dst.0 = getelementptr inbounds i32, ptr %dst, i64 %iv595 store i32 %l.2, ptr %gep.dst.0596 %max.next = select i1 %cmp, float %l, float %max597 %iv.next = add nuw nsw i64 %iv, 1598 %ec = icmp eq i64 %iv.next, %n599 br i1 %ec, label %exit, label %loop600 601exit:602 ret float %max.next603}604 605define float @fmax_ugt_with_select_1(ptr %src, i64 %n) {606; CHECK-LABEL: define float @fmax_ugt_with_select_1(607; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {608; CHECK-NEXT: [[ENTRY:.*]]:609; CHECK-NEXT: br label %[[LOOP:.*]]610; CHECK: [[LOOP]]:611; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]612; CHECK-NEXT: [[MAX:%.*]] = phi float [ -1.000000e+07, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]613; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]614; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4615; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt float [[L]], [[MAX]]616; CHECK-NEXT: [[MAX_NEXT]] = select i1 [[CMP]], float [[L]], float [[MAX]]617; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1618; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]619; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]620; CHECK: [[EXIT]]:621; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ]622; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]623;624entry:625 br label %loop626 627loop:628 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]629 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]630 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv631 %l = load float, ptr %gep.src, align 4632 %cmp = fcmp ugt float %l, %max633 %max.next = select i1 %cmp, float %l, float %max634 %iv.next = add nuw nsw i64 %iv, 1635 %ec = icmp eq i64 %iv.next, %n636 br i1 %ec, label %exit, label %loop637 638exit:639 ret float %max.next640}641 642define float @fmax_oge_with_select_1(ptr %src, i64 %n) {643; CHECK-LABEL: define float @fmax_oge_with_select_1(644; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {645; CHECK-NEXT: [[ENTRY:.*]]:646; CHECK-NEXT: br label %[[LOOP:.*]]647; CHECK: [[LOOP]]:648; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]649; CHECK-NEXT: [[MAX:%.*]] = phi float [ -1.000000e+07, %[[ENTRY]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]650; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds nuw float, ptr [[SRC]], i64 [[IV]]651; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4652; CHECK-NEXT: [[CMP:%.*]] = fcmp oge float [[L]], [[MAX]]653; CHECK-NEXT: [[MAX_NEXT]] = select i1 [[CMP]], float [[L]], float [[MAX]]654; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1655; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]656; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]657; CHECK: [[EXIT]]:658; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ]659; CHECK-NEXT: ret float [[MAX_NEXT_LCSSA]]660;661entry:662 br label %loop663 664loop:665 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]666 %max = phi float [ -1.000000e+07, %entry ], [ %max.next, %loop ]667 %gep.src = getelementptr inbounds nuw float, ptr %src, i64 %iv668 %l = load float, ptr %gep.src, align 4669 %cmp = fcmp oge float %l, %max670 %max.next = select i1 %cmp, float %l, float %max671 %iv.next = add nuw nsw i64 %iv, 1672 %ec = icmp eq i64 %iv.next, %n673 br i1 %ec, label %exit, label %loop674 675exit:676 ret float %max.next677}678 679define float @test_fmax_and_fmax(ptr %src.0, ptr %src.1, i64 %n) {680; CHECK-LABEL: define float @test_fmax_and_fmax(681; CHECK-SAME: ptr [[SRC_0:%.*]], ptr [[SRC_1:%.*]], i64 [[N:%.*]]) {682; CHECK-NEXT: [[ENTRY:.*]]:683; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 4684; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]685; CHECK: [[VECTOR_PH]]:686; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 4687; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]688; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]689; CHECK: [[VECTOR_BODY]]:690; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]691; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]692; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP2:%.*]], %[[VECTOR_BODY]] ]693; CHECK-NEXT: [[GEP_SRC_0:%.*]] = getelementptr inbounds nuw float, ptr [[SRC_0]], i64 [[IV]]694; CHECK-NEXT: [[GEP_SRC_1:%.*]] = getelementptr inbounds nuw float, ptr [[SRC_1]], i64 [[IV]]695; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[GEP_SRC_0]], align 4696; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, ptr [[GEP_SRC_1]], align 4697; CHECK-NEXT: [[TMP2]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[VEC_PHI1]], <4 x float> [[WIDE_LOAD]])698; CHECK-NEXT: [[TMP3]] = call <4 x float> @llvm.minnum.v4f32(<4 x float> [[VEC_PHI]], <4 x float> [[WIDE_LOAD2]])699; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[IV]], 4700; CHECK-NEXT: [[TMP4:%.*]] = fcmp uno <4 x float> [[WIDE_LOAD2]], [[WIDE_LOAD]]701; CHECK-NEXT: [[TMP8:%.*]] = freeze <4 x i1> [[TMP4]]702; CHECK-NEXT: [[TMP9:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP8]])703; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]704; CHECK-NEXT: [[TMP10:%.*]] = or i1 [[TMP9]], [[TMP11]]705; CHECK-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]706; CHECK: [[MIDDLE_BLOCK]]:707; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[TMP9]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP3]]708; CHECK-NEXT: [[TMP14:%.*]] = select i1 [[TMP9]], <4 x float> [[VEC_PHI1]], <4 x float> [[TMP2]]709; CHECK-NEXT: [[TMP15:%.*]] = select i1 [[TMP9]], i64 [[IV]], i64 [[N_VEC]]710; CHECK-NEXT: [[TMP16:%.*]] = call float @llvm.vector.reduce.fmin.v4f32(<4 x float> [[TMP13]])711; CHECK-NEXT: [[TMP17:%.*]] = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[TMP14]])712; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]713; CHECK-NEXT: [[TMP18:%.*]] = xor i1 [[TMP9]], true714; CHECK-NEXT: [[TMP19:%.*]] = and i1 [[CMP_N]], [[TMP18]]715; CHECK-NEXT: br i1 [[TMP19]], label %[[EXIT:.*]], label %[[SCALAR_PH]]716; CHECK: [[SCALAR_PH]]:717; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP15]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]718; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP16]], %[[MIDDLE_BLOCK]] ], [ 0.000000e+00, %[[ENTRY]] ]719; CHECK-NEXT: [[BC_MERGE_RDX3:%.*]] = phi float [ [[TMP17]], %[[MIDDLE_BLOCK]] ], [ 0.000000e+00, %[[ENTRY]] ]720; CHECK-NEXT: br label %[[LOOP:.*]]721; CHECK: [[LOOP]]:722; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]723; CHECK-NEXT: [[MIN:%.*]] = phi float [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[MIN_NEXT:%.*]], %[[LOOP]] ]724; CHECK-NEXT: [[MAX:%.*]] = phi float [ [[BC_MERGE_RDX3]], %[[SCALAR_PH]] ], [ [[MAX_NEXT:%.*]], %[[LOOP]] ]725; CHECK-NEXT: [[GEP_SRC_2:%.*]] = getelementptr inbounds nuw float, ptr [[SRC_0]], i64 [[IV1]]726; CHECK-NEXT: [[GEP_SRC_3:%.*]] = getelementptr inbounds nuw float, ptr [[SRC_1]], i64 [[IV1]]727; CHECK-NEXT: [[L_0:%.*]] = load float, ptr [[GEP_SRC_2]], align 4728; CHECK-NEXT: [[L_1:%.*]] = load float, ptr [[GEP_SRC_3]], align 4729; CHECK-NEXT: [[MAX_NEXT]] = tail call noundef float @llvm.maxnum.f32(float [[MAX]], float [[L_0]])730; CHECK-NEXT: [[MIN_NEXT]] = tail call noundef float @llvm.minnum.f32(float [[MIN]], float [[L_1]])731; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1732; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]733; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP11:![0-9]+]]734; CHECK: [[EXIT]]:735; CHECK-NEXT: [[MAX_NEXT_LCSSA:%.*]] = phi float [ [[MAX_NEXT]], %[[LOOP]] ], [ [[TMP17]], %[[MIDDLE_BLOCK]] ]736; CHECK-NEXT: [[MIN_NEXT_LCSSA:%.*]] = phi float [ [[MIN_NEXT]], %[[LOOP]] ], [ [[TMP16]], %[[MIDDLE_BLOCK]] ]737; CHECK-NEXT: [[SUB:%.*]] = fsub float [[MAX_NEXT_LCSSA]], [[MIN_NEXT_LCSSA]]738; CHECK-NEXT: ret float [[SUB]]739;740entry:741 br label %loop742 743loop:744 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]745 %min = phi float [ 0.000000e+00, %entry ], [ %min.next, %loop ]746 %max = phi float [ 0.000000e+00, %entry ], [ %max.next, %loop ]747 %gep.src.0 = getelementptr inbounds nuw float, ptr %src.0, i64 %iv748 %gep.src.1 = getelementptr inbounds nuw float, ptr %src.1, i64 %iv749 %l.0 = load float, ptr %gep.src.0, align 4750 %l.1 = load float, ptr %gep.src.1, align 4751 %max.next = tail call noundef float @llvm.maxnum.f32(float %max, float %l.0)752 %min.next = tail call noundef float @llvm.minnum.f32(float %min, float %l.1)753 %iv.next = add nuw nsw i64 %iv, 1754 %ec = icmp eq i64 %iv.next, %n755 br i1 %ec, label %exit, label %loop756 757exit:758 %sub = fsub float %max.next, %min.next759 ret float %sub760}761