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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph:" --version 62; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck %s3 4define void @test_stores_noalias_via_rt_checks_after_loads(ptr %dst, ptr %src, ptr %cond) {5; CHECK-LABEL: define void @test_stores_noalias_via_rt_checks_after_loads(6; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], ptr [[COND:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]9; CHECK: [[VECTOR_MEMCHECK]]:10; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 40011; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[COND]], i64 40012; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[SRC]], i64 40013; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP1]]14; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP]]15; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]16; CHECK-NEXT: [[BOUND03:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP2]]17; CHECK-NEXT: [[BOUND14:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP]]18; CHECK-NEXT: [[FOUND_CONFLICT5:%.*]] = and i1 [[BOUND03]], [[BOUND14]]19; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT5]]20; CHECK-NEXT: br i1 [[CONFLICT_RDX]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]21; CHECK: [[VECTOR_PH]]:22; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]23; CHECK: [[VECTOR_BODY]]:24; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE11:.*]] ]25; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 026; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 127; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[COND]], i32 [[TMP4]]28; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP6]], align 4, !alias.scope [[META0:![0-9]+]]29; CHECK-NEXT: [[TMP7:%.*]] = icmp ule <2 x i32> [[WIDE_LOAD]], splat (i32 11)30; CHECK-NEXT: [[TMP8:%.*]] = xor <2 x i1> [[TMP7]], splat (i1 true)31; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP4]]32; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP5]]33; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP10]], align 4, !alias.scope [[META3:![0-9]+]]34; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4, !alias.scope [[META3]]35; CHECK-NEXT: [[TMP13:%.*]] = insertelement <2 x i32> poison, i32 [[TMP9]], i32 036; CHECK-NEXT: [[TMP17:%.*]] = insertelement <2 x i32> [[TMP13]], i32 [[TMP16]], i32 137; CHECK-NEXT: [[TMP19:%.*]] = sub <2 x i32> [[TMP17]], splat (i32 5)38; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x i1> [[TMP8]], i32 039; CHECK-NEXT: br i1 [[TMP20]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]40; CHECK: [[PRED_STORE_IF]]:41; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]42; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i32> [[TMP19]], i32 043; CHECK-NEXT: store i32 [[TMP22]], ptr [[TMP21]], align 4, !alias.scope [[META5:![0-9]+]], !noalias [[META7:![0-9]+]]44; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]45; CHECK: [[PRED_STORE_CONTINUE]]:46; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x i1> [[TMP8]], i32 147; CHECK-NEXT: br i1 [[TMP23]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7:.*]]48; CHECK: [[PRED_STORE_IF6]]:49; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]50; CHECK-NEXT: [[TMP25:%.*]] = extractelement <2 x i32> [[TMP19]], i32 151; CHECK-NEXT: store i32 [[TMP25]], ptr [[TMP24]], align 4, !alias.scope [[META5]], !noalias [[META7]]52; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE7]]53; CHECK: [[PRED_STORE_CONTINUE7]]:54; CHECK-NEXT: [[TMP36:%.*]] = add <2 x i32> [[TMP17]], splat (i32 10)55; CHECK-NEXT: [[TMP37:%.*]] = extractelement <2 x i1> [[TMP7]], i32 056; CHECK-NEXT: br i1 [[TMP37]], label %[[PRED_STORE_IF8:.*]], label %[[PRED_STORE_CONTINUE9:.*]]57; CHECK: [[PRED_STORE_IF8]]:58; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]59; CHECK-NEXT: [[TMP39:%.*]] = extractelement <2 x i32> [[TMP36]], i32 060; CHECK-NEXT: store i32 [[TMP39]], ptr [[TMP38]], align 4, !alias.scope [[META5]], !noalias [[META7]]61; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE9]]62; CHECK: [[PRED_STORE_CONTINUE9]]:63; CHECK-NEXT: [[TMP40:%.*]] = extractelement <2 x i1> [[TMP7]], i32 164; CHECK-NEXT: br i1 [[TMP40]], label %[[PRED_STORE_IF10:.*]], label %[[PRED_STORE_CONTINUE11]]65; CHECK: [[PRED_STORE_IF10]]:66; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]67; CHECK-NEXT: [[TMP42:%.*]] = extractelement <2 x i32> [[TMP36]], i32 168; CHECK-NEXT: store i32 [[TMP42]], ptr [[TMP41]], align 4, !alias.scope [[META5]], !noalias [[META7]]69; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE11]]70; CHECK: [[PRED_STORE_CONTINUE11]]:71; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 272; CHECK-NEXT: [[TMP43:%.*]] = icmp eq i32 [[INDEX_NEXT]], 10073; CHECK-NEXT: br i1 [[TMP43]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]74; CHECK: [[MIDDLE_BLOCK]]:75; CHECK-NEXT: br [[EXIT:label %.*]]76; CHECK: [[SCALAR_PH]]:77;78entry:79 br label %loop80 81loop:82 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]83 %gep.cond = getelementptr inbounds i32, ptr %cond, i32 %iv84 %c = load i32, ptr %gep.cond, align 485 %c.0 = icmp ule i32 %c, 1186 br i1 %c.0, label %then, label %else87 88then:89 %gep.src.then = getelementptr inbounds i32, ptr %src, i32 %iv90 %l.src.then = load i32, ptr %gep.src.then, align 491 %add = add i32 %l.src.then, 1092 %gep.dst = getelementptr inbounds i32, ptr %dst, i32 %iv93 store i32 %add, ptr %gep.dst, align 494 br label %loop.latch95 96else:97 %gep.src.else= getelementptr inbounds i32, ptr %src, i32 %iv98 %l.src.else = load i32, ptr %gep.src.else, align 499 %sub = sub i32 %l.src.else, 5100 %gep.dst.else = getelementptr inbounds i32, ptr %dst, i32 %iv101 store i32 %sub, ptr %gep.dst.else, align 4102 br label %loop.latch103 104loop.latch:105 %iv.next = add nuw nsw i32 %iv, 1106 %ec = icmp eq i32 %iv.next, 100107 br i1 %ec, label %exit, label %loop108 109exit:110 ret void111}112 113define void @test_aliasing_store(ptr %dst, ptr %src, ptr %cond) {114; CHECK-LABEL: define void @test_aliasing_store(115; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], ptr [[COND:%.*]]) {116; CHECK-NEXT: [[ENTRY:.*:]]117; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]118; CHECK: [[VECTOR_MEMCHECK]]:119; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[SRC]], i64 400120; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[DST]], i64 400121; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[COND]], i64 400122; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP1]]123; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP]]124; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]125; CHECK-NEXT: [[BOUND03:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP2]]126; CHECK-NEXT: [[BOUND14:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP]]127; CHECK-NEXT: [[FOUND_CONFLICT5:%.*]] = and i1 [[BOUND03]], [[BOUND14]]128; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT5]]129; CHECK-NEXT: [[BOUND06:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP2]]130; CHECK-NEXT: [[BOUND17:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP1]]131; CHECK-NEXT: [[FOUND_CONFLICT8:%.*]] = and i1 [[BOUND06]], [[BOUND17]]132; CHECK-NEXT: [[CONFLICT_RDX9:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT8]]133; CHECK-NEXT: br i1 [[CONFLICT_RDX9]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]134; CHECK: [[VECTOR_PH]]:135; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]136; CHECK: [[VECTOR_BODY]]:137; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE21:.*]] ]138; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 0139; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 1140; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[COND]], i32 [[TMP4]]141; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP6]], align 4, !alias.scope [[META12:![0-9]+]]142; CHECK-NEXT: [[TMP7:%.*]] = icmp ule <2 x i32> [[WIDE_LOAD]], splat (i32 11)143; CHECK-NEXT: [[TMP8:%.*]] = xor <2 x i1> [[TMP7]], splat (i1 true)144; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP8]], i32 0145; CHECK-NEXT: br i1 [[TMP9]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]146; CHECK: [[PRED_LOAD_IF]]:147; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP4]]148; CHECK-NEXT: store i32 99, ptr [[TMP10]], align 4, !alias.scope [[META15:![0-9]+]], !noalias [[META17:![0-9]+]]149; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4, !alias.scope [[META15]], !noalias [[META17]]150; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i32> poison, i32 [[TMP11]], i32 0151; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]152; CHECK: [[PRED_LOAD_CONTINUE]]:153; CHECK-NEXT: [[TMP13:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP12]], %[[PRED_LOAD_IF]] ]154; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x i1> [[TMP8]], i32 1155; CHECK-NEXT: br i1 [[TMP14]], label %[[PRED_LOAD_IF10:.*]], label %[[PRED_LOAD_CONTINUE11:.*]]156; CHECK: [[PRED_LOAD_IF10]]:157; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP5]]158; CHECK-NEXT: store i32 99, ptr [[TMP15]], align 4, !alias.scope [[META15]], !noalias [[META17]]159; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4, !alias.scope [[META15]], !noalias [[META17]]160; CHECK-NEXT: [[TMP17:%.*]] = insertelement <2 x i32> [[TMP13]], i32 [[TMP16]], i32 1161; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE11]]162; CHECK: [[PRED_LOAD_CONTINUE11]]:163; CHECK-NEXT: [[TMP18:%.*]] = phi <2 x i32> [ [[TMP13]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], %[[PRED_LOAD_IF10]] ]164; CHECK-NEXT: [[TMP19:%.*]] = sub <2 x i32> [[TMP18]], splat (i32 5)165; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x i1> [[TMP8]], i32 0166; CHECK-NEXT: br i1 [[TMP20]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]167; CHECK: [[PRED_STORE_IF]]:168; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]169; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i32> [[TMP19]], i32 0170; CHECK-NEXT: store i32 [[TMP22]], ptr [[TMP21]], align 4, !alias.scope [[META19:![0-9]+]], !noalias [[META12]]171; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]172; CHECK: [[PRED_STORE_CONTINUE]]:173; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x i1> [[TMP8]], i32 1174; CHECK-NEXT: br i1 [[TMP23]], label %[[PRED_STORE_IF12:.*]], label %[[PRED_STORE_CONTINUE13:.*]]175; CHECK: [[PRED_STORE_IF12]]:176; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]177; CHECK-NEXT: [[TMP25:%.*]] = extractelement <2 x i32> [[TMP19]], i32 1178; CHECK-NEXT: store i32 [[TMP25]], ptr [[TMP24]], align 4, !alias.scope [[META19]], !noalias [[META12]]179; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE13]]180; CHECK: [[PRED_STORE_CONTINUE13]]:181; CHECK-NEXT: [[TMP26:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0182; CHECK-NEXT: br i1 [[TMP26]], label %[[PRED_LOAD_IF14:.*]], label %[[PRED_LOAD_CONTINUE15:.*]]183; CHECK: [[PRED_LOAD_IF14]]:184; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP4]]185; CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4, !alias.scope [[META15]], !noalias [[META17]]186; CHECK-NEXT: [[TMP29:%.*]] = insertelement <2 x i32> poison, i32 [[TMP28]], i32 0187; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE15]]188; CHECK: [[PRED_LOAD_CONTINUE15]]:189; CHECK-NEXT: [[TMP30:%.*]] = phi <2 x i32> [ poison, %[[PRED_STORE_CONTINUE13]] ], [ [[TMP29]], %[[PRED_LOAD_IF14]] ]190; CHECK-NEXT: [[TMP31:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1191; CHECK-NEXT: br i1 [[TMP31]], label %[[PRED_LOAD_IF16:.*]], label %[[PRED_LOAD_CONTINUE17:.*]]192; CHECK: [[PRED_LOAD_IF16]]:193; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP5]]194; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4, !alias.scope [[META15]], !noalias [[META17]]195; CHECK-NEXT: [[TMP34:%.*]] = insertelement <2 x i32> [[TMP30]], i32 [[TMP33]], i32 1196; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE17]]197; CHECK: [[PRED_LOAD_CONTINUE17]]:198; CHECK-NEXT: [[TMP35:%.*]] = phi <2 x i32> [ [[TMP30]], %[[PRED_LOAD_CONTINUE15]] ], [ [[TMP34]], %[[PRED_LOAD_IF16]] ]199; CHECK-NEXT: [[TMP36:%.*]] = add <2 x i32> [[TMP35]], splat (i32 10)200; CHECK-NEXT: [[TMP37:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0201; CHECK-NEXT: br i1 [[TMP37]], label %[[PRED_STORE_IF18:.*]], label %[[PRED_STORE_CONTINUE19:.*]]202; CHECK: [[PRED_STORE_IF18]]:203; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]204; CHECK-NEXT: [[TMP39:%.*]] = extractelement <2 x i32> [[TMP36]], i32 0205; CHECK-NEXT: store i32 [[TMP39]], ptr [[TMP38]], align 4, !alias.scope [[META19]], !noalias [[META12]]206; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE19]]207; CHECK: [[PRED_STORE_CONTINUE19]]:208; CHECK-NEXT: [[TMP40:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1209; CHECK-NEXT: br i1 [[TMP40]], label %[[PRED_STORE_IF20:.*]], label %[[PRED_STORE_CONTINUE21]]210; CHECK: [[PRED_STORE_IF20]]:211; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]212; CHECK-NEXT: [[TMP42:%.*]] = extractelement <2 x i32> [[TMP36]], i32 1213; CHECK-NEXT: store i32 [[TMP42]], ptr [[TMP41]], align 4, !alias.scope [[META19]], !noalias [[META12]]214; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE21]]215; CHECK: [[PRED_STORE_CONTINUE21]]:216; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2217; CHECK-NEXT: [[TMP43:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100218; CHECK-NEXT: br i1 [[TMP43]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]219; CHECK: [[MIDDLE_BLOCK]]:220; CHECK-NEXT: br [[EXIT:label %.*]]221; CHECK: [[SCALAR_PH]]:222;223entry:224 br label %loop225 226loop:227 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]228 %gep.cond = getelementptr inbounds i32, ptr %cond, i32 %iv229 %c = load i32, ptr %gep.cond, align 4230 %c.0 = icmp ule i32 %c, 11231 br i1 %c.0, label %then, label %else232 233then:234 %gep.src.then = getelementptr inbounds i32, ptr %src, i32 %iv235 %l.src.then = load i32, ptr %gep.src.then, align 4236 %add = add i32 %l.src.then, 10237 %gep.dst = getelementptr inbounds i32, ptr %dst, i32 %iv238 store i32 %add, ptr %gep.dst, align 4239 br label %loop.latch240 241else:242 %gep.src.else = getelementptr inbounds i32, ptr %src, i32 %iv243 store i32 99, ptr %gep.src.else, align 4244 %l.src.else = load i32, ptr %gep.src.else, align 4245 %sub = sub i32 %l.src.else, 5246 %gep.dst.else = getelementptr inbounds i32, ptr %dst, i32 %iv247 store i32 %sub, ptr %gep.dst.else, align 4248 br label %loop.latch249 250loop.latch:251 %iv.next = add nuw nsw i32 %iv, 1252 %ec = icmp eq i32 %iv.next, 100253 br i1 %ec, label %exit, label %loop254 255exit:256 ret void257}258 259define void @test_noalias_store_via_runtime_checks(ptr %dst, ptr %dst.1, ptr %src, ptr %cond) {260; CHECK-LABEL: define void @test_noalias_store_via_runtime_checks(261; CHECK-SAME: ptr [[DST:%.*]], ptr [[DST_1:%.*]], ptr [[SRC:%.*]], ptr [[COND:%.*]]) {262; CHECK-NEXT: [[ENTRY:.*:]]263; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]264; CHECK: [[VECTOR_MEMCHECK]]:265; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST_1]], i64 400266; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[DST]], i64 400267; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[COND]], i64 400268; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[SRC]], i64 400269; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[DST_1]], [[SCEVGEP1]]270; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP]]271; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]272; CHECK-NEXT: [[BOUND04:%.*]] = icmp ult ptr [[DST_1]], [[SCEVGEP2]]273; CHECK-NEXT: [[BOUND15:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP]]274; CHECK-NEXT: [[FOUND_CONFLICT6:%.*]] = and i1 [[BOUND04]], [[BOUND15]]275; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT6]]276; CHECK-NEXT: [[BOUND07:%.*]] = icmp ult ptr [[DST_1]], [[SCEVGEP3]]277; CHECK-NEXT: [[BOUND18:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP]]278; CHECK-NEXT: [[FOUND_CONFLICT9:%.*]] = and i1 [[BOUND07]], [[BOUND18]]279; CHECK-NEXT: [[CONFLICT_RDX10:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT9]]280; CHECK-NEXT: [[BOUND011:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP2]]281; CHECK-NEXT: [[BOUND112:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP1]]282; CHECK-NEXT: [[FOUND_CONFLICT13:%.*]] = and i1 [[BOUND011]], [[BOUND112]]283; CHECK-NEXT: [[CONFLICT_RDX14:%.*]] = or i1 [[CONFLICT_RDX10]], [[FOUND_CONFLICT13]]284; CHECK-NEXT: [[BOUND015:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP3]]285; CHECK-NEXT: [[BOUND116:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP1]]286; CHECK-NEXT: [[FOUND_CONFLICT17:%.*]] = and i1 [[BOUND015]], [[BOUND116]]287; CHECK-NEXT: [[CONFLICT_RDX18:%.*]] = or i1 [[CONFLICT_RDX14]], [[FOUND_CONFLICT17]]288; CHECK-NEXT: br i1 [[CONFLICT_RDX18]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]289; CHECK: [[VECTOR_PH]]:290; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]291; CHECK: [[VECTOR_BODY]]:292; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE28:.*]] ]293; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 0294; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 1295; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[COND]], i32 [[TMP4]]296; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP6]], align 4, !alias.scope [[META22:![0-9]+]]297; CHECK-NEXT: [[TMP7:%.*]] = icmp ule <2 x i32> [[WIDE_LOAD]], splat (i32 11)298; CHECK-NEXT: [[TMP8:%.*]] = xor <2 x i1> [[TMP7]], splat (i1 true)299; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP8]], i32 0300; CHECK-NEXT: br i1 [[TMP9]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]301; CHECK: [[PRED_STORE_IF]]:302; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[DST_1]], i32 [[TMP4]]303; CHECK-NEXT: store i32 10, ptr [[TMP10]], align 4, !alias.scope [[META25:![0-9]+]], !noalias [[META27:![0-9]+]]304; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]305; CHECK: [[PRED_STORE_CONTINUE]]:306; CHECK-NEXT: [[TMP15:%.*]] = extractelement <2 x i1> [[TMP8]], i32 1307; CHECK-NEXT: br i1 [[TMP15]], label %[[PRED_STORE_IF19:.*]], label %[[PRED_STORE_CONTINUE20:.*]]308; CHECK: [[PRED_STORE_IF19]]:309; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[DST_1]], i32 [[TMP5]]310; CHECK-NEXT: store i32 10, ptr [[TMP16]], align 4, !alias.scope [[META25]], !noalias [[META27]]311; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE20]]312; CHECK: [[PRED_STORE_CONTINUE20]]:313; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP4]]314; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP5]]315; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP12]], align 4, !alias.scope [[META30:![0-9]+]]316; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4, !alias.scope [[META30]]317; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> poison, i32 [[TMP11]], i32 0318; CHECK-NEXT: [[TMP19:%.*]] = insertelement <2 x i32> [[TMP14]], i32 [[TMP18]], i32 1319; CHECK-NEXT: [[TMP21:%.*]] = sub <2 x i32> [[TMP19]], splat (i32 5)320; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i1> [[TMP8]], i32 0321; CHECK-NEXT: br i1 [[TMP22]], label %[[PRED_STORE_IF21:.*]], label %[[PRED_STORE_CONTINUE22:.*]]322; CHECK: [[PRED_STORE_IF21]]:323; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]324; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x i32> [[TMP21]], i32 0325; CHECK-NEXT: store i32 [[TMP24]], ptr [[TMP23]], align 4, !alias.scope [[META31:![0-9]+]], !noalias [[META32:![0-9]+]]326; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE22]]327; CHECK: [[PRED_STORE_CONTINUE22]]:328; CHECK-NEXT: [[TMP25:%.*]] = extractelement <2 x i1> [[TMP8]], i32 1329; CHECK-NEXT: br i1 [[TMP25]], label %[[PRED_STORE_IF23:.*]], label %[[PRED_STORE_CONTINUE24:.*]]330; CHECK: [[PRED_STORE_IF23]]:331; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]332; CHECK-NEXT: [[TMP27:%.*]] = extractelement <2 x i32> [[TMP21]], i32 1333; CHECK-NEXT: store i32 [[TMP27]], ptr [[TMP26]], align 4, !alias.scope [[META31]], !noalias [[META32]]334; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE24]]335; CHECK: [[PRED_STORE_CONTINUE24]]:336; CHECK-NEXT: [[TMP38:%.*]] = add <2 x i32> [[TMP19]], splat (i32 10)337; CHECK-NEXT: [[TMP39:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0338; CHECK-NEXT: br i1 [[TMP39]], label %[[PRED_STORE_IF25:.*]], label %[[PRED_STORE_CONTINUE26:.*]]339; CHECK: [[PRED_STORE_IF25]]:340; CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]341; CHECK-NEXT: [[TMP41:%.*]] = extractelement <2 x i32> [[TMP38]], i32 0342; CHECK-NEXT: store i32 [[TMP41]], ptr [[TMP40]], align 4, !alias.scope [[META31]], !noalias [[META32]]343; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE26]]344; CHECK: [[PRED_STORE_CONTINUE26]]:345; CHECK-NEXT: [[TMP42:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1346; CHECK-NEXT: br i1 [[TMP42]], label %[[PRED_STORE_IF27:.*]], label %[[PRED_STORE_CONTINUE28]]347; CHECK: [[PRED_STORE_IF27]]:348; CHECK-NEXT: [[TMP43:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]349; CHECK-NEXT: [[TMP44:%.*]] = extractelement <2 x i32> [[TMP38]], i32 1350; CHECK-NEXT: store i32 [[TMP44]], ptr [[TMP43]], align 4, !alias.scope [[META31]], !noalias [[META32]]351; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE28]]352; CHECK: [[PRED_STORE_CONTINUE28]]:353; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2354; CHECK-NEXT: [[TMP45:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100355; CHECK-NEXT: br i1 [[TMP45]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP33:![0-9]+]]356; CHECK: [[MIDDLE_BLOCK]]:357; CHECK-NEXT: br [[EXIT:label %.*]]358; CHECK: [[SCALAR_PH]]:359;360entry:361 br label %loop362 363loop:364 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]365 %gep.cond = getelementptr inbounds i32, ptr %cond, i32 %iv366 %c = load i32, ptr %gep.cond, align 4367 %c.0 = icmp ule i32 %c, 11368 br i1 %c.0, label %then, label %else369 370then:371 %gep.src.then = getelementptr inbounds i32, ptr %src, i32 %iv372 %l.src.then = load i32, ptr %gep.src.then, align 4373 %add = add i32 %l.src.then, 10374 %gep.dst = getelementptr inbounds i32, ptr %dst, i32 %iv375 store i32 %add, ptr %gep.dst, align 4376 br label %loop.latch377 378else:379 %gep.dst.1.else = getelementptr inbounds i32, ptr %dst.1, i32 %iv380 store i32 10, ptr %gep.dst.1.else, align 4381 %gep.src.else = getelementptr inbounds i32, ptr %src, i32 %iv382 %l.src.else = load i32, ptr %gep.src.else, align 4383 %sub = sub i32 %l.src.else, 5384 %gep.dst.else = getelementptr inbounds i32, ptr %dst, i32 %iv385 store i32 %sub, ptr %gep.dst.else, align 4386 br label %loop.latch387 388loop.latch:389 %iv.next = add nuw nsw i32 %iv, 1390 %ec = icmp eq i32 %iv.next, 100391 br i1 %ec, label %exit, label %loop392 393exit:394 ret void395}396 397define void @test_memory_op_between_loads_alias(ptr %dst, ptr %src, ptr %cond, ptr %dst.1) {398; CHECK-LABEL: define void @test_memory_op_between_loads_alias(399; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], ptr [[COND:%.*]], ptr [[DST_1:%.*]]) {400; CHECK-NEXT: [[ENTRY:.*:]]401; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]402; CHECK: [[VECTOR_MEMCHECK]]:403; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[SRC]], i64 400404; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[DST]], i64 400405; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[COND]], i64 400406; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP1]]407; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP]]408; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]409; CHECK-NEXT: [[BOUND03:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP2]]410; CHECK-NEXT: [[BOUND14:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP]]411; CHECK-NEXT: [[FOUND_CONFLICT5:%.*]] = and i1 [[BOUND03]], [[BOUND14]]412; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT5]]413; CHECK-NEXT: [[BOUND06:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP2]]414; CHECK-NEXT: [[BOUND17:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP1]]415; CHECK-NEXT: [[FOUND_CONFLICT8:%.*]] = and i1 [[BOUND06]], [[BOUND17]]416; CHECK-NEXT: [[CONFLICT_RDX9:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT8]]417; CHECK-NEXT: br i1 [[CONFLICT_RDX9]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]418; CHECK: [[VECTOR_PH]]:419; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]420; CHECK: [[VECTOR_BODY]]:421; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE17:.*]] ]422; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 0423; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 1424; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[COND]], i32 [[TMP4]]425; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP6]], align 4, !alias.scope [[META35:![0-9]+]]426; CHECK-NEXT: [[TMP7:%.*]] = icmp ule <2 x i32> [[WIDE_LOAD]], splat (i32 11)427; CHECK-NEXT: [[TMP8:%.*]] = xor <2 x i1> [[TMP7]], splat (i1 true)428; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP8]], i32 0429; CHECK-NEXT: br i1 [[TMP9]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]430; CHECK: [[PRED_LOAD_IF]]:431; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP4]]432; CHECK-NEXT: store i32 0, ptr [[TMP10]], align 4, !alias.scope [[META38:![0-9]+]], !noalias [[META40:![0-9]+]]433; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4, !alias.scope [[META38]], !noalias [[META40]]434; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i32> poison, i32 [[TMP11]], i32 0435; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]436; CHECK: [[PRED_LOAD_CONTINUE]]:437; CHECK-NEXT: [[TMP13:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP12]], %[[PRED_LOAD_IF]] ]438; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x i1> [[TMP8]], i32 1439; CHECK-NEXT: br i1 [[TMP14]], label %[[PRED_LOAD_IF10:.*]], label %[[PRED_LOAD_CONTINUE11:.*]]440; CHECK: [[PRED_LOAD_IF10]]:441; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP5]]442; CHECK-NEXT: store i32 0, ptr [[TMP15]], align 4, !alias.scope [[META38]], !noalias [[META40]]443; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4, !alias.scope [[META38]], !noalias [[META40]]444; CHECK-NEXT: [[TMP17:%.*]] = insertelement <2 x i32> [[TMP13]], i32 [[TMP16]], i32 1445; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE11]]446; CHECK: [[PRED_LOAD_CONTINUE11]]:447; CHECK-NEXT: [[TMP18:%.*]] = phi <2 x i32> [ [[TMP13]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], %[[PRED_LOAD_IF10]] ]448; CHECK-NEXT: [[TMP19:%.*]] = add <2 x i32> [[TMP18]], splat (i32 10)449; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x i1> [[TMP8]], i32 0450; CHECK-NEXT: br i1 [[TMP20]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]451; CHECK: [[PRED_STORE_IF]]:452; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]453; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i32> [[TMP19]], i32 0454; CHECK-NEXT: store i32 [[TMP22]], ptr [[TMP21]], align 4, !alias.scope [[META42:![0-9]+]], !noalias [[META35]]455; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]456; CHECK: [[PRED_STORE_CONTINUE]]:457; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x i1> [[TMP8]], i32 1458; CHECK-NEXT: br i1 [[TMP23]], label %[[PRED_STORE_IF12:.*]], label %[[PRED_STORE_CONTINUE13:.*]]459; CHECK: [[PRED_STORE_IF12]]:460; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]461; CHECK-NEXT: [[TMP25:%.*]] = extractelement <2 x i32> [[TMP19]], i32 1462; CHECK-NEXT: store i32 [[TMP25]], ptr [[TMP24]], align 4, !alias.scope [[META42]], !noalias [[META35]]463; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE13]]464; CHECK: [[PRED_STORE_CONTINUE13]]:465; CHECK-NEXT: [[TMP26:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0466; CHECK-NEXT: br i1 [[TMP26]], label %[[PRED_STORE_IF14:.*]], label %[[PRED_STORE_CONTINUE15:.*]]467; CHECK: [[PRED_STORE_IF14]]:468; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP4]]469; CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP27]], align 4, !alias.scope [[META38]], !noalias [[META40]]470; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]471; CHECK-NEXT: store i32 [[TMP32]], ptr [[TMP29]], align 4, !alias.scope [[META42]], !noalias [[META35]]472; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE15]]473; CHECK: [[PRED_STORE_CONTINUE15]]:474; CHECK-NEXT: [[TMP30:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1475; CHECK-NEXT: br i1 [[TMP30]], label %[[PRED_STORE_IF16:.*]], label %[[PRED_STORE_CONTINUE17]]476; CHECK: [[PRED_STORE_IF16]]:477; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP5]]478; CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP31]], align 4, !alias.scope [[META38]], !noalias [[META40]]479; CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]480; CHECK-NEXT: store i32 [[TMP28]], ptr [[TMP33]], align 4, !alias.scope [[META42]], !noalias [[META35]]481; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE17]]482; CHECK: [[PRED_STORE_CONTINUE17]]:483; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2484; CHECK-NEXT: [[TMP34:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100485; CHECK-NEXT: br i1 [[TMP34]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP43:![0-9]+]]486; CHECK: [[MIDDLE_BLOCK]]:487; CHECK-NEXT: br [[EXIT:label %.*]]488; CHECK: [[SCALAR_PH]]:489;490entry:491 br label %loop492 493loop:494 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]495 %gep.cond = getelementptr inbounds i32, ptr %cond, i32 %iv496 %c = load i32, ptr %gep.cond, align 4497 %c.0 = icmp ule i32 %c, 11498 br i1 %c.0, label %then, label %middle499 500middle:501 %gep.src.middle = getelementptr inbounds i32, ptr %src, i32 %iv502 store i32 0, ptr %gep.src.middle, align 4503 br label %else504 505then:506 %gep.src.then = getelementptr inbounds i32, ptr %src, i32 %iv507 %l.src.then = load i32, ptr %gep.src.then, align 4508 %gep.dst.then = getelementptr inbounds i32, ptr %dst, i32 %iv509 store i32 %l.src.then, ptr %gep.dst.then, align 4510 br label %loop.latch511 512else:513 %gep.src.else = getelementptr inbounds i32, ptr %src, i32 %iv514 %l.src.else = load i32, ptr %gep.src.else, align 4515 %add = add i32 %l.src.else, 10516 %gep.dst.else = getelementptr inbounds i32, ptr %dst, i32 %iv517 store i32 %add, ptr %gep.dst.else, align 4518 br label %loop.latch519 520loop.latch:521 %iv.next = add nuw nsw i32 %iv, 1522 %ec = icmp eq i32 %iv.next, 100523 br i1 %ec, label %exit, label %loop524 525exit:526 ret void527}528 529define void @test_memory_op_between_loads_no_alias_via_rt_checks(ptr %dst, ptr %src, ptr %cond, ptr %dst.1) {530; CHECK-LABEL: define void @test_memory_op_between_loads_no_alias_via_rt_checks(531; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], ptr [[COND:%.*]], ptr [[DST_1:%.*]]) {532; CHECK-NEXT: [[ENTRY:.*:]]533; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]534; CHECK: [[VECTOR_MEMCHECK]]:535; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST_1]], i64 400536; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[DST]], i64 400537; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[COND]], i64 400538; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[SRC]], i64 400539; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[DST_1]], [[SCEVGEP1]]540; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP]]541; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]542; CHECK-NEXT: [[BOUND04:%.*]] = icmp ult ptr [[DST_1]], [[SCEVGEP2]]543; CHECK-NEXT: [[BOUND15:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP]]544; CHECK-NEXT: [[FOUND_CONFLICT6:%.*]] = and i1 [[BOUND04]], [[BOUND15]]545; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT6]]546; CHECK-NEXT: [[BOUND07:%.*]] = icmp ult ptr [[DST_1]], [[SCEVGEP3]]547; CHECK-NEXT: [[BOUND18:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP]]548; CHECK-NEXT: [[FOUND_CONFLICT9:%.*]] = and i1 [[BOUND07]], [[BOUND18]]549; CHECK-NEXT: [[CONFLICT_RDX10:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT9]]550; CHECK-NEXT: [[BOUND011:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP2]]551; CHECK-NEXT: [[BOUND112:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP1]]552; CHECK-NEXT: [[FOUND_CONFLICT13:%.*]] = and i1 [[BOUND011]], [[BOUND112]]553; CHECK-NEXT: [[CONFLICT_RDX14:%.*]] = or i1 [[CONFLICT_RDX10]], [[FOUND_CONFLICT13]]554; CHECK-NEXT: [[BOUND015:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP3]]555; CHECK-NEXT: [[BOUND116:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP1]]556; CHECK-NEXT: [[FOUND_CONFLICT17:%.*]] = and i1 [[BOUND015]], [[BOUND116]]557; CHECK-NEXT: [[CONFLICT_RDX18:%.*]] = or i1 [[CONFLICT_RDX14]], [[FOUND_CONFLICT17]]558; CHECK-NEXT: br i1 [[CONFLICT_RDX18]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]559; CHECK: [[VECTOR_PH]]:560; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]561; CHECK: [[VECTOR_BODY]]:562; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE28:.*]] ]563; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 0564; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 1565; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[COND]], i32 [[TMP4]]566; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP6]], align 4, !alias.scope [[META45:![0-9]+]]567; CHECK-NEXT: [[TMP7:%.*]] = icmp ule <2 x i32> [[WIDE_LOAD]], splat (i32 11)568; CHECK-NEXT: [[TMP8:%.*]] = xor <2 x i1> [[TMP7]], splat (i1 true)569; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP8]], i32 0570; CHECK-NEXT: br i1 [[TMP9]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]571; CHECK: [[PRED_STORE_IF]]:572; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[DST_1]], i32 [[TMP4]]573; CHECK-NEXT: store i32 0, ptr [[TMP10]], align 4, !alias.scope [[META48:![0-9]+]], !noalias [[META50:![0-9]+]]574; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]575; CHECK: [[PRED_STORE_CONTINUE]]:576; CHECK-NEXT: [[TMP15:%.*]] = extractelement <2 x i1> [[TMP8]], i32 1577; CHECK-NEXT: br i1 [[TMP15]], label %[[PRED_STORE_IF19:.*]], label %[[PRED_STORE_CONTINUE20:.*]]578; CHECK: [[PRED_STORE_IF19]]:579; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[DST_1]], i32 [[TMP5]]580; CHECK-NEXT: store i32 0, ptr [[TMP16]], align 4, !alias.scope [[META48]], !noalias [[META50]]581; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE20]]582; CHECK: [[PRED_STORE_CONTINUE20]]:583; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP4]]584; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP5]]585; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP12]], align 4, !alias.scope [[META53:![0-9]+]]586; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4, !alias.scope [[META53]]587; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> poison, i32 [[TMP11]], i32 0588; CHECK-NEXT: [[TMP19:%.*]] = insertelement <2 x i32> [[TMP14]], i32 [[TMP18]], i32 1589; CHECK-NEXT: [[TMP21:%.*]] = add <2 x i32> [[TMP19]], splat (i32 10)590; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i1> [[TMP8]], i32 0591; CHECK-NEXT: br i1 [[TMP22]], label %[[PRED_STORE_IF21:.*]], label %[[PRED_STORE_CONTINUE22:.*]]592; CHECK: [[PRED_STORE_IF21]]:593; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]594; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x i32> [[TMP21]], i32 0595; CHECK-NEXT: store i32 [[TMP24]], ptr [[TMP23]], align 4, !alias.scope [[META54:![0-9]+]], !noalias [[META55:![0-9]+]]596; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE22]]597; CHECK: [[PRED_STORE_CONTINUE22]]:598; CHECK-NEXT: [[TMP25:%.*]] = extractelement <2 x i1> [[TMP8]], i32 1599; CHECK-NEXT: br i1 [[TMP25]], label %[[PRED_STORE_IF23:.*]], label %[[PRED_STORE_CONTINUE24:.*]]600; CHECK: [[PRED_STORE_IF23]]:601; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]602; CHECK-NEXT: [[TMP27:%.*]] = extractelement <2 x i32> [[TMP21]], i32 1603; CHECK-NEXT: store i32 [[TMP27]], ptr [[TMP26]], align 4, !alias.scope [[META54]], !noalias [[META55]]604; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE24]]605; CHECK: [[PRED_STORE_CONTINUE24]]:606; CHECK-NEXT: [[TMP28:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0607; CHECK-NEXT: br i1 [[TMP28]], label %[[PRED_STORE_IF25:.*]], label %[[PRED_STORE_CONTINUE26:.*]]608; CHECK: [[PRED_STORE_IF25]]:609; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]610; CHECK-NEXT: store i32 [[TMP11]], ptr [[TMP31]], align 4, !alias.scope [[META54]], !noalias [[META55]]611; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE26]]612; CHECK: [[PRED_STORE_CONTINUE26]]:613; CHECK-NEXT: [[TMP32:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1614; CHECK-NEXT: br i1 [[TMP32]], label %[[PRED_STORE_IF27:.*]], label %[[PRED_STORE_CONTINUE28]]615; CHECK: [[PRED_STORE_IF27]]:616; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]617; CHECK-NEXT: store i32 [[TMP18]], ptr [[TMP35]], align 4, !alias.scope [[META54]], !noalias [[META55]]618; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE28]]619; CHECK: [[PRED_STORE_CONTINUE28]]:620; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2621; CHECK-NEXT: [[TMP36:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100622; CHECK-NEXT: br i1 [[TMP36]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP56:![0-9]+]]623; CHECK: [[MIDDLE_BLOCK]]:624; CHECK-NEXT: br [[EXIT:label %.*]]625; CHECK: [[SCALAR_PH]]:626;627entry:628 br label %loop629 630loop:631 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]632 %gep.cond = getelementptr inbounds i32, ptr %cond, i32 %iv633 %c = load i32, ptr %gep.cond, align 4634 %c.0 = icmp ule i32 %c, 11635 br i1 %c.0, label %then, label %middle636 637middle:638 %gep.dst.1 = getelementptr inbounds i32, ptr %dst.1, i32 %iv639 store i32 0, ptr %gep.dst.1, align 4640 br label %else641 642then:643 %gep.src.then = getelementptr inbounds i32, ptr %src, i32 %iv644 %l.src.then = load i32, ptr %gep.src.then, align 4645 %gep.dst.then = getelementptr inbounds i32, ptr %dst, i32 %iv646 store i32 %l.src.then, ptr %gep.dst.then, align 4647 br label %loop.latch648 649else:650 %gep.src.else = getelementptr inbounds i32, ptr %src, i32 %iv651 %l.src.else = load i32, ptr %gep.src.else, align 4652 %add = add i32 %l.src.else, 10653 %gep.dst.else = getelementptr inbounds i32, ptr %dst, i32 %iv654 store i32 %add, ptr %gep.dst.else, align 4655 br label %loop.latch656 657loop.latch:658 %iv.next = add nuw nsw i32 %iv, 1659 %ec = icmp eq i32 %iv.next, 100660 br i1 %ec, label %exit, label %loop661 662exit:663 ret void664}665 666; Test that stores are NOT sunk when there's an aliasing load between them667; without scoped noalias metadata.668define void @test_stores_not_sunk_due_to_aliasing_load(ptr %dst, ptr %alias, ptr %cond) {669; CHECK-LABEL: define void @test_stores_not_sunk_due_to_aliasing_load(670; CHECK-SAME: ptr [[DST:%.*]], ptr [[ALIAS:%.*]], ptr [[COND:%.*]]) {671; CHECK-NEXT: [[ENTRY:.*:]]672; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]673; CHECK: [[VECTOR_MEMCHECK]]:674; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 400675; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[COND]], i64 400676; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[ALIAS]], i64 400677; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP1]]678; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP]]679; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]680; CHECK-NEXT: [[BOUND03:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP2]]681; CHECK-NEXT: [[BOUND14:%.*]] = icmp ult ptr [[ALIAS]], [[SCEVGEP]]682; CHECK-NEXT: [[FOUND_CONFLICT5:%.*]] = and i1 [[BOUND03]], [[BOUND14]]683; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT5]]684; CHECK-NEXT: br i1 [[CONFLICT_RDX]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]685; CHECK: [[VECTOR_PH]]:686; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]687; CHECK: [[VECTOR_BODY]]:688; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE11:.*]] ]689; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 0690; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 1691; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[COND]], i32 [[TMP4]]692; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP6]], align 4, !alias.scope [[META58:![0-9]+]]693; CHECK-NEXT: [[TMP10:%.*]] = icmp ule <2 x i32> [[WIDE_LOAD]], splat (i32 11)694; CHECK-NEXT: [[TMP7:%.*]] = xor <2 x i1> [[TMP10]], splat (i1 true)695; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0696; CHECK-NEXT: br i1 [[TMP8]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]697; CHECK: [[PRED_STORE_IF]]:698; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[ALIAS]], i32 [[TMP4]]699; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP9]], align 4, !alias.scope [[META61:![0-9]+]]700; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]701; CHECK-NEXT: store i32 [[TMP15]], ptr [[TMP12]], align 4, !alias.scope [[META63:![0-9]+]], !noalias [[META65:![0-9]+]]702; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]703; CHECK: [[PRED_STORE_CONTINUE]]:704; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1705; CHECK-NEXT: br i1 [[TMP13]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7:.*]]706; CHECK: [[PRED_STORE_IF6]]:707; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[ALIAS]], i32 [[TMP5]]708; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP14]], align 4, !alias.scope [[META61]]709; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]710; CHECK-NEXT: store i32 [[TMP11]], ptr [[TMP16]], align 4, !alias.scope [[META63]], !noalias [[META65]]711; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE7]]712; CHECK: [[PRED_STORE_CONTINUE7]]:713; CHECK-NEXT: [[TMP17:%.*]] = extractelement <2 x i1> [[TMP10]], i32 0714; CHECK-NEXT: br i1 [[TMP17]], label %[[PRED_STORE_IF8:.*]], label %[[PRED_STORE_CONTINUE9:.*]]715; CHECK: [[PRED_STORE_IF8]]:716; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP4]]717; CHECK-NEXT: store i32 10, ptr [[TMP18]], align 4, !alias.scope [[META63]], !noalias [[META65]]718; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE9]]719; CHECK: [[PRED_STORE_CONTINUE9]]:720; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x i1> [[TMP10]], i32 1721; CHECK-NEXT: br i1 [[TMP20]], label %[[PRED_STORE_IF10:.*]], label %[[PRED_STORE_CONTINUE11]]722; CHECK: [[PRED_STORE_IF10]]:723; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP5]]724; CHECK-NEXT: store i32 10, ptr [[TMP19]], align 4, !alias.scope [[META63]], !noalias [[META65]]725; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE11]]726; CHECK: [[PRED_STORE_CONTINUE11]]:727; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2728; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100729; CHECK-NEXT: br i1 [[TMP21]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP66:![0-9]+]]730; CHECK: [[MIDDLE_BLOCK]]:731; CHECK-NEXT: br [[EXIT:label %.*]]732; CHECK: [[SCALAR_PH]]:733;734entry:735 br label %loop736 737loop:738 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]739 %gep.cond = getelementptr inbounds i32, ptr %cond, i32 %iv740 %c = load i32, ptr %gep.cond, align 4741 %c.0 = icmp ule i32 %c, 11742 br i1 %c.0, label %then, label %else743 744then:745 %gep.dst.then = getelementptr inbounds i32, ptr %dst, i32 %iv746 store i32 10, ptr %gep.dst.then, align 4747 br label %loop.latch748 749else:750 ; This aliasing load prevents store sinking751 %gep.alias = getelementptr inbounds i32, ptr %alias, i32 %iv752 %v = load i32, ptr %gep.alias, align 4753 %gep.dst.else = getelementptr inbounds i32, ptr %dst, i32 %iv754 store i32 %v, ptr %gep.dst.else, align 4755 br label %loop.latch756 757loop.latch:758 %iv.next = add nuw nsw i32 %iv, 1759 %ec = icmp eq i32 %iv.next, 100760 br i1 %ec, label %exit, label %loop761 762exit:763 ret void764}765 766define void @test_stores_not_sunk_aliasing_load_between(ptr %dst, ptr %mid, ptr %cond) {767; CHECK-LABEL: define void @test_stores_not_sunk_aliasing_load_between(768; CHECK-SAME: ptr [[DST:%.*]], ptr [[MID:%.*]], ptr [[COND:%.*]]) {769; CHECK-NEXT: [[ENTRY:.*:]]770; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]771; CHECK: [[VECTOR_MEMCHECK]]:772; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 400773; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[MID]], i64 400774; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[COND]], i64 400775; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP1]]776; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[MID]], [[SCEVGEP]]777; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]778; CHECK-NEXT: [[BOUND03:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP2]]779; CHECK-NEXT: [[BOUND14:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP]]780; CHECK-NEXT: [[FOUND_CONFLICT5:%.*]] = and i1 [[BOUND03]], [[BOUND14]]781; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT5]]782; CHECK-NEXT: [[BOUND06:%.*]] = icmp ult ptr [[MID]], [[SCEVGEP2]]783; CHECK-NEXT: [[BOUND17:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP1]]784; CHECK-NEXT: [[FOUND_CONFLICT8:%.*]] = and i1 [[BOUND06]], [[BOUND17]]785; CHECK-NEXT: [[CONFLICT_RDX9:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT8]]786; CHECK-NEXT: br i1 [[CONFLICT_RDX9]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]787; CHECK: [[VECTOR_PH]]:788; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]789; CHECK: [[VECTOR_BODY]]:790; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE15:.*]] ]791; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0792; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 1793; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[COND]], i32 [[TMP0]]794; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4, !alias.scope [[META68:![0-9]+]]795; CHECK-NEXT: [[TMP3:%.*]] = icmp ule <2 x i32> [[WIDE_LOAD]], splat (i32 11)796; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i1> [[TMP3]], splat (i1 true)797; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i32 0798; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]799; CHECK: [[PRED_STORE_IF]]:800; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP0]]801; CHECK-NEXT: store i32 20, ptr [[TMP6]], align 4, !alias.scope [[META71:![0-9]+]], !noalias [[META73:![0-9]+]]802; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4, !alias.scope [[META71]], !noalias [[META73]]803; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[MID]], i32 [[TMP0]]804; CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP8]], align 4, !alias.scope [[META75:![0-9]+]], !noalias [[META68]]805; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]806; CHECK: [[PRED_STORE_CONTINUE]]:807; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP4]], i32 1808; CHECK-NEXT: br i1 [[TMP9]], label %[[PRED_STORE_IF10:.*]], label %[[PRED_STORE_CONTINUE11:.*]]809; CHECK: [[PRED_STORE_IF10]]:810; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP1]]811; CHECK-NEXT: store i32 20, ptr [[TMP10]], align 4, !alias.scope [[META71]], !noalias [[META73]]812; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4, !alias.scope [[META71]], !noalias [[META73]]813; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[MID]], i32 [[TMP1]]814; CHECK-NEXT: store i32 [[TMP11]], ptr [[TMP12]], align 4, !alias.scope [[META75]], !noalias [[META68]]815; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE11]]816; CHECK: [[PRED_STORE_CONTINUE11]]:817; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP3]], i32 0818; CHECK-NEXT: br i1 [[TMP13]], label %[[PRED_STORE_IF12:.*]], label %[[PRED_STORE_CONTINUE13:.*]]819; CHECK: [[PRED_STORE_IF12]]:820; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP0]]821; CHECK-NEXT: store i32 10, ptr [[TMP14]], align 4, !alias.scope [[META71]], !noalias [[META73]]822; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE13]]823; CHECK: [[PRED_STORE_CONTINUE13]]:824; CHECK-NEXT: [[TMP15:%.*]] = extractelement <2 x i1> [[TMP3]], i32 1825; CHECK-NEXT: br i1 [[TMP15]], label %[[PRED_STORE_IF14:.*]], label %[[PRED_STORE_CONTINUE15]]826; CHECK: [[PRED_STORE_IF14]]:827; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP1]]828; CHECK-NEXT: store i32 10, ptr [[TMP16]], align 4, !alias.scope [[META71]], !noalias [[META73]]829; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE15]]830; CHECK: [[PRED_STORE_CONTINUE15]]:831; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2832; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100833; CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP76:![0-9]+]]834; CHECK: [[MIDDLE_BLOCK]]:835; CHECK-NEXT: br [[EXIT:label %.*]]836; CHECK: [[SCALAR_PH]]:837;838entry:839 br label %loop840 841loop:842 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]843 %gep.cond = getelementptr inbounds i32, ptr %cond, i32 %iv844 %c = load i32, ptr %gep.cond, align 4845 %c.0 = icmp ule i32 %c, 11846 br i1 %c.0, label %then, label %else847 848then:849 %gep.dst.then = getelementptr inbounds i32, ptr %dst, i32 %iv850 store i32 10, ptr %gep.dst.then, align 4851 br label %loop.latch852 853else:854 %gep.dst.else = getelementptr inbounds i32, ptr %dst, i32 %iv855 store i32 20, ptr %gep.dst.else, align 4856 %gep.mid = getelementptr inbounds i32, ptr %mid, i32 %iv857 %l = load i32, ptr %gep.dst.else858 store i32 %l, ptr %gep.mid, align 4859 br label %loop.latch860 861loop.latch:862 %iv.next = add nuw nsw i32 %iv, 1863 %ec = icmp eq i32 %iv.next, 100864 br i1 %ec, label %exit, label %loop865 866exit:867 ret void868}869 870define void @sink_multiple_store_groups_noalias_via_scev(ptr %dst, ptr %src) {871; CHECK-LABEL: define void @sink_multiple_store_groups_noalias_via_scev(872; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]]) {873; CHECK-NEXT: [[ENTRY:.*:]]874; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]875; CHECK: [[VECTOR_MEMCHECK]]:876; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 12688877; CHECK-NEXT: [[SCEVGEP8:%.*]] = getelementptr i8, ptr [[SRC]], i64 12828878; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP8]]879; CHECK-NEXT: [[BOUND2:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP]]880; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND1]], [[BOUND2]]881; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]882; CHECK: [[VECTOR_PH]]:883; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]884; CHECK: [[VECTOR_BODY]]:885; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE9:.*]] ]886; CHECK-NEXT: [[INDEX:%.*]] = mul i64 [[INDEX1]], 16887; CHECK-NEXT: [[IV:%.*]] = add i64 [[INDEX]], 0888; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[INDEX]], 16889; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr double, ptr [[SRC]], i64 [[IV]]890; CHECK-NEXT: [[TMP22:%.*]] = getelementptr double, ptr [[SRC]], i64 [[TMP17]]891; CHECK-NEXT: [[TMP23:%.*]] = insertelement <2 x ptr> poison, ptr [[GEP_SRC]], i32 0892; CHECK-NEXT: [[TMP24:%.*]] = insertelement <2 x ptr> [[TMP23]], ptr [[TMP22]], i32 1893; CHECK-NEXT: [[GEP_FLAG:%.*]] = getelementptr i8, ptr [[GEP_SRC]], i64 152894; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP22]], i64 152895; CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[GEP_FLAG]], align 4, !alias.scope [[META78:![0-9]+]]896; CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP26]], align 4, !alias.scope [[META78]]897; CHECK-NEXT: [[TMP29:%.*]] = insertelement <2 x i32> poison, i32 [[TMP27]], i32 0898; CHECK-NEXT: [[TMP30:%.*]] = insertelement <2 x i32> [[TMP29]], i32 [[TMP28]], i32 1899; CHECK-NEXT: [[TMP31:%.*]] = icmp eq <2 x i32> [[TMP30]], zeroinitializer900; CHECK-NEXT: [[TMP13:%.*]] = load double, ptr [[GEP_SRC]], align 8, !alias.scope [[META78]]901; CHECK-NEXT: [[TMP14:%.*]] = load double, ptr [[TMP22]], align 8, !alias.scope [[META78]]902; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x double> poison, double [[TMP13]], i32 0903; CHECK-NEXT: [[WIDE_LOAD:%.*]] = insertelement <2 x double> [[TMP15]], double [[TMP14]], i32 1904; CHECK-NEXT: [[TMP33:%.*]] = xor <2 x i1> [[TMP31]], splat (i1 true)905; CHECK-NEXT: [[TMP34:%.*]] = fadd <2 x double> [[WIDE_LOAD]], splat (double 8.000000e+00)906; CHECK-NEXT: [[GEP_DST1_ELSE:%.*]] = getelementptr double, ptr [[DST]], i64 [[IV]]907; CHECK-NEXT: [[TMP37:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP17]]908; CHECK-NEXT: [[TMP38:%.*]] = insertelement <2 x ptr> poison, ptr [[GEP_DST1_ELSE]], i32 0909; CHECK-NEXT: [[TMP39:%.*]] = insertelement <2 x ptr> [[TMP38]], ptr [[TMP37]], i32 1910; CHECK-NEXT: [[TMP40:%.*]] = extractelement <2 x i1> [[TMP33]], i32 0911; CHECK-NEXT: br i1 [[TMP40]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]912; CHECK: [[PRED_LOAD_IF]]:913; CHECK-NEXT: [[TMP41:%.*]] = extractelement <2 x double> [[TMP34]], i32 0914; CHECK-NEXT: store double [[TMP41]], ptr [[GEP_DST1_ELSE]], align 8, !alias.scope [[META81:![0-9]+]], !noalias [[META78]]915; CHECK-NEXT: [[GEP_SRC_16:%.*]] = getelementptr i8, ptr [[GEP_SRC]], i64 16916; CHECK-NEXT: [[TMP43:%.*]] = load double, ptr [[GEP_SRC_16]], align 8, !alias.scope [[META78]]917; CHECK-NEXT: [[TMP44:%.*]] = insertelement <2 x double> poison, double [[TMP43]], i32 0918; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]919; CHECK: [[PRED_LOAD_CONTINUE]]:920; CHECK-NEXT: [[TMP45:%.*]] = phi <2 x double> [ poison, %[[VECTOR_BODY]] ], [ [[TMP44]], %[[PRED_LOAD_IF]] ]921; CHECK-NEXT: [[TMP46:%.*]] = extractelement <2 x i1> [[TMP33]], i32 1922; CHECK-NEXT: br i1 [[TMP46]], label %[[PRED_LOAD_IF2:.*]], label %[[PRED_LOAD_CONTINUE3:.*]]923; CHECK: [[PRED_LOAD_IF2]]:924; CHECK-NEXT: [[TMP47:%.*]] = extractelement <2 x double> [[TMP34]], i32 1925; CHECK-NEXT: store double [[TMP47]], ptr [[TMP37]], align 8, !alias.scope [[META81]], !noalias [[META78]]926; CHECK-NEXT: [[TMP48:%.*]] = getelementptr i8, ptr [[TMP22]], i64 16927; CHECK-NEXT: [[TMP49:%.*]] = load double, ptr [[TMP48]], align 8, !alias.scope [[META78]]928; CHECK-NEXT: [[TMP50:%.*]] = insertelement <2 x double> [[TMP45]], double [[TMP49]], i32 1929; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE3]]930; CHECK: [[PRED_LOAD_CONTINUE3]]:931; CHECK-NEXT: [[TMP51:%.*]] = phi <2 x double> [ [[TMP45]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP50]], %[[PRED_LOAD_IF2]] ]932; CHECK-NEXT: [[TMP53:%.*]] = fmul <2 x double> splat (double 2.000000e+01), [[TMP51]]933; CHECK-NEXT: [[TMP54:%.*]] = extractelement <2 x i1> [[TMP33]], i32 0934; CHECK-NEXT: br i1 [[TMP54]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]935; CHECK: [[PRED_STORE_IF]]:936; CHECK-NEXT: [[GEP_DST2_ELSE:%.*]] = getelementptr i8, ptr [[GEP_DST1_ELSE]], i64 8937; CHECK-NEXT: [[TMP56:%.*]] = extractelement <2 x double> [[TMP53]], i32 0938; CHECK-NEXT: store double [[TMP56]], ptr [[GEP_DST2_ELSE]], align 8, !alias.scope [[META81]], !noalias [[META78]]939; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]940; CHECK: [[PRED_STORE_CONTINUE]]:941; CHECK-NEXT: [[TMP57:%.*]] = extractelement <2 x i1> [[TMP33]], i32 1942; CHECK-NEXT: br i1 [[TMP57]], label %[[PRED_STORE_IF4:.*]], label %[[PRED_STORE_CONTINUE5:.*]]943; CHECK: [[PRED_STORE_IF4]]:944; CHECK-NEXT: [[TMP58:%.*]] = getelementptr i8, ptr [[TMP37]], i64 8945; CHECK-NEXT: [[TMP59:%.*]] = extractelement <2 x double> [[TMP53]], i32 1946; CHECK-NEXT: store double [[TMP59]], ptr [[TMP58]], align 8, !alias.scope [[META81]], !noalias [[META78]]947; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE5]]948; CHECK: [[PRED_STORE_CONTINUE5]]:949; CHECK-NEXT: [[TMP60:%.*]] = extractelement <2 x i1> [[TMP31]], i32 0950; CHECK-NEXT: br i1 [[TMP60]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7:.*]]951; CHECK: [[PRED_STORE_IF6]]:952; CHECK-NEXT: [[TMP62:%.*]] = getelementptr double, ptr [[DST]], i64 [[IV]]953; CHECK-NEXT: store double [[TMP13]], ptr [[TMP62]], align 8, !alias.scope [[META81]], !noalias [[META78]]954; CHECK-NEXT: [[TMP64:%.*]] = getelementptr i8, ptr [[TMP62]], i64 8955; CHECK-NEXT: store double 1.000000e+01, ptr [[TMP64]], align 8, !alias.scope [[META81]], !noalias [[META78]]956; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE7]]957; CHECK: [[PRED_STORE_CONTINUE7]]:958; CHECK-NEXT: [[TMP66:%.*]] = extractelement <2 x i1> [[TMP31]], i32 1959; CHECK-NEXT: br i1 [[TMP66]], label %[[PRED_STORE_IF8:.*]], label %[[PRED_STORE_CONTINUE9]]960; CHECK: [[PRED_STORE_IF8]]:961; CHECK-NEXT: [[TMP68:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP17]]962; CHECK-NEXT: store double [[TMP14]], ptr [[TMP68]], align 8, !alias.scope [[META81]], !noalias [[META78]]963; CHECK-NEXT: [[TMP70:%.*]] = getelementptr i8, ptr [[TMP68]], i64 8964; CHECK-NEXT: store double 1.000000e+01, ptr [[TMP70]], align 8, !alias.scope [[META81]], !noalias [[META78]]965; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE9]]966; CHECK: [[PRED_STORE_CONTINUE9]]:967; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX1]], 2968; CHECK-NEXT: [[TMP52:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100969; CHECK-NEXT: br i1 [[TMP52]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP83:![0-9]+]]970; CHECK: [[MIDDLE_BLOCK]]:971; CHECK-NEXT: br [[EXIT:label %.*]]972; CHECK: [[SCALAR_PH]]:973;974entry:975 br label %loop976 977loop:978 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]979 %gep.src = getelementptr double, ptr %src, i64 %iv980 %gep.flag = getelementptr i8, ptr %gep.src, i64 152981 %c = load i32, ptr %gep.flag, align 4982 %cmp = icmp eq i32 %c, 0983 %v.1 = load double, ptr %gep.src, align 8984 br i1 %cmp, label %then, label %else985 986then:987 %gep.dst1.then = getelementptr double, ptr %dst, i64 %iv988 store double %v.1, ptr %gep.dst1.then, align 8989 %gep.dst2.then = getelementptr i8, ptr %gep.dst1.then, i64 8990 store double 10.0, ptr %gep.dst2.then, align 8991 br label %loop.latch992 993else:994 %r.1 = fadd double %v.1, 8.0995 %gep.dst1.else = getelementptr double, ptr %dst, i64 %iv996 store double %r.1, ptr %gep.dst1.else, align 8997 %gep.src.16 = getelementptr i8, ptr %gep.src, i64 16998 %v.3 = load double, ptr %gep.src.16, align 8999 %r.2 = fmul double 20.0, %v.31000 %gep.dst2.else = getelementptr i8, ptr %gep.dst1.else, i64 81001 store double %r.2, ptr %gep.dst2.else, align 81002 br label %loop.latch1003 1004loop.latch:1005 %iv.next = add i64 %iv, 161006 %exit.cond = icmp eq i64 %iv.next, 16001007 br i1 %exit.cond, label %exit, label %loop1008 1009exit:1010 ret void1011}1012 1013define void @multiple_store_groups_alias(ptr %dst, ptr %src) {1014; CHECK-LABEL: define void @multiple_store_groups_alias(1015; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]]) {1016; CHECK-NEXT: [[ENTRY:.*]]:1017; CHECK-NEXT: br label %[[LOOP:.*]]1018; CHECK: [[LOOP]]:1019; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]1020; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr double, ptr [[SRC]], i64 [[IV]]1021; CHECK-NEXT: [[GEP_FLAG:%.*]] = getelementptr i8, ptr [[GEP_SRC]], i64 1521022; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[GEP_FLAG]], align 41023; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 01024; CHECK-NEXT: [[V_1:%.*]] = load double, ptr [[GEP_SRC]], align 81025; CHECK-NEXT: br i1 [[CMP]], label %[[THEN:.*]], label %[[ELSE:.*]]1026; CHECK: [[ELSE]]:1027; CHECK-NEXT: [[GEP_DST1_THEN:%.*]] = getelementptr double, ptr [[DST]], i64 [[IV]]1028; CHECK-NEXT: store double [[V_1]], ptr [[GEP_DST1_THEN]], align 81029; CHECK-NEXT: [[GEP_DST2_THEN:%.*]] = getelementptr i8, ptr [[GEP_DST1_THEN]], i64 71030; CHECK-NEXT: store double 1.200000e+01, ptr [[GEP_DST2_THEN]], align 81031; CHECK-NEXT: br label %[[LOOP_LATCH]]1032; CHECK: [[THEN]]:1033; CHECK-NEXT: [[T_1:%.*]] = fadd double [[V_1]], 1.000000e+011034; CHECK-NEXT: [[GEP_DST1_ELSE:%.*]] = getelementptr double, ptr [[DST]], i64 [[IV]]1035; CHECK-NEXT: store double [[T_1]], ptr [[GEP_DST1_ELSE]], align 81036; CHECK-NEXT: [[GEP_SRC_16:%.*]] = getelementptr i8, ptr [[GEP_SRC]], i64 161037; CHECK-NEXT: [[V_3:%.*]] = load double, ptr [[GEP_SRC_16]], align 81038; CHECK-NEXT: [[T_2:%.*]] = fmul double 2.000000e+01, [[V_3]]1039; CHECK-NEXT: [[GEP_DST2_ELSE:%.*]] = getelementptr i8, ptr [[GEP_DST1_ELSE]], i64 71040; CHECK-NEXT: store double [[T_2]], ptr [[GEP_DST2_ELSE]], align 81041; CHECK-NEXT: br label %[[LOOP_LATCH]]1042; CHECK: [[LOOP_LATCH]]:1043; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 161044; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_NEXT]], 16001045; CHECK-NEXT: br i1 [[EXIT_COND]], label %[[EXIT:.*]], label %[[LOOP]]1046; CHECK: [[EXIT]]:1047; CHECK-NEXT: ret void1048;1049entry:1050 br label %loop1051 1052loop:1053 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]1054 %gep.src = getelementptr double, ptr %src, i64 %iv1055 %gep.flag = getelementptr i8, ptr %gep.src, i64 1521056 %c = load i32, ptr %gep.flag, align 41057 %cmp = icmp eq i32 %c, 01058 %v.1 = load double, ptr %gep.src, align 81059 br i1 %cmp, label %then, label %else1060 1061else:1062 %gep.dst1.then = getelementptr double, ptr %dst, i64 %iv1063 store double %v.1, ptr %gep.dst1.then, align 81064 %gep.dst2.then = getelementptr i8, ptr %gep.dst1.then, i64 71065 store double 12.0, ptr %gep.dst2.then, align 81066 br label %loop.latch1067 1068then:1069 %r.1 = fadd double %v.1, 10.01070 %gep.dst1.else = getelementptr double, ptr %dst, i64 %iv1071 store double %r.1, ptr %gep.dst1.else, align 81072 %gep.src.16 = getelementptr i8, ptr %gep.src, i64 161073 %v.3 = load double, ptr %gep.src.16, align 81074 %r.2 = fmul double 20.0, %v.31075 %gep.dst2.else = getelementptr i8, ptr %gep.dst1.else, i64 71076 store double %r.2, ptr %gep.dst2.else, align 81077 br label %loop.latch1078 1079loop.latch:1080 %iv.next = add i64 %iv, 161081 %exit.cond = icmp eq i64 %iv.next, 16001082 br i1 %exit.cond, label %exit, label %loop1083 1084exit:1085 ret void1086}1087