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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -passes=loop-vectorize,simplifycfg -verify-loop-info -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s --check-prefix=UNROLL3; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -passes=loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=UNROLL-NOSIMPLIFY4; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2 -force-vector-interleave=1 -passes=loop-vectorize,simplifycfg -verify-loop-info -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s --check-prefix=VEC5 6target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"7 8; Test predication of stores.9define i32 @test(ptr nocapture %f) #0 {10; UNROLL-LABEL: @test(11; UNROLL-NEXT: entry:12; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]]13; UNROLL: vector.body:14; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]15; UNROLL-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 116; UNROLL-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[F:%.*]], i64 [[INDEX]]17; UNROLL-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[TMP1]]18; UNROLL-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 419; UNROLL-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 420; UNROLL-NEXT: [[TMP6:%.*]] = icmp sgt i32 [[TMP4]], 10021; UNROLL-NEXT: [[TMP7:%.*]] = icmp sgt i32 [[TMP5]], 10022; UNROLL-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]23; UNROLL: pred.store.if:24; UNROLL-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP4]], 2025; UNROLL-NEXT: store i32 [[TMP8]], ptr [[TMP2]], align 426; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE]]27; UNROLL: pred.store.continue:28; UNROLL-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]]29; UNROLL: pred.store.if1:30; UNROLL-NEXT: [[TMP9:%.*]] = add nsw i32 [[TMP5]], 2031; UNROLL-NEXT: store i32 [[TMP9]], ptr [[TMP3]], align 432; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE2]]33; UNROLL: pred.store.continue2:34; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 235; UNROLL-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 12836; UNROLL-NEXT: br i1 [[TMP10]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]37; UNROLL: for.end:38; UNROLL-NEXT: ret i32 039;40; UNROLL-NOSIMPLIFY-LABEL: @test(41; UNROLL-NOSIMPLIFY-NEXT: entry:42; UNROLL-NOSIMPLIFY-NEXT: br label [[VECTOR_PH:%.*]]43; UNROLL-NOSIMPLIFY: vector.ph:44; UNROLL-NOSIMPLIFY-NEXT: br label [[VECTOR_BODY:%.*]]45; UNROLL-NOSIMPLIFY: vector.body:46; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]47; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 148; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[F:%.*]], i64 [[INDEX]]49; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[TMP1]]50; UNROLL-NOSIMPLIFY-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 451; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 452; UNROLL-NOSIMPLIFY-NEXT: [[TMP6:%.*]] = icmp sgt i32 [[TMP4]], 10053; UNROLL-NOSIMPLIFY-NEXT: [[TMP7:%.*]] = icmp sgt i32 [[TMP5]], 10054; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]55; UNROLL-NOSIMPLIFY: pred.store.if:56; UNROLL-NOSIMPLIFY-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP4]], 2057; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP8]], ptr [[TMP2]], align 458; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE]]59; UNROLL-NOSIMPLIFY: pred.store.continue:60; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]]61; UNROLL-NOSIMPLIFY: pred.store.if1:62; UNROLL-NOSIMPLIFY-NEXT: [[TMP9:%.*]] = add nsw i32 [[TMP5]], 2063; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP9]], ptr [[TMP3]], align 464; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE2]]65; UNROLL-NOSIMPLIFY: pred.store.continue2:66; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 267; UNROLL-NOSIMPLIFY-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 12868; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]69; UNROLL-NOSIMPLIFY: middle.block:70; UNROLL-NOSIMPLIFY-NEXT: br label [[FOR_INC:%.*]]71; UNROLL-NOSIMPLIFY: for.end:72; UNROLL-NOSIMPLIFY-NEXT: ret i32 073;74; VEC-LABEL: @test(75; VEC-NEXT: entry:76; VEC-NEXT: br label [[VECTOR_BODY:%.*]]77; VEC: vector.body:78; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]79; VEC-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[F:%.*]], i64 [[INDEX]]80; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP1]], align 481; VEC-NEXT: [[TMP3:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], splat (i32 100)82; VEC-NEXT: [[TMP4:%.*]] = extractelement <2 x i1> [[TMP3]], i32 083; VEC-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]84; VEC: pred.store.if:85; VEC-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 086; VEC-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[TMP5]]87; VEC-NEXT: [[TMP7:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 088; VEC-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], 2089; VEC-NEXT: store i32 [[TMP8]], ptr [[TMP6]], align 490; VEC-NEXT: br label [[PRED_STORE_CONTINUE]]91; VEC: pred.store.continue:92; VEC-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP3]], i32 193; VEC-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]]94; VEC: pred.store.if1:95; VEC-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 196; VEC-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[TMP10]]97; VEC-NEXT: [[TMP12:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 198; VEC-NEXT: [[TMP13:%.*]] = add nsw i32 [[TMP12]], 2099; VEC-NEXT: store i32 [[TMP13]], ptr [[TMP11]], align 4100; VEC-NEXT: br label [[PRED_STORE_CONTINUE2]]101; VEC: pred.store.continue2:102; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2103; VEC-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128104; VEC-NEXT: br i1 [[TMP14]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]105; VEC: for.end:106; VEC-NEXT: ret i32 0107;108entry:109 br label %for.body110 111 112 113for.body:114 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]115 %arrayidx = getelementptr inbounds i32, ptr %f, i64 %indvars.iv116 %0 = load i32, ptr %arrayidx, align 4117 %cmp1 = icmp sgt i32 %0, 100118 br i1 %cmp1, label %if.then, label %for.inc119 120if.then:121 %add = add nsw i32 %0, 20122 store i32 %add, ptr %arrayidx, align 4123 br label %for.inc124 125for.inc:126 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1127 %exitcond = icmp eq i64 %indvars.iv.next, 128128 br i1 %exitcond, label %for.end, label %for.body129 130for.end:131 ret i32 0132}133 134; Track basic blocks when unrolling conditional blocks. This code used to assert135; because we did not update the phi nodes with the proper predecessor in the136; vectorized loop body.137; PR18724138 139define void @bug18724(i1 %cond, ptr %ptr, i1 %cond.2, i64 %v.1, i32 %v.2) {140; UNROLL-LABEL: @bug18724(141; UNROLL-NEXT: entry:142; UNROLL-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true143; UNROLL-NEXT: call void @llvm.assume(i1 [[TMP0]])144; UNROLL-NEXT: [[TMP1:%.*]] = trunc i64 [[V_1:%.*]] to i32145; UNROLL-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 0)146; UNROLL-NEXT: [[TMP2:%.*]] = sub i32 [[SMAX]], [[TMP1]]147; UNROLL-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64148; UNROLL-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1149; UNROLL-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 2150; UNROLL-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]151; UNROLL: vector.ph:152; UNROLL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP4]], 2153; UNROLL-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]]154; UNROLL-NEXT: [[IND_END:%.*]] = add i64 [[V_1]], [[N_VEC]]155; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]]156; UNROLL: vector.body:157; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE3:%.*]] ]158; UNROLL-NEXT: [[VEC_PHI:%.*]] = phi i32 [ [[V_2:%.*]], [[VECTOR_PH]] ], [ [[PREDPHI:%.*]], [[PRED_STORE_CONTINUE3]] ]159; UNROLL-NEXT: [[VEC_PHI1:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[PREDPHI4:%.*]], [[PRED_STORE_CONTINUE3]] ]160; UNROLL-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[V_1]], [[INDEX]]161; UNROLL-NEXT: [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 1162; UNROLL-NEXT: [[TMP7:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR:%.*]], i64 0, i64 [[OFFSET_IDX]]163; UNROLL-NEXT: [[TMP8:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[TMP6]]164; UNROLL-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP7]], align 4165; UNROLL-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP8]], align 4166; UNROLL-NEXT: br i1 [[COND_2:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE3]]167; UNROLL: pred.store.if:168; UNROLL-NEXT: store i32 [[TMP9]], ptr [[TMP7]], align 4169; UNROLL-NEXT: store i32 [[TMP10]], ptr [[TMP8]], align 4170; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE3]]171; UNROLL: pred.store.continue3:172; UNROLL-NEXT: [[TMP11:%.*]] = add i32 [[VEC_PHI]], 1173; UNROLL-NEXT: [[TMP12:%.*]] = add i32 [[VEC_PHI1]], 1174; UNROLL-NEXT: [[PREDPHI]] = select i1 [[COND_2]], i32 [[TMP11]], i32 [[VEC_PHI]]175; UNROLL-NEXT: [[PREDPHI4]] = select i1 [[COND_2]], i32 [[TMP12]], i32 [[VEC_PHI1]]176; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2177; UNROLL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]178; UNROLL-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]179; UNROLL: middle.block:180; UNROLL-NEXT: [[BIN_RDX:%.*]] = add i32 [[PREDPHI4]], [[PREDPHI]]181; UNROLL-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]]182; UNROLL-NEXT: [[TMP16:%.*]] = xor i1 [[CMP_N]], true183; UNROLL-NEXT: call void @llvm.assume(i1 [[TMP16]])184; UNROLL-NEXT: br label [[SCALAR_PH]]185; UNROLL: scalar.ph:186; UNROLL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[V_1]], [[ENTRY:%.*]] ]187; UNROLL-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[BIN_RDX]], [[MIDDLE_BLOCK]] ], [ [[V_2]], [[ENTRY]] ]188; UNROLL-NEXT: br label [[FOR_BODY14:%.*]]189; UNROLL: for.body14:190; UNROLL-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]191; UNROLL-NEXT: [[INEWCHUNKS_120:%.*]] = phi i32 [ [[INEWCHUNKS_2:%.*]], [[FOR_INC23]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]192; UNROLL-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[INDVARS_IV3]]193; UNROLL-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX16]], align 4194; UNROLL-NEXT: br i1 [[COND_2]], label [[IF_THEN18:%.*]], label [[FOR_INC23]]195; UNROLL: if.then18:196; UNROLL-NEXT: store i32 [[TMP]], ptr [[ARRAYIDX16]], align 4197; UNROLL-NEXT: [[INC21:%.*]] = add nsw i32 [[INEWCHUNKS_120]], 1198; UNROLL-NEXT: br label [[FOR_INC23]]199; UNROLL: for.inc23:200; UNROLL-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]201; UNROLL-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1202; UNROLL-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32203; UNROLL-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0204; UNROLL-NEXT: call void @llvm.assume(i1 [[CMP13]])205; UNROLL-NEXT: br label [[FOR_BODY14]]206;207; UNROLL-NOSIMPLIFY-LABEL: @bug18724(208; UNROLL-NOSIMPLIFY-NEXT: entry:209; UNROLL-NOSIMPLIFY-NEXT: br label [[FOR_BODY9:%.*]]210; UNROLL-NOSIMPLIFY: for.body9:211; UNROLL-NOSIMPLIFY-NEXT: br i1 [[COND:%.*]], label [[FOR_INC26:%.*]], label [[FOR_BODY14_PREHEADER:%.*]]212; UNROLL-NOSIMPLIFY: for.body14.preheader:213; UNROLL-NOSIMPLIFY-NEXT: [[TMP0:%.*]] = trunc i64 [[V_1:%.*]] to i32214; UNROLL-NOSIMPLIFY-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 0)215; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = sub i32 [[SMAX]], [[TMP0]]216; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64217; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1218; UNROLL-NOSIMPLIFY-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 2219; UNROLL-NOSIMPLIFY-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]220; UNROLL-NOSIMPLIFY: vector.ph:221; UNROLL-NOSIMPLIFY-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 2222; UNROLL-NOSIMPLIFY-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]223; UNROLL-NOSIMPLIFY-NEXT: [[IND_END:%.*]] = add i64 [[V_1]], [[N_VEC]]224; UNROLL-NOSIMPLIFY-NEXT: br label [[VECTOR_BODY:%.*]]225; UNROLL-NOSIMPLIFY: vector.body:226; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE3:%.*]] ]227; UNROLL-NOSIMPLIFY-NEXT: [[VEC_PHI:%.*]] = phi i32 [ [[V_2:%.*]], [[VECTOR_PH]] ], [ [[PREDPHI:%.*]], [[PRED_STORE_CONTINUE3]] ]228; UNROLL-NOSIMPLIFY-NEXT: [[VEC_PHI1:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[PREDPHI4:%.*]], [[PRED_STORE_CONTINUE3]] ]229; UNROLL-NOSIMPLIFY-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[V_1]], [[INDEX]]230; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 1231; UNROLL-NOSIMPLIFY-NEXT: [[TMP6:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR:%.*]], i64 0, i64 [[OFFSET_IDX]]232; UNROLL-NOSIMPLIFY-NEXT: [[TMP7:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[TMP5]]233; UNROLL-NOSIMPLIFY-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP6]], align 4234; UNROLL-NOSIMPLIFY-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP7]], align 4235; UNROLL-NOSIMPLIFY-NEXT: br i1 [[COND_2:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]236; UNROLL-NOSIMPLIFY: pred.store.if:237; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP8]], ptr [[TMP6]], align 4238; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE]]239; UNROLL-NOSIMPLIFY: pred.store.continue:240; UNROLL-NOSIMPLIFY-NEXT: br i1 [[COND_2]], label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3]]241; UNROLL-NOSIMPLIFY: pred.store.if2:242; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP9]], ptr [[TMP7]], align 4243; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE3]]244; UNROLL-NOSIMPLIFY: pred.store.continue3:245; UNROLL-NOSIMPLIFY-NEXT: [[TMP10:%.*]] = add i32 [[VEC_PHI]], 1246; UNROLL-NOSIMPLIFY-NEXT: [[TMP11:%.*]] = add i32 [[VEC_PHI1]], 1247; UNROLL-NOSIMPLIFY-NEXT: [[PREDPHI]] = select i1 [[COND_2]], i32 [[TMP10]], i32 [[VEC_PHI]]248; UNROLL-NOSIMPLIFY-NEXT: [[PREDPHI4]] = select i1 [[COND_2]], i32 [[TMP11]], i32 [[VEC_PHI1]]249; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2250; UNROLL-NOSIMPLIFY-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]251; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]252; UNROLL-NOSIMPLIFY: middle.block:253; UNROLL-NOSIMPLIFY-NEXT: [[BIN_RDX:%.*]] = add i32 [[PREDPHI4]], [[PREDPHI]]254; UNROLL-NOSIMPLIFY-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]255; UNROLL-NOSIMPLIFY-NEXT: br i1 [[CMP_N]], label [[FOR_INC26_LOOPEXIT:%.*]], label [[SCALAR_PH]]256; UNROLL-NOSIMPLIFY: scalar.ph:257; UNROLL-NOSIMPLIFY-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[V_1]], [[FOR_BODY14_PREHEADER]] ]258; UNROLL-NOSIMPLIFY-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[BIN_RDX]], [[MIDDLE_BLOCK]] ], [ [[V_2]], [[FOR_BODY14_PREHEADER]] ]259; UNROLL-NOSIMPLIFY-NEXT: br label [[FOR_BODY14:%.*]]260; UNROLL-NOSIMPLIFY: for.body14:261; UNROLL-NOSIMPLIFY-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]262; UNROLL-NOSIMPLIFY-NEXT: [[INEWCHUNKS_120:%.*]] = phi i32 [ [[INEWCHUNKS_2:%.*]], [[FOR_INC23]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]263; UNROLL-NOSIMPLIFY-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[INDVARS_IV3]]264; UNROLL-NOSIMPLIFY-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX16]], align 4265; UNROLL-NOSIMPLIFY-NEXT: br i1 [[COND_2]], label [[IF_THEN18:%.*]], label [[FOR_INC23]]266; UNROLL-NOSIMPLIFY: if.then18:267; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP]], ptr [[ARRAYIDX16]], align 4268; UNROLL-NOSIMPLIFY-NEXT: [[INC21:%.*]] = add nsw i32 [[INEWCHUNKS_120]], 1269; UNROLL-NOSIMPLIFY-NEXT: br label [[FOR_INC23]]270; UNROLL-NOSIMPLIFY: for.inc23:271; UNROLL-NOSIMPLIFY-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]272; UNROLL-NOSIMPLIFY-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1273; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32274; UNROLL-NOSIMPLIFY-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0275; UNROLL-NOSIMPLIFY-NEXT: br i1 [[CMP13]], label [[FOR_BODY14]], label [[FOR_INC26_LOOPEXIT]], !llvm.loop [[LOOP4:![0-9]+]]276; UNROLL-NOSIMPLIFY: for.inc26.loopexit:277; UNROLL-NOSIMPLIFY-NEXT: [[INEWCHUNKS_2_LCSSA:%.*]] = phi i32 [ [[INEWCHUNKS_2]], [[FOR_INC23]] ], [ [[BIN_RDX]], [[MIDDLE_BLOCK]] ]278; UNROLL-NOSIMPLIFY-NEXT: br label [[FOR_INC26]]279; UNROLL-NOSIMPLIFY: for.inc26:280; UNROLL-NOSIMPLIFY-NEXT: [[INEWCHUNKS_1_LCSSA:%.*]] = phi i32 [ 0, [[FOR_BODY9]] ], [ [[INEWCHUNKS_2_LCSSA]], [[FOR_INC26_LOOPEXIT]] ]281; UNROLL-NOSIMPLIFY-NEXT: unreachable282;283; VEC-LABEL: @bug18724(284; VEC-NEXT: entry:285; VEC-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true286; VEC-NEXT: call void @llvm.assume(i1 [[TMP0]])287; VEC-NEXT: [[TMP1:%.*]] = trunc i64 [[V_1:%.*]] to i32288; VEC-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 0)289; VEC-NEXT: [[TMP2:%.*]] = sub i32 [[SMAX]], [[TMP1]]290; VEC-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64291; VEC-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1292; VEC-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 2293; VEC-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]294; VEC: vector.ph:295; VEC-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP4]], 2296; VEC-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]]297; VEC-NEXT: [[IND_END:%.*]] = add i64 [[V_1]], [[N_VEC]]298; VEC-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> zeroinitializer, i32 [[V_2:%.*]], i32 0299; VEC-NEXT: br label [[VECTOR_BODY:%.*]]300; VEC: vector.body:301; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]302; VEC-NEXT: [[VEC_PHI:%.*]] = phi <2 x i32> [ [[TMP5]], [[VECTOR_PH]] ], [ [[PREDPHI:%.*]], [[PRED_STORE_CONTINUE2]] ]303; VEC-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[V_1]], [[INDEX]]304; VEC-NEXT: [[TMP7:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR:%.*]], i64 0, i64 [[OFFSET_IDX]]305; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP7]], align 4306; VEC-NEXT: br i1 [[COND_2:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE2]]307; VEC: pred.store.if:308; VEC-NEXT: [[INDVARS_IV3:%.*]] = add i64 [[OFFSET_IDX]], 0309; VEC-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[INDVARS_IV3]]310; VEC-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 0311; VEC-NEXT: store i32 [[TMP11]], ptr [[ARRAYIDX16]], align 4312; VEC-NEXT: [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 1313; VEC-NEXT: [[TMP13:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[TMP12]]314; VEC-NEXT: [[TMP14:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 1315; VEC-NEXT: store i32 [[TMP14]], ptr [[TMP13]], align 4316; VEC-NEXT: br label [[PRED_STORE_CONTINUE2]]317; VEC: pred.store.continue2:318; VEC-NEXT: [[TMP15:%.*]] = add <2 x i32> [[VEC_PHI]], splat (i32 1)319; VEC-NEXT: [[PREDPHI]] = select i1 [[COND_2]], <2 x i32> [[TMP15]], <2 x i32> [[VEC_PHI]]320; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2321; VEC-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]322; VEC-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]323; VEC: middle.block:324; VEC-NEXT: [[TMP17:%.*]] = call i32 @llvm.vector.reduce.add.v2i32(<2 x i32> [[PREDPHI]])325; VEC-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]]326; VEC-NEXT: [[TMP18:%.*]] = xor i1 [[CMP_N]], true327; VEC-NEXT: call void @llvm.assume(i1 [[TMP18]])328; VEC-NEXT: br label [[SCALAR_PH]]329; VEC: scalar.ph:330; VEC-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[V_1]], [[ENTRY:%.*]] ]331; VEC-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP17]], [[MIDDLE_BLOCK]] ], [ [[V_2]], [[ENTRY]] ]332; VEC-NEXT: br label [[FOR_BODY14:%.*]]333; VEC: for.body14:334; VEC-NEXT: [[INDVARS_IV4:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]335; VEC-NEXT: [[INEWCHUNKS_120:%.*]] = phi i32 [ [[INEWCHUNKS_2:%.*]], [[FOR_INC23]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]336; VEC-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[INDVARS_IV4]]337; VEC-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX17]], align 4338; VEC-NEXT: br i1 [[COND_2]], label [[IF_THEN18:%.*]], label [[FOR_INC23]]339; VEC: if.then18:340; VEC-NEXT: store i32 [[TMP]], ptr [[ARRAYIDX17]], align 4341; VEC-NEXT: [[INC21:%.*]] = add nsw i32 [[INEWCHUNKS_120]], 1342; VEC-NEXT: br label [[FOR_INC23]]343; VEC: for.inc23:344; VEC-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]345; VEC-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV4]], 1346; VEC-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV4]] to i32347; VEC-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0348; VEC-NEXT: call void @llvm.assume(i1 [[CMP13]])349; VEC-NEXT: br label [[FOR_BODY14]]350;351entry:352 br label %for.body9353 354for.body9:355 br i1 %cond, label %for.inc26, label %for.body14356 357for.body14:358 %indvars.iv3 = phi i64 [ %indvars.iv.next4, %for.inc23 ], [ %v.1, %for.body9 ]359 %iNewChunks.120 = phi i32 [ %iNewChunks.2, %for.inc23 ], [ %v.2, %for.body9 ]360 %arrayidx16 = getelementptr inbounds [768 x i32], ptr %ptr, i64 0, i64 %indvars.iv3361 %tmp = load i32, ptr %arrayidx16, align 4362 br i1 %cond.2, label %if.then18, label %for.inc23363 364if.then18:365 store i32 %tmp, ptr %arrayidx16, align 4366 %inc21 = add nsw i32 %iNewChunks.120, 1367 br label %for.inc23368 369for.inc23:370 %iNewChunks.2 = phi i32 [ %inc21, %if.then18 ], [ %iNewChunks.120, %for.body14 ]371 %indvars.iv.next4 = add nsw i64 %indvars.iv3, 1372 %tmp1 = trunc i64 %indvars.iv3 to i32373 %cmp13 = icmp slt i32 %tmp1, 0374 br i1 %cmp13, label %for.body14, label %for.inc26375 376for.inc26:377 %iNewChunks.1.lcssa = phi i32 [ 0, %for.body9 ], [ %iNewChunks.2, %for.inc23 ]378 unreachable379}380 381; In the test below, it's more profitable for the expression feeding the382; conditional store to remain scalar. Since we can only type-shrink vector383; types, we shouldn't try to represent the expression in a smaller type.384;385define void @minimal_bit_widths(ptr %p, i1 %c) {386; UNROLL-LABEL: @minimal_bit_widths(387; UNROLL-NEXT: entry:388; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]]389; UNROLL: vector.body:390; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]391; UNROLL-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1392; UNROLL-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 [[INDEX]]393; UNROLL-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP1]]394; UNROLL-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1395; UNROLL-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP3]], align 1396; UNROLL-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE2]]397; UNROLL: pred.store.if:398; UNROLL-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 1399; UNROLL-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 1400; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE2]]401; UNROLL: pred.store.continue2:402; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2403; UNROLL-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000404; UNROLL-NEXT: br i1 [[TMP6]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]405; UNROLL: for.end:406; UNROLL-NEXT: ret void407;408; UNROLL-NOSIMPLIFY-LABEL: @minimal_bit_widths(409; UNROLL-NOSIMPLIFY-NEXT: entry:410; UNROLL-NOSIMPLIFY-NEXT: br label [[VECTOR_PH:%.*]]411; UNROLL-NOSIMPLIFY: vector.ph:412; UNROLL-NOSIMPLIFY-NEXT: br label [[VECTOR_BODY:%.*]]413; UNROLL-NOSIMPLIFY: vector.body:414; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]415; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1416; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 [[INDEX]]417; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP1]]418; UNROLL-NOSIMPLIFY-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1419; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP3]], align 1420; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]421; UNROLL-NOSIMPLIFY: pred.store.if:422; UNROLL-NOSIMPLIFY-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 1423; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE]]424; UNROLL-NOSIMPLIFY: pred.store.continue:425; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]]426; UNROLL-NOSIMPLIFY: pred.store.if1:427; UNROLL-NOSIMPLIFY-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 1428; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE2]]429; UNROLL-NOSIMPLIFY: pred.store.continue2:430; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2431; UNROLL-NOSIMPLIFY-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000432; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP6]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]433; UNROLL-NOSIMPLIFY: middle.block:434; UNROLL-NOSIMPLIFY-NEXT: br label [[FOR_INC:%.*]]435; UNROLL-NOSIMPLIFY: for.end:436; UNROLL-NOSIMPLIFY-NEXT: ret void437;438; VEC-LABEL: @minimal_bit_widths(439; VEC-NEXT: entry:440; VEC-NEXT: br label [[VECTOR_BODY:%.*]]441; VEC: vector.body:442; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]443; VEC-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 [[INDEX]]444; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i8>, ptr [[TMP1]], align 1445; VEC-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE2]]446; VEC: pred.store.if:447; VEC-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], 0448; VEC-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP8]]449; VEC-NEXT: [[TMP4:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i32 0450; VEC-NEXT: store i8 [[TMP4]], ptr [[TMP3]], align 1451; VEC-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 1452; VEC-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP5]]453; VEC-NEXT: [[TMP7:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i32 1454; VEC-NEXT: store i8 [[TMP7]], ptr [[TMP6]], align 1455; VEC-NEXT: br label [[PRED_STORE_CONTINUE2]]456; VEC: pred.store.continue2:457; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2458; VEC-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000459; VEC-NEXT: br i1 [[TMP11]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]460; VEC: for.end:461; VEC-NEXT: ret void462;463entry:464 br label %for.body465 466for.body:467 %tmp0 = phi i64 [ %tmp6, %for.inc ], [ 0, %entry ]468 %tmp1 = phi i64 [ %tmp7, %for.inc ], [ 1000, %entry ]469 %tmp2 = getelementptr i8, ptr %p, i64 %tmp0470 %tmp3 = load i8, ptr %tmp2, align 1471 br i1 %c, label %if.then, label %for.inc472 473if.then:474 %tmp4 = zext i8 %tmp3 to i32475 %tmp5 = trunc i32 %tmp4 to i8476 store i8 %tmp5, ptr %tmp2, align 1477 br label %for.inc478 479for.inc:480 %tmp6 = add nuw nsw i64 %tmp0, 1481 %tmp7 = add i64 %tmp1, -1482 %tmp8 = icmp eq i64 %tmp7, 0483 br i1 %tmp8, label %for.end, label %for.body484 485for.end:486 ret void487}488 489define void @minimal_bit_widths_with_aliasing_store(i1 %c, ptr %ptr) {490; UNROLL-LABEL: @minimal_bit_widths_with_aliasing_store(491; UNROLL-NEXT: entry:492; UNROLL-NEXT: br label [[FOR_BODY:%.*]]493; UNROLL: vector.body:494; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[FOR_INC:%.*]] ]495; UNROLL-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1496; UNROLL-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[INDEX]]497; UNROLL-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[TMP1]]498; UNROLL-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 1499; UNROLL-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1500; UNROLL-NEXT: store i8 0, ptr [[TMP2]], align 1501; UNROLL-NEXT: store i8 0, ptr [[TMP4]], align 1502; UNROLL-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[FOR_INC]]503; UNROLL: pred.store.if:504; UNROLL-NEXT: store i8 [[TMP3]], ptr [[TMP2]], align 1505; UNROLL-NEXT: store i8 [[TMP5]], ptr [[TMP4]], align 1506; UNROLL-NEXT: br label [[FOR_INC]]507; UNROLL: pred.store.continue2:508; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2509; UNROLL-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000510; UNROLL-NEXT: br i1 [[TMP6]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]511; UNROLL: for.end:512; UNROLL-NEXT: ret void513;514; UNROLL-NOSIMPLIFY-LABEL: @minimal_bit_widths_with_aliasing_store(515; UNROLL-NOSIMPLIFY-NEXT: entry:516; UNROLL-NOSIMPLIFY-NEXT: br label [[VECTOR_PH:%.*]]517; UNROLL-NOSIMPLIFY: vector.ph:518; UNROLL-NOSIMPLIFY-NEXT: br label [[VECTOR_BODY:%.*]]519; UNROLL-NOSIMPLIFY: vector.body:520; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]521; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1522; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[INDEX]]523; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[TMP1]]524; UNROLL-NOSIMPLIFY-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1525; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP3]], align 1526; UNROLL-NOSIMPLIFY-NEXT: store i8 0, ptr [[TMP2]], align 1527; UNROLL-NOSIMPLIFY-NEXT: store i8 0, ptr [[TMP3]], align 1528; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]529; UNROLL-NOSIMPLIFY: pred.store.if:530; UNROLL-NOSIMPLIFY-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 1531; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE]]532; UNROLL-NOSIMPLIFY: pred.store.continue:533; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]]534; UNROLL-NOSIMPLIFY: pred.store.if1:535; UNROLL-NOSIMPLIFY-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 1536; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE2]]537; UNROLL-NOSIMPLIFY: pred.store.continue2:538; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2539; UNROLL-NOSIMPLIFY-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000540; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP6]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]541; UNROLL-NOSIMPLIFY: middle.block:542; UNROLL-NOSIMPLIFY-NEXT: br label [[FOR_INC:%.*]]543; UNROLL-NOSIMPLIFY: for.end:544; UNROLL-NOSIMPLIFY-NEXT: ret void545;546; VEC-LABEL: @minimal_bit_widths_with_aliasing_store(547; VEC-NEXT: entry:548; VEC-NEXT: br label [[FOR_BODY:%.*]]549; VEC: vector.body:550; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]551; VEC-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[INDEX]]552; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i8>, ptr [[TMP2]], align 1553; VEC-NEXT: store <2 x i8> zeroinitializer, ptr [[TMP2]], align 1554; VEC-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE2]]555; VEC: pred.store.if:556; VEC-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0557; VEC-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[TMP0]]558; VEC-NEXT: [[TMP5:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i32 0559; VEC-NEXT: store i8 [[TMP5]], ptr [[TMP4]], align 1560; VEC-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 1561; VEC-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[TMP7]]562; VEC-NEXT: [[TMP9:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i32 1563; VEC-NEXT: store i8 [[TMP9]], ptr [[TMP8]], align 1564; VEC-NEXT: br label [[PRED_STORE_CONTINUE2]]565; VEC: pred.store.continue2:566; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2567; VEC-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000568; VEC-NEXT: br i1 [[TMP10]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]569; VEC: for.end:570; VEC-NEXT: ret void571;572entry:573 br label %for.body574 575for.body:576 %tmp0 = phi i64 [ %tmp6, %for.inc ], [ 0, %entry ]577 %tmp1 = phi i64 [ %tmp7, %for.inc ], [ 1000, %entry ]578 %tmp2 = getelementptr i8, ptr %ptr, i64 %tmp0579 %tmp3 = load i8, ptr %tmp2, align 1580 store i8 0, ptr %tmp2581 br i1 %c, label %if.then, label %for.inc582 583if.then:584 %tmp4 = zext i8 %tmp3 to i32585 %tmp5 = trunc i32 %tmp4 to i8586 store i8 %tmp5, ptr %tmp2, align 1587 br label %for.inc588 589for.inc:590 %tmp6 = add nuw nsw i64 %tmp0, 1591 %tmp7 = add i64 %tmp1, -1592 %tmp8 = icmp eq i64 %tmp7, 0593 br i1 %tmp8, label %for.end, label %for.body594 595for.end:596 ret void597}598 599define void @sdiv_with_uniform_ops(i16 %0, i1 %c, ptr %dst) {600; UNROLL-LABEL: @sdiv_with_uniform_ops(601; UNROLL-NEXT: entry:602; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]]603; UNROLL: vector.body:604; UNROLL-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]605; UNROLL-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE2]]606; UNROLL: pred.store.if:607; UNROLL-NEXT: [[TMP1:%.*]] = sdiv i16 10, [[TMP0:%.*]]608; UNROLL-NEXT: store i16 [[TMP1]], ptr [[DST:%.*]], align 1609; UNROLL-NEXT: [[TMP2:%.*]] = sdiv i16 10, [[TMP0]]610; UNROLL-NEXT: store i16 [[TMP2]], ptr [[DST]], align 1611; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE2]]612; UNROLL: pred.store.continue2:613; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2614; UNROLL-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], 98615; UNROLL-NEXT: br i1 [[TMP3]], label [[LOOP_HEADER:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]616; UNROLL: loop.header:617; UNROLL-NEXT: [[IV:%.*]] = phi i16 [ [[INC:%.*]], [[LOOP_LATCH:%.*]] ], [ 99, [[PRED_STORE_CONTINUE2]] ]618; UNROLL-NEXT: br i1 [[C]], label [[THEN:%.*]], label [[LOOP_LATCH]]619; UNROLL: then:620; UNROLL-NEXT: [[DIV:%.*]] = sdiv i16 10, [[TMP0]]621; UNROLL-NEXT: store i16 [[DIV]], ptr [[DST]], align 1622; UNROLL-NEXT: br label [[LOOP_LATCH]]623; UNROLL: loop.latch:624; UNROLL-NEXT: [[INC]] = add i16 [[IV]], 1625; UNROLL-NEXT: [[EC:%.*]] = icmp eq i16 [[INC]], 100626; UNROLL-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_HEADER]], !llvm.loop [[LOOP7:![0-9]+]]627; UNROLL: exit:628; UNROLL-NEXT: ret void629;630; UNROLL-NOSIMPLIFY-LABEL: @sdiv_with_uniform_ops(631; UNROLL-NOSIMPLIFY-NEXT: entry:632; UNROLL-NOSIMPLIFY-NEXT: br label [[VECTOR_PH:%.*]]633; UNROLL-NOSIMPLIFY: vector.ph:634; UNROLL-NOSIMPLIFY-NEXT: br label [[VECTOR_BODY:%.*]]635; UNROLL-NOSIMPLIFY: vector.body:636; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]637; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]638; UNROLL-NOSIMPLIFY: pred.store.if:639; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = sdiv i16 10, [[TMP0:%.*]]640; UNROLL-NOSIMPLIFY-NEXT: store i16 [[TMP1]], ptr [[DST:%.*]], align 1641; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE]]642; UNROLL-NOSIMPLIFY: pred.store.continue:643; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]]644; UNROLL-NOSIMPLIFY: pred.store.if1:645; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = sdiv i16 10, [[TMP0]]646; UNROLL-NOSIMPLIFY-NEXT: store i16 [[TMP2]], ptr [[DST]], align 1647; UNROLL-NOSIMPLIFY-NEXT: br label [[PRED_STORE_CONTINUE2]]648; UNROLL-NOSIMPLIFY: pred.store.continue2:649; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2650; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], 98651; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]652; UNROLL-NOSIMPLIFY: middle.block:653; UNROLL-NOSIMPLIFY-NEXT: br label [[SCALAR_PH:%.*]]654; UNROLL-NOSIMPLIFY: scalar.ph:655; UNROLL-NOSIMPLIFY-NEXT: br label [[LOOP_HEADER:%.*]]656; UNROLL-NOSIMPLIFY: loop.header:657; UNROLL-NOSIMPLIFY-NEXT: [[IV:%.*]] = phi i16 [ 99, [[SCALAR_PH]] ], [ [[INC:%.*]], [[LOOP_LATCH:%.*]] ]658; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label [[THEN:%.*]], label [[LOOP_LATCH]]659; UNROLL-NOSIMPLIFY: then:660; UNROLL-NOSIMPLIFY-NEXT: [[DIV:%.*]] = sdiv i16 10, [[TMP0]]661; UNROLL-NOSIMPLIFY-NEXT: store i16 [[DIV]], ptr [[DST]], align 1662; UNROLL-NOSIMPLIFY-NEXT: br label [[LOOP_LATCH]]663; UNROLL-NOSIMPLIFY: loop.latch:664; UNROLL-NOSIMPLIFY-NEXT: [[INC]] = add i16 [[IV]], 1665; UNROLL-NOSIMPLIFY-NEXT: [[EC:%.*]] = icmp eq i16 [[INC]], 100666; UNROLL-NOSIMPLIFY-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_HEADER]], !llvm.loop [[LOOP8:![0-9]+]]667; UNROLL-NOSIMPLIFY: exit:668; UNROLL-NOSIMPLIFY-NEXT: ret void669;670; VEC-LABEL: @sdiv_with_uniform_ops(671; VEC-NEXT: entry:672; VEC-NEXT: br label [[VECTOR_BODY:%.*]]673; VEC: vector.body:674; VEC-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]675; VEC-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE2]]676; VEC: pred.store.if:677; VEC-NEXT: [[TMP1:%.*]] = sdiv i16 10, [[TMP0:%.*]]678; VEC-NEXT: store i16 [[TMP1]], ptr [[DST:%.*]], align 1679; VEC-NEXT: [[TMP2:%.*]] = sdiv i16 10, [[TMP0]]680; VEC-NEXT: store i16 [[TMP2]], ptr [[DST]], align 1681; VEC-NEXT: br label [[PRED_STORE_CONTINUE2]]682; VEC: pred.store.continue2:683; VEC-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2684; VEC-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], 98685; VEC-NEXT: br i1 [[TMP3]], label [[LOOP_HEADER:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]686; VEC: loop.header:687; VEC-NEXT: [[IV:%.*]] = phi i16 [ [[INC:%.*]], [[LOOP_LATCH:%.*]] ], [ 99, [[PRED_STORE_CONTINUE2]] ]688; VEC-NEXT: br i1 [[C]], label [[THEN:%.*]], label [[LOOP_LATCH]]689; VEC: then:690; VEC-NEXT: [[DIV:%.*]] = sdiv i16 10, [[TMP0]]691; VEC-NEXT: store i16 [[DIV]], ptr [[DST]], align 1692; VEC-NEXT: br label [[LOOP_LATCH]]693; VEC: loop.latch:694; VEC-NEXT: [[INC]] = add i16 [[IV]], 1695; VEC-NEXT: [[EC:%.*]] = icmp eq i16 [[INC]], 100696; VEC-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_HEADER]], !llvm.loop [[LOOP7:![0-9]+]]697; VEC: exit:698; VEC-NEXT: ret void699;700entry:701 br label %loop.header702 703loop.header:704 %iv = phi i16 [ 1, %entry ], [ %inc, %loop.latch ]705 br i1 %c, label %then, label %loop.latch706 707then:708 %div = sdiv i16 10, %0709 store i16 %div, ptr %dst, align 1710 br label %loop.latch711 712loop.latch:713 %inc = add i16 %iv, 1714 %ec = icmp eq i16 %inc, 100715 br i1 %ec, label %exit, label %loop.header716 717exit:718 ret void719}720