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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck %s3 4 5; Test case where %gep has multiple uses of %iv.6define void @multiple_iv_uses_in_same_instruction(ptr %ptr) {7; CHECK-LABEL: @multiple_iv_uses_in_same_instruction(8; CHECK-NEXT: entry:9; CHECK-NEXT: br label [[VECTOR_PH:%.*]]10; CHECK: vector.ph:11; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]12; CHECK: vector.body:13; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]14; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 015; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 116; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDEX]] to i3217; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 018; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], 119; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr [[PTR:%.*]], i64 0, i64 [[TMP0]], i64 [[TMP0]]20; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr [[PTR]], i64 0, i64 [[TMP1]], i64 [[TMP1]]21; CHECK-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 422; CHECK-NEXT: store i32 [[TMP4]], ptr [[TMP6]], align 423; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 224; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10025; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]26; CHECK: middle.block:27; CHECK-NEXT: br label [[LOOP:%.*]]28; CHECK: exit:29; CHECK-NEXT: ret void30;31entry:32 br label %loop33 34loop:35 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]36 %gep = getelementptr inbounds [100 x [100 x i32]], ptr %ptr, i64 0, i64 %iv, i64 %iv37 %t = trunc i64 %iv to i3238 store i32 %t, ptr %gep, align 439 %iv.next = add nuw nsw i64 %iv, 140 %exitcond = icmp eq i64 %iv.next, 10041 br i1 %exitcond, label %exit, label %loop42 43exit:44 ret void45}46