76 lines · plain
1; RUN: opt -S -passes=loop-vectorize,instcombine -force-vector-width=4 -force-vector-interleave=1 -enable-interleaved-mem-accesses=true < %s | FileCheck %s2 3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"4 5; Check that the interleaved-mem-access analysis identifies the access6; to array 'in' as interleaved, despite the possibly wrapping unsigned7; 'out_ix' index.8;9; In this test the interleave-groups are full (have no gaps), so no wrapping10; checks are necessary. We can call getPtrStride with Assume=false and11; ShouldCheckWrap=false to safely figure out that the stride is 2.12 13; #include <stdlib.h>14; class Complex {15; private:16; float real_;17; float imaginary_;18;19;public:20; Complex() : real_(0), imaginary_(0) { }21; Complex(float real, float imaginary) : real_(real), imaginary_(imaginary) { }22; Complex(const Complex &rhs) : real_(rhs.real()), imaginary_(rhs.imaginary()) { }23;24; inline float real() const { return real_; }25; inline float imaginary() const { return imaginary_; }26;};27;28;void test(Complex * __restrict__ out, Complex * __restrict__ in, size_t out_start, size_t size)29;{30; for (size_t out_offset = 0; out_offset < size; ++out_offset)31; {32; size_t out_ix = out_start + out_offset;33; Complex t0 = in[out_ix];34; out[out_ix] = t0;35; }36;}37 38; CHECK: vector.body:39; CHECK: %wide.vec = load <8 x i32>, ptr {{.*}}, align 440; CHECK: shufflevector <8 x i32> %wide.vec, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>41; CHECK: shufflevector <8 x i32> %wide.vec, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>42 43%class.Complex = type { float, float }44 45define void @_Z4testP7ComplexS0_mm(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, i64 %out_start, i64 %size) local_unnamed_addr {46entry:47 %cmp9 = icmp eq i64 %size, 048 br i1 %cmp9, label %for.cond.cleanup, label %for.body.preheader49 50for.body.preheader:51 br label %for.body52 53for.cond.cleanup.loopexit:54 br label %for.cond.cleanup55 56for.cond.cleanup:57 ret void58 59for.body:60 %out_offset.010 = phi i64 [ %inc, %for.body ], [ 0, %for.body.preheader ]61 %add = add i64 %out_offset.010, %out_start62 %arrayidx = getelementptr inbounds %class.Complex, ptr %in, i64 %add63 %0 = load i32, ptr %arrayidx, align 464 %imaginary_.i.i = getelementptr inbounds %class.Complex, ptr %in, i64 %add, i32 165 %1 = load i32, ptr %imaginary_.i.i, align 466 %arrayidx1 = getelementptr inbounds %class.Complex, ptr %out, i64 %add67 %t0.sroa.4.0.insert.ext = zext i32 %1 to i6468 %t0.sroa.4.0.insert.shift = shl nuw i64 %t0.sroa.4.0.insert.ext, 3269 %t0.sroa.0.0.insert.ext = zext i32 %0 to i6470 %t0.sroa.0.0.insert.insert = or i64 %t0.sroa.4.0.insert.shift, %t0.sroa.0.0.insert.ext71 store i64 %t0.sroa.0.0.insert.insert, ptr %arrayidx1, align 472 %inc = add nuw i64 %out_offset.010, 173 %exitcond = icmp eq i64 %inc, %size74 br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body75}76