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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 62; RUN: opt -S -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 \3; RUN: -enable-interleaved-mem-accesses=true < %s | FileCheck %s4 5; Make sure the vectorizer can handle this loop: The strided load is only used6; by the loop's exit condition, which is not vectorized, and is therefore7; considered uniform while also forming an interleave group.8 9%0 = type { ptr, i32 }10 11@0 = internal unnamed_addr constant [59 x %0] [%0 zeroinitializer,12%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,13%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,14%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,15%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,16%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,17%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,18%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,19%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,20%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,21%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,22%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,23%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,24%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,25%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,26%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,27%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,28%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,29%0 {ptr null, i32 258}, %0 zeroinitializer, %0 zeroinitializer,30%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,31%0 zeroinitializer], align 832 33define dso_local void @test_dead_load(i32 %arg) {34; CHECK-LABEL: define dso_local void @test_dead_load(35; CHECK-SAME: i32 [[ARG:%.*]]) {36; CHECK-NEXT: [[BB1:.*:]]37; CHECK-NEXT: br label %[[VECTOR_PH:.*]]38; CHECK: [[VECTOR_PH]]:39; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]40; CHECK: [[VECTOR_BODY]]:41; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]42; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 443; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[INDEX_NEXT]], 5244; CHECK-NEXT: br i1 [[TMP0]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]45; CHECK: [[MIDDLE_BLOCK]]:46; CHECK-NEXT: br label %[[SCALAR_PH:.*]]47; CHECK: [[SCALAR_PH]]:48; CHECK-NEXT: br label %[[BB2:.*]]49; CHECK: [[BB2]]:50; CHECK-NEXT: [[TMP:%.*]] = phi ptr [ [[TMP6:%.*]], %[[BB2]] ], [ getelementptr (i8, ptr @[[GLOB0:[0-9]+]], i64 832), %[[SCALAR_PH]] ]51; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[TMP0]], ptr [[TMP]], i64 0, i32 152; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 853; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 25854; CHECK-NEXT: [[TMP6]] = getelementptr inbounds [[TMP0]], ptr [[TMP]], i64 155; CHECK-NEXT: br i1 [[TMP5]], label %[[BB65:.*]], label %[[BB2]], !llvm.loop [[LOOP3:![0-9]+]]56; CHECK: [[BB65]]:57; CHECK-NEXT: unreachable58;59bb1:60 br label %bb261 62bb2:63 %tmp = phi ptr [ %tmp6, %bb2 ], [ @0, %bb1 ]64 %tmp3 = getelementptr inbounds %0, ptr %tmp, i64 0, i32 165 %tmp4 = load i32, ptr %tmp3, align 866 %tmp5 = icmp eq i32 %tmp4, 25867 %tmp6 = getelementptr inbounds %0, ptr %tmp, i64 168 br i1 %tmp5, label %bb65, label %bb269 70bb65:71 unreachable72}73