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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -aa-pipeline=basic-aa -passes='loop-mssa(licm),loop-vectorize,dce,instcombine,loop-mssa(licm)' -force-vector-width=4 -S | FileCheck %s3 4; First licm pass is to hoist/sink invariant stores if possible. Today LICM does5; not hoist/sink the invariant stores. Even if that changes, we should still6; vectorize this loop in case licm is not run.7 8; The next licm pass after vectorization is to hoist/sink loop invariant9; instructions.10target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"11 12; This file separates tests with auto-generated check lines from13; invariant-store-vectorization.ll for maintenance.14; all tests check that it is legal to vectorize the stores to invariant15; address.16 17; Instcombine'd version of @inv_val_store_to_inv_address_conditional_diff_values.18; Now the store is no longer of invariant value.19; scalar store the value extracted from the last element of the vector value.20define void @inv_val_store_to_inv_address_conditional_diff_values_ic(ptr %a, i64 %n, ptr %b, i32 %k) {21; CHECK-LABEL: @inv_val_store_to_inv_address_conditional_diff_values_ic(22; CHECK-NEXT: entry:23; CHECK-NEXT: [[NTRUNC:%.*]] = trunc i64 [[N:%.*]] to i3224; CHECK-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)25; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp slt i64 [[N]], 426; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]27; CHECK: vector.memcheck:28; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[N]], 229; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B:%.*]], i64 [[TMP0]]30; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 431; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP1]]32; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]33; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]34; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]35; CHECK: vector.ph:36; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX2]], 922337203685477580437; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i64 038; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer39; CHECK-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x i32> poison, i32 [[K:%.*]], i64 040; CHECK-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT3]], <4 x i32> poison, <4 x i32> zeroinitializer41; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]42; CHECK: vector.body:43; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]44; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]45; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 8, !alias.scope [[META0:![0-9]+]], !noalias [[META3:![0-9]+]]46; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], [[BROADCAST_SPLAT4]]47; CHECK-NEXT: store <4 x i32> [[BROADCAST_SPLAT]], ptr [[TMP1]], align 4, !alias.scope [[META0]], !noalias [[META3]]48; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[DOTNOT]], <4 x i32> [[BROADCAST_SPLAT]], <4 x i32> [[BROADCAST_SPLAT4]]49; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[PREDPHI]], i64 350; CHECK-NEXT: store i32 [[TMP2]], ptr [[A]], align 4, !alias.scope [[META3]]51; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 452; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]53; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]54; CHECK: middle.block:55; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX2]], [[N_VEC]]56; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]57; CHECK: scalar.ph:58; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ]59; CHECK-NEXT: br label [[FOR_BODY:%.*]]60; CHECK: for.body:61; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[LATCH:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]62; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[I]]63; CHECK-NEXT: [[I2:%.*]] = load i32, ptr [[I1]], align 864; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[I2]], [[K]]65; CHECK-NEXT: store i32 [[NTRUNC]], ptr [[I1]], align 466; CHECK-NEXT: br i1 [[CMP]], label [[COND_STORE:%.*]], label [[COND_STORE_K:%.*]]67; CHECK: cond_store:68; CHECK-NEXT: br label [[LATCH]]69; CHECK: cond_store_k:70; CHECK-NEXT: br label [[LATCH]]71; CHECK: latch:72; CHECK-NEXT: [[STOREVAL:%.*]] = phi i32 [ [[NTRUNC]], [[COND_STORE]] ], [ [[K]], [[COND_STORE_K]] ]73; CHECK-NEXT: store i32 [[STOREVAL]], ptr [[A]], align 474; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 175; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]76; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]], !llvm.loop [[LOOP8:![0-9]+]]77; CHECK: for.end.loopexit:78; CHECK-NEXT: br label [[FOR_END]]79; CHECK: for.end:80; CHECK-NEXT: ret void81;82entry:83 %ntrunc = trunc i64 %n to i3284 br label %for.body85 86for.body: ; preds = %for.body, %entry87 %i = phi i64 [ %i.next, %latch ], [ 0, %entry ]88 %i1 = getelementptr inbounds i32, ptr %b, i64 %i89 %i2 = load i32, ptr %i1, align 890 %cmp = icmp eq i32 %i2, %k91 store i32 %ntrunc, ptr %i192 br i1 %cmp, label %cond_store, label %cond_store_k93 94cond_store:95 br label %latch96 97cond_store_k:98 br label %latch99 100latch:101 %storeval = phi i32 [ %ntrunc, %cond_store ], [ %k, %cond_store_k ]102 store i32 %storeval, ptr %a103 %i.next = add nuw nsw i64 %i, 1104 %cond = icmp slt i64 %i.next, %n105 br i1 %cond, label %for.body, label %for.end106 107for.end: ; preds = %for.body108 ret void109}110 111; invariant val stored to invariant address predicated on invariant condition112; This is not treated as a predicated store since the block the store belongs to113; is the latch block (which doesn't need to be predicated).114; variant/invariant values being stored to invariant address.115; test checks that the last element of the phi is extracted and scalar stored116; into the uniform address within the loop.117; Since the condition and the phi is loop invariant, they are LICM'ed after118; vectorization.119define void @inv_val_store_to_inv_address_conditional_inv(ptr %a, i64 %n, ptr %b, i32 %k) {120; CHECK-LABEL: @inv_val_store_to_inv_address_conditional_inv(121; CHECK-NEXT: entry:122; CHECK-NEXT: [[NTRUNC:%.*]] = trunc i64 [[N:%.*]] to i32123; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[K:%.*]], [[NTRUNC]]124; CHECK-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)125; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp slt i64 [[N]], 4126; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]127; CHECK: vector.memcheck:128; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[N]], 2129; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B:%.*]], i64 [[TMP0]]130; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 4131; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP1]]132; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]133; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]134; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]135; CHECK: vector.ph:136; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX2]], 9223372036854775804137; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i64 0138; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer139; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]140; CHECK: vector.body:141; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]142; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]143; CHECK-NEXT: store <4 x i32> [[BROADCAST_SPLAT]], ptr [[TMP3]], align 4, !alias.scope [[META9:![0-9]+]], !noalias [[META12:![0-9]+]]144; CHECK-NEXT: store i32 [[K]], ptr [[A]], align 4, !alias.scope [[META12]]145; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4146; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]147; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]148; CHECK: middle.block:149; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX2]], [[N_VEC]]150; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]151; CHECK: scalar.ph:152; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ]153; CHECK-NEXT: br label [[FOR_BODY:%.*]]154; CHECK: for.body:155; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[LATCH:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]156; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[I]]157; CHECK-NEXT: store i32 [[NTRUNC]], ptr [[I1]], align 4158; CHECK-NEXT: br i1 [[CMP]], label [[COND_STORE:%.*]], label [[COND_STORE_K:%.*]]159; CHECK: cond_store:160; CHECK-NEXT: br label [[LATCH]]161; CHECK: cond_store_k:162; CHECK-NEXT: br label [[LATCH]]163; CHECK: latch:164; CHECK-NEXT: [[STOREVAL:%.*]] = phi i32 [ [[NTRUNC]], [[COND_STORE]] ], [ [[K]], [[COND_STORE_K]] ]165; CHECK-NEXT: store i32 [[STOREVAL]], ptr [[A]], align 4166; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1167; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]168; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]], !llvm.loop [[LOOP15:![0-9]+]]169; CHECK: for.end.loopexit:170; CHECK-NEXT: br label [[FOR_END]]171; CHECK: for.end:172; CHECK-NEXT: ret void173;174entry:175 %ntrunc = trunc i64 %n to i32176 %cmp = icmp eq i32 %ntrunc, %k177 br label %for.body178 179for.body: ; preds = %for.body, %entry180 %i = phi i64 [ %i.next, %latch ], [ 0, %entry ]181 %i1 = getelementptr inbounds i32, ptr %b, i64 %i182 %i2 = load i32, ptr %i1, align 8183 store i32 %ntrunc, ptr %i1184 br i1 %cmp, label %cond_store, label %cond_store_k185 186cond_store:187 br label %latch188 189cond_store_k:190 br label %latch191 192latch:193 %storeval = phi i32 [ %ntrunc, %cond_store ], [ %k, %cond_store_k ]194 store i32 %storeval, ptr %a195 %i.next = add nuw nsw i64 %i, 1196 %cond = icmp slt i64 %i.next, %n197 br i1 %cond, label %for.body, label %for.end198 199for.end: ; preds = %for.body200 ret void201}202 203; variant value stored to uniform address tests that the code gen extracts the204; last element from the variant vector and scalar stores it into the uniform205; address.206define i32 @variant_val_store_to_inv_address(ptr %a, i64 %n, ptr %b, i32 %k) {207; CHECK-LABEL: @variant_val_store_to_inv_address(208; CHECK-NEXT: entry:209; CHECK-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)210; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp slt i64 [[N]], 4211; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]212; CHECK: vector.memcheck:213; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 4214; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[N]], 2215; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B:%.*]], i64 [[TMP0]]216; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]]217; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]]218; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]219; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]220; CHECK: vector.ph:221; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX2]], 9223372036854775804222; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]223; CHECK: vector.body:224; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]225; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ]226; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]227; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 8, !alias.scope [[META16:![0-9]+]]228; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 3229; CHECK-NEXT: store i32 [[TMP2]], ptr [[A]], align 4, !alias.scope [[META19:![0-9]+]], !noalias [[META16]]230; CHECK-NEXT: [[TMP3]] = add <4 x i32> [[VEC_PHI]], [[WIDE_LOAD]]231; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4232; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]233; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]234; CHECK: middle.block:235; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi <4 x i32> [ [[TMP3]], [[VECTOR_BODY]] ]236; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[DOTLCSSA]])237; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX2]], [[N_VEC]]238; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]239; CHECK: scalar.ph:240; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ]241; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP5]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ], [ 0, [[VECTOR_MEMCHECK]] ]242; CHECK-NEXT: br label [[FOR_BODY:%.*]]243; CHECK: for.body:244; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]245; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[I3:%.*]], [[FOR_BODY]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]246; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[I]]247; CHECK-NEXT: [[I2:%.*]] = load i32, ptr [[I1]], align 8248; CHECK-NEXT: store i32 [[I2]], ptr [[A]], align 4249; CHECK-NEXT: [[I3]] = add i32 [[I0]], [[I2]]250; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1251; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]252; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]], !llvm.loop [[LOOP22:![0-9]+]]253; CHECK: for.end.loopexit:254; CHECK-NEXT: [[I3_LCSSA:%.*]] = phi i32 [ [[I3]], [[FOR_BODY]] ]255; CHECK-NEXT: br label [[FOR_END]]256; CHECK: for.end:257; CHECK-NEXT: [[RDX_LCSSA:%.*]] = phi i32 [ [[TMP5]], [[MIDDLE_BLOCK]] ], [ [[I3_LCSSA]], [[FOR_END_LOOPEXIT]] ]258; CHECK-NEXT: ret i32 [[RDX_LCSSA]]259;260entry:261 %ntrunc = trunc i64 %n to i32262 %cmp = icmp eq i32 %ntrunc, %k263 br label %for.body264 265for.body: ; preds = %for.body, %entry266 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]267 %i0 = phi i32 [ %i3, %for.body ], [ 0, %entry ]268 %i1 = getelementptr inbounds i32, ptr %b, i64 %i269 %i2 = load i32, ptr %i1, align 8270 store i32 %i2, ptr %a271 %i3 = add i32 %i0, %i2272 %i.next = add nuw nsw i64 %i, 1273 %cond = icmp slt i64 %i.next, %n274 br i1 %cond, label %for.body, label %for.end275 276for.end: ; preds = %for.body277 %rdx.lcssa = phi i32 [ %i3, %for.body ]278 ret i32 %rdx.lcssa279}280